1 /* 2 * Copyright 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __AMDGPU_SDMA_H__ 25 #define __AMDGPU_SDMA_H__ 26 27 #include "amdgpu_sdma_types.h" 28 #include "amdgpu.h" 29 #include "amdgpu_ring.h" 30 31 #include <linux/types.h> 32 33 struct amdgpu_device; 34 struct amdgpu_iv_entry; 35 struct amdgpu_irq_src; 36 struct amdgpu_ring; 37 struct ras_common_if; 38 39 #define NUM_SDMA(x) hweight32(x) 40 41 int __printf(4, 5) 42 amdgpu_sdma_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, 43 unsigned int instance, const char *fmt, ...); 44 45 int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id); 46 47 int amdgpu_sdma_reset_queue_legacy(struct amdgpu_ring *ring, 48 unsigned int vmid, 49 struct amdgpu_fence *timedout_fence); 50 51 #define amdgpu_emit_copy_buffer(adev, ib, s, d, b, t) (adev)->mman.buffer_funcs->emit_copy_buffer((ib), (s), (d), (b), (t)) 52 #define amdgpu_emit_fill_buffer(adev, ib, s, d, b) (adev)->mman.buffer_funcs->emit_fill_buffer((ib), (s), (d), (b)) 53 54 static inline struct amdgpu_sdma_instance * 55 amdgpu_sdma_get_instance_from_ring(struct amdgpu_ring *ring) 56 { 57 return &ring->adev->sdma.instance[ring->me]; 58 } 59 60 static inline uint64_t 61 amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, unsigned vmid) 62 { 63 if (vmid == 0) 64 return 0; 65 else 66 return amdgpu_sdma_get_instance_from_ring(ring)->csa_addr; 67 } 68 69 int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev, 70 struct ras_common_if *ras_block); 71 int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev, 72 void *err_data, 73 struct amdgpu_iv_entry *entry); 74 int amdgpu_sdma_process_ecc_irq(struct amdgpu_device *adev, 75 struct amdgpu_irq_src *source, 76 struct amdgpu_iv_entry *entry); 77 int amdgpu_sdma_init_microcode(struct amdgpu_device *adev, u32 instance, 78 bool duplicate); 79 void amdgpu_sdma_destroy_inst_ctx(struct amdgpu_device *adev, 80 bool duplicate); 81 int amdgpu_sdma_ras_sw_init(struct amdgpu_device *adev); 82 void amdgpu_debugfs_sdma_sched_mask_init(struct amdgpu_device *adev); 83 int amdgpu_sdma_sysfs_reset_mask_init(struct amdgpu_device *adev); 84 void amdgpu_sdma_sysfs_reset_mask_fini(struct amdgpu_device *adev); 85 bool amdgpu_sdma_is_shared_inv_eng(struct amdgpu_device *adev, struct amdgpu_ring *ring); 86 struct amdgpu_ring *amdgpu_sdma_get_shared_ring(struct amdgpu_device *adev, 87 struct amdgpu_ring *ring); 88 #endif 89