xref: /linux/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h (revision d2de787f2d8097e5c583a7307b798cf5ec31cb55)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 2025 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef __AMDGPU_REG_ACCESS_H__
25 #define __AMDGPU_REG_ACCESS_H__
26 
27 #include <linux/types.h>
28 #include <linux/spinlock.h>
29 
30 struct amdgpu_device;
31 
32 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device *, uint32_t);
33 typedef void (*amdgpu_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t);
34 
35 struct amdgpu_reg_ind {
36 	spinlock_t lock;
37 	amdgpu_rreg_t rreg;
38 	amdgpu_wreg_t wreg;
39 };
40 
41 struct amdgpu_reg_access {
42 	struct amdgpu_reg_ind smc;
43 	struct amdgpu_reg_ind uvd_ctx;
44 	struct amdgpu_reg_ind didt;
45 	struct amdgpu_reg_ind gc_cac;
46 };
47 
48 void amdgpu_reg_access_init(struct amdgpu_device *adev);
49 uint32_t amdgpu_reg_smc_rd32(struct amdgpu_device *adev, uint32_t reg);
50 void amdgpu_reg_smc_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
51 uint32_t amdgpu_reg_uvd_ctx_rd32(struct amdgpu_device *adev, uint32_t reg);
52 void amdgpu_reg_uvd_ctx_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
53 uint32_t amdgpu_reg_didt_rd32(struct amdgpu_device *adev, uint32_t reg);
54 void amdgpu_reg_didt_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
55 uint32_t amdgpu_reg_gc_cac_rd32(struct amdgpu_device *adev, uint32_t reg);
56 void amdgpu_reg_gc_cac_wr32(struct amdgpu_device *adev, uint32_t reg,
57 			    uint32_t v);
58 
59 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
60 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);
61 
62 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device *, uint32_t);
63 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device *, uint32_t, uint64_t);
64 
65 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device *, uint64_t);
66 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device *, uint64_t, uint64_t);
67 
68 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device *, uint32_t,
69 					uint32_t);
70 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t,
71 				    uint32_t);
72 
73 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev, uint32_t reg,
74 			    uint32_t acc_flags);
75 uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev, uint32_t reg,
76 				uint32_t acc_flags, uint32_t xcc_id);
77 void amdgpu_device_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,
78 			uint32_t acc_flags);
79 void amdgpu_device_xcc_wreg(struct amdgpu_device *adev, uint32_t reg,
80 			    uint32_t v, uint32_t acc_flags, uint32_t xcc_id);
81 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev, uint32_t reg,
82 			     uint32_t v, uint32_t xcc_id);
83 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset,
84 		     uint8_t value);
85 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
86 
87 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev, u32 reg_addr);
88 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev, u64 reg_addr);
89 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev, u32 reg_addr);
90 u64 amdgpu_device_indirect_rreg64_ext(struct amdgpu_device *adev, u64 reg_addr);
91 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev, u32 reg_addr,
92 				 u32 reg_data);
93 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev, u64 reg_addr,
94 				     u32 reg_data);
95 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev, u32 reg_addr,
96 				   u64 reg_data);
97 void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev, u64 reg_addr,
98 				       u64 reg_data);
99 
100 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev, u32 reg);
101 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev, u32 reg, u32 v);
102 
103 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev, uint32_t inst,
104 				    uint32_t reg_addr, char reg_name[],
105 				    uint32_t expected_value, uint32_t mask);
106 
107 #endif /* __AMDGPU_REG_ACCESS_H__ */
108