1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright 2025 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef __AMDGPU_REG_ACCESS_H__ 25 #define __AMDGPU_REG_ACCESS_H__ 26 27 #include <linux/types.h> 28 #include <linux/spinlock.h> 29 30 struct amdgpu_device; 31 32 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device *, uint32_t); 33 typedef void (*amdgpu_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t); 34 35 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device *, uint32_t, 36 uint32_t); 37 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t, 38 uint32_t); 39 40 struct amdgpu_reg_ind { 41 spinlock_t lock; 42 amdgpu_rreg_t rreg; 43 amdgpu_wreg_t wreg; 44 }; 45 46 struct amdgpu_reg_ind_blk { 47 spinlock_t lock; 48 amdgpu_block_rreg_t rreg; 49 amdgpu_block_wreg_t wreg; 50 }; 51 52 struct amdgpu_reg_access { 53 struct amdgpu_reg_ind smc; 54 struct amdgpu_reg_ind uvd_ctx; 55 struct amdgpu_reg_ind didt; 56 struct amdgpu_reg_ind gc_cac; 57 struct amdgpu_reg_ind se_cac; 58 struct amdgpu_reg_ind_blk audio_endpt; 59 }; 60 61 void amdgpu_reg_access_init(struct amdgpu_device *adev); 62 uint32_t amdgpu_reg_smc_rd32(struct amdgpu_device *adev, uint32_t reg); 63 void amdgpu_reg_smc_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v); 64 uint32_t amdgpu_reg_uvd_ctx_rd32(struct amdgpu_device *adev, uint32_t reg); 65 void amdgpu_reg_uvd_ctx_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v); 66 uint32_t amdgpu_reg_didt_rd32(struct amdgpu_device *adev, uint32_t reg); 67 void amdgpu_reg_didt_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v); 68 uint32_t amdgpu_reg_gc_cac_rd32(struct amdgpu_device *adev, uint32_t reg); 69 void amdgpu_reg_gc_cac_wr32(struct amdgpu_device *adev, uint32_t reg, 70 uint32_t v); 71 uint32_t amdgpu_reg_se_cac_rd32(struct amdgpu_device *adev, uint32_t reg); 72 void amdgpu_reg_se_cac_wr32(struct amdgpu_device *adev, uint32_t reg, 73 uint32_t v); 74 uint32_t amdgpu_reg_audio_endpt_rd32(struct amdgpu_device *adev, uint32_t block, 75 uint32_t reg); 76 void amdgpu_reg_audio_endpt_wr32(struct amdgpu_device *adev, uint32_t block, 77 uint32_t reg, uint32_t v); 78 79 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t); 80 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t); 81 82 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device *, uint32_t); 83 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device *, uint32_t, uint64_t); 84 85 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device *, uint64_t); 86 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device *, uint64_t, uint64_t); 87 88 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev, uint32_t reg, 89 uint32_t acc_flags); 90 uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev, uint32_t reg, 91 uint32_t acc_flags, uint32_t xcc_id); 92 void amdgpu_device_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, 93 uint32_t acc_flags); 94 void amdgpu_device_xcc_wreg(struct amdgpu_device *adev, uint32_t reg, 95 uint32_t v, uint32_t acc_flags, uint32_t xcc_id); 96 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev, uint32_t reg, 97 uint32_t v, uint32_t xcc_id); 98 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, 99 uint8_t value); 100 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset); 101 102 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev, u32 reg_addr); 103 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev, u64 reg_addr); 104 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev, u32 reg_addr); 105 u64 amdgpu_device_indirect_rreg64_ext(struct amdgpu_device *adev, u64 reg_addr); 106 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev, u32 reg_addr, 107 u32 reg_data); 108 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev, u64 reg_addr, 109 u32 reg_data); 110 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev, u32 reg_addr, 111 u64 reg_data); 112 void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev, u64 reg_addr, 113 u64 reg_data); 114 115 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev, u32 reg); 116 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev, u32 reg, u32 v); 117 118 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev, uint32_t inst, 119 uint32_t reg_addr, char reg_name[], 120 uint32_t expected_value, uint32_t mask); 121 122 #endif /* __AMDGPU_REG_ACCESS_H__ */ 123