xref: /linux/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h (revision 5d82f451b0ab2d7137d9ffdd0d15675b756ab29d)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 2025 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef __AMDGPU_REG_ACCESS_H__
25 #define __AMDGPU_REG_ACCESS_H__
26 
27 #include <linux/types.h>
28 #include <linux/spinlock.h>
29 
30 struct amdgpu_device;
31 
32 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device *, uint32_t);
33 typedef void (*amdgpu_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t);
34 
35 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device *, uint32_t,
36 					uint32_t);
37 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t,
38 				    uint32_t);
39 
40 struct amdgpu_reg_ind {
41 	spinlock_t lock;
42 	amdgpu_rreg_t rreg;
43 	amdgpu_wreg_t wreg;
44 };
45 
46 struct amdgpu_reg_ind_blk {
47 	spinlock_t lock;
48 	amdgpu_block_rreg_t rreg;
49 	amdgpu_block_wreg_t wreg;
50 };
51 
52 struct amdgpu_reg_pcie_ind {
53 	amdgpu_rreg_t port_rreg;
54 	amdgpu_wreg_t port_wreg;
55 };
56 
57 struct amdgpu_reg_access {
58 	struct amdgpu_reg_ind smc;
59 	struct amdgpu_reg_ind uvd_ctx;
60 	struct amdgpu_reg_ind didt;
61 	struct amdgpu_reg_ind gc_cac;
62 	struct amdgpu_reg_ind se_cac;
63 	struct amdgpu_reg_ind_blk audio_endpt;
64 	struct amdgpu_reg_pcie_ind pcie;
65 };
66 
67 void amdgpu_reg_access_init(struct amdgpu_device *adev);
68 uint32_t amdgpu_reg_smc_rd32(struct amdgpu_device *adev, uint32_t reg);
69 void amdgpu_reg_smc_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
70 uint32_t amdgpu_reg_uvd_ctx_rd32(struct amdgpu_device *adev, uint32_t reg);
71 void amdgpu_reg_uvd_ctx_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
72 uint32_t amdgpu_reg_didt_rd32(struct amdgpu_device *adev, uint32_t reg);
73 void amdgpu_reg_didt_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
74 uint32_t amdgpu_reg_gc_cac_rd32(struct amdgpu_device *adev, uint32_t reg);
75 void amdgpu_reg_gc_cac_wr32(struct amdgpu_device *adev, uint32_t reg,
76 			    uint32_t v);
77 uint32_t amdgpu_reg_se_cac_rd32(struct amdgpu_device *adev, uint32_t reg);
78 void amdgpu_reg_se_cac_wr32(struct amdgpu_device *adev, uint32_t reg,
79 			    uint32_t v);
80 uint32_t amdgpu_reg_audio_endpt_rd32(struct amdgpu_device *adev, uint32_t block,
81 				     uint32_t reg);
82 void amdgpu_reg_audio_endpt_wr32(struct amdgpu_device *adev, uint32_t block,
83 				 uint32_t reg, uint32_t v);
84 uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg);
85 void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg,
86 			   uint32_t v);
87 
88 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
89 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);
90 
91 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device *, uint32_t);
92 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device *, uint32_t, uint64_t);
93 
94 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device *, uint64_t);
95 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device *, uint64_t, uint64_t);
96 
97 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev, uint32_t reg,
98 			    uint32_t acc_flags);
99 uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev, uint32_t reg,
100 				uint32_t acc_flags, uint32_t xcc_id);
101 void amdgpu_device_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,
102 			uint32_t acc_flags);
103 void amdgpu_device_xcc_wreg(struct amdgpu_device *adev, uint32_t reg,
104 			    uint32_t v, uint32_t acc_flags, uint32_t xcc_id);
105 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev, uint32_t reg,
106 			     uint32_t v, uint32_t xcc_id);
107 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset,
108 		     uint8_t value);
109 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
110 
111 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev, u32 reg_addr);
112 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev, u64 reg_addr);
113 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev, u32 reg_addr);
114 u64 amdgpu_device_indirect_rreg64_ext(struct amdgpu_device *adev, u64 reg_addr);
115 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev, u32 reg_addr,
116 				 u32 reg_data);
117 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev, u64 reg_addr,
118 				     u32 reg_data);
119 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev, u32 reg_addr,
120 				   u64 reg_data);
121 void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev, u64 reg_addr,
122 				       u64 reg_data);
123 
124 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev, u32 reg);
125 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev, u32 reg, u32 v);
126 
127 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev, uint32_t inst,
128 				    uint32_t reg_addr, char reg_name[],
129 				    uint32_t expected_value, uint32_t mask);
130 
131 #endif /* __AMDGPU_REG_ACCESS_H__ */
132