xref: /linux/drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 /*
2  * Copyright (C) 2019  Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included
12  * in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20  */
21 #ifndef __AMDGPU_MMHUB_H__
22 #define __AMDGPU_MMHUB_H__
23 
24 struct amdgpu_mmhub_ras_funcs {
25 	int (*ras_late_init)(struct amdgpu_device *adev);
26 	void (*ras_fini)(struct amdgpu_device *adev);
27 	void (*query_ras_error_count)(struct amdgpu_device *adev,
28 				      void *ras_error_status);
29 	void (*query_ras_error_status)(struct amdgpu_device *adev);
30 	void (*reset_ras_error_count)(struct amdgpu_device *adev);
31 	void (*reset_ras_error_status)(struct amdgpu_device *adev);
32 };
33 
34 struct amdgpu_mmhub_funcs {
35 	u64 (*get_fb_location)(struct amdgpu_device *adev);
36 	void (*init)(struct amdgpu_device *adev);
37 	int (*gart_enable)(struct amdgpu_device *adev);
38 	void (*set_fault_enable_default)(struct amdgpu_device *adev,
39 			bool value);
40 	void (*gart_disable)(struct amdgpu_device *adev);
41 	int (*set_clockgating)(struct amdgpu_device *adev,
42 			       enum amd_clockgating_state state);
43 	void (*get_clockgating)(struct amdgpu_device *adev, u32 *flags);
44 	void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
45 				uint64_t page_table_base);
46 	void (*update_power_gating)(struct amdgpu_device *adev,
47                                 bool enable);
48 };
49 
50 struct amdgpu_mmhub {
51 	struct ras_common_if *ras_if;
52 	const struct amdgpu_mmhub_funcs *funcs;
53 	const struct amdgpu_mmhub_ras_funcs *ras_funcs;
54 };
55 
56 int amdgpu_mmhub_ras_late_init(struct amdgpu_device *adev);
57 void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev);
58 #endif
59 
60