1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * 23 */ 24 #include <linux/kthread.h> 25 #include <linux/wait.h> 26 #include <linux/sched.h> 27 28 #include <drm/drm_drv.h> 29 30 #include "amdgpu.h" 31 #include "amdgpu_trace.h" 32 #include "amdgpu_reset.h" 33 34 static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job) 35 { 36 struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched); 37 struct amdgpu_job *job = to_amdgpu_job(s_job); 38 struct amdgpu_task_info ti; 39 struct amdgpu_device *adev = ring->adev; 40 int idx; 41 int r; 42 43 if (!drm_dev_enter(adev_to_drm(adev), &idx)) { 44 DRM_INFO("%s - device unplugged skipping recovery on scheduler:%s", 45 __func__, s_job->sched->name); 46 47 /* Effectively the job is aborted as the device is gone */ 48 return DRM_GPU_SCHED_STAT_ENODEV; 49 } 50 51 memset(&ti, 0, sizeof(struct amdgpu_task_info)); 52 adev->job_hang = true; 53 54 if (amdgpu_gpu_recovery && 55 amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) { 56 DRM_ERROR("ring %s timeout, but soft recovered\n", 57 s_job->sched->name); 58 goto exit; 59 } 60 61 amdgpu_vm_get_task_info(ring->adev, job->pasid, &ti); 62 DRM_ERROR("ring %s timeout, signaled seq=%u, emitted seq=%u\n", 63 job->base.sched->name, atomic_read(&ring->fence_drv.last_seq), 64 ring->fence_drv.sync_seq); 65 DRM_ERROR("Process information: process %s pid %d thread %s pid %d\n", 66 ti.process_name, ti.tgid, ti.task_name, ti.pid); 67 68 if (amdgpu_device_should_recover_gpu(ring->adev)) { 69 struct amdgpu_reset_context reset_context; 70 memset(&reset_context, 0, sizeof(reset_context)); 71 72 reset_context.method = AMD_RESET_METHOD_NONE; 73 reset_context.reset_req_dev = adev; 74 clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags); 75 76 r = amdgpu_device_gpu_recover(ring->adev, job, &reset_context); 77 if (r) 78 DRM_ERROR("GPU Recovery Failed: %d\n", r); 79 } else { 80 drm_sched_suspend_timeout(&ring->sched); 81 if (amdgpu_sriov_vf(adev)) 82 adev->virt.tdr_debug = true; 83 } 84 85 exit: 86 adev->job_hang = false; 87 drm_dev_exit(idx); 88 return DRM_GPU_SCHED_STAT_NOMINAL; 89 } 90 91 int amdgpu_job_alloc(struct amdgpu_device *adev, struct amdgpu_vm *vm, 92 struct drm_sched_entity *entity, void *owner, 93 unsigned int num_ibs, struct amdgpu_job **job) 94 { 95 if (num_ibs == 0) 96 return -EINVAL; 97 98 *job = kzalloc(struct_size(*job, ibs, num_ibs), GFP_KERNEL); 99 if (!*job) 100 return -ENOMEM; 101 102 /* 103 * Initialize the scheduler to at least some ring so that we always 104 * have a pointer to adev. 105 */ 106 (*job)->base.sched = &adev->rings[0]->sched; 107 (*job)->vm = vm; 108 109 amdgpu_sync_create(&(*job)->explicit_sync); 110 (*job)->vram_lost_counter = atomic_read(&adev->vram_lost_counter); 111 (*job)->vm_pd_addr = AMDGPU_BO_INVALID_OFFSET; 112 113 if (!entity) 114 return 0; 115 116 return drm_sched_job_init(&(*job)->base, entity, owner); 117 } 118 119 int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, 120 struct drm_sched_entity *entity, void *owner, 121 size_t size, enum amdgpu_ib_pool_type pool_type, 122 struct amdgpu_job **job) 123 { 124 int r; 125 126 r = amdgpu_job_alloc(adev, NULL, entity, owner, 1, job); 127 if (r) 128 return r; 129 130 (*job)->num_ibs = 1; 131 r = amdgpu_ib_get(adev, NULL, size, pool_type, &(*job)->ibs[0]); 132 if (r) { 133 if (entity) 134 drm_sched_job_cleanup(&(*job)->base); 135 kfree(*job); 136 } 137 138 return r; 139 } 140 141 void amdgpu_job_set_resources(struct amdgpu_job *job, struct amdgpu_bo *gds, 142 struct amdgpu_bo *gws, struct amdgpu_bo *oa) 143 { 144 if (gds) { 145 job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT; 146 job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT; 147 } 148 if (gws) { 149 job->gws_base = amdgpu_bo_gpu_offset(gws) >> PAGE_SHIFT; 150 job->gws_size = amdgpu_bo_size(gws) >> PAGE_SHIFT; 151 } 152 if (oa) { 153 job->oa_base = amdgpu_bo_gpu_offset(oa) >> PAGE_SHIFT; 154 job->oa_size = amdgpu_bo_size(oa) >> PAGE_SHIFT; 155 } 156 } 157 158 void amdgpu_job_free_resources(struct amdgpu_job *job) 159 { 160 struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched); 161 struct dma_fence *f; 162 unsigned i; 163 164 /* use sched fence if available */ 165 f = job->base.s_fence ? &job->base.s_fence->finished : &job->hw_fence; 166 for (i = 0; i < job->num_ibs; ++i) 167 amdgpu_ib_free(ring->adev, &job->ibs[i], f); 168 } 169 170 static void amdgpu_job_free_cb(struct drm_sched_job *s_job) 171 { 172 struct amdgpu_job *job = to_amdgpu_job(s_job); 173 174 drm_sched_job_cleanup(s_job); 175 176 amdgpu_sync_free(&job->explicit_sync); 177 dma_fence_put(&job->hw_fence); 178 } 179 180 void amdgpu_job_set_gang_leader(struct amdgpu_job *job, 181 struct amdgpu_job *leader) 182 { 183 struct dma_fence *fence = &leader->base.s_fence->scheduled; 184 185 WARN_ON(job->gang_submit); 186 187 /* 188 * Don't add a reference when we are the gang leader to avoid circle 189 * dependency. 190 */ 191 if (job != leader) 192 dma_fence_get(fence); 193 job->gang_submit = fence; 194 } 195 196 void amdgpu_job_free(struct amdgpu_job *job) 197 { 198 if (job->base.entity) 199 drm_sched_job_cleanup(&job->base); 200 201 amdgpu_job_free_resources(job); 202 amdgpu_sync_free(&job->explicit_sync); 203 if (job->gang_submit != &job->base.s_fence->scheduled) 204 dma_fence_put(job->gang_submit); 205 206 if (!job->hw_fence.ops) 207 kfree(job); 208 else 209 dma_fence_put(&job->hw_fence); 210 } 211 212 struct dma_fence *amdgpu_job_submit(struct amdgpu_job *job) 213 { 214 struct dma_fence *f; 215 216 drm_sched_job_arm(&job->base); 217 f = dma_fence_get(&job->base.s_fence->finished); 218 amdgpu_job_free_resources(job); 219 drm_sched_entity_push_job(&job->base); 220 221 return f; 222 } 223 224 int amdgpu_job_submit_direct(struct amdgpu_job *job, struct amdgpu_ring *ring, 225 struct dma_fence **fence) 226 { 227 int r; 228 229 job->base.sched = &ring->sched; 230 r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job, fence); 231 232 if (r) 233 return r; 234 235 amdgpu_job_free(job); 236 return 0; 237 } 238 239 static struct dma_fence * 240 amdgpu_job_prepare_job(struct drm_sched_job *sched_job, 241 struct drm_sched_entity *s_entity) 242 { 243 struct amdgpu_ring *ring = to_amdgpu_ring(s_entity->rq->sched); 244 struct amdgpu_job *job = to_amdgpu_job(sched_job); 245 struct dma_fence *fence = NULL; 246 int r; 247 248 while (!fence && job->vm && !job->vmid) { 249 r = amdgpu_vmid_grab(job->vm, ring, job, &fence); 250 if (r) 251 DRM_ERROR("Error getting VM ID (%d)\n", r); 252 } 253 254 if (!fence && job->gang_submit) 255 fence = amdgpu_device_switch_gang(ring->adev, job->gang_submit); 256 257 return fence; 258 } 259 260 static struct dma_fence *amdgpu_job_run(struct drm_sched_job *sched_job) 261 { 262 struct amdgpu_ring *ring = to_amdgpu_ring(sched_job->sched); 263 struct amdgpu_device *adev = ring->adev; 264 struct dma_fence *fence = NULL, *finished; 265 struct amdgpu_job *job; 266 int r = 0; 267 268 job = to_amdgpu_job(sched_job); 269 finished = &job->base.s_fence->finished; 270 271 trace_amdgpu_sched_run_job(job); 272 273 /* Skip job if VRAM is lost and never resubmit gangs */ 274 if (job->vram_lost_counter != atomic_read(&adev->vram_lost_counter) || 275 (job->job_run_counter && job->gang_submit)) 276 dma_fence_set_error(finished, -ECANCELED); 277 278 if (finished->error < 0) { 279 DRM_INFO("Skip scheduling IBs!\n"); 280 } else { 281 r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job, 282 &fence); 283 if (r) 284 DRM_ERROR("Error scheduling IBs (%d)\n", r); 285 } 286 287 job->job_run_counter++; 288 amdgpu_job_free_resources(job); 289 290 fence = r ? ERR_PTR(r) : fence; 291 return fence; 292 } 293 294 #define to_drm_sched_job(sched_job) \ 295 container_of((sched_job), struct drm_sched_job, queue_node) 296 297 void amdgpu_job_stop_all_jobs_on_sched(struct drm_gpu_scheduler *sched) 298 { 299 struct drm_sched_job *s_job; 300 struct drm_sched_entity *s_entity = NULL; 301 int i; 302 303 /* Signal all jobs not yet scheduled */ 304 for (i = DRM_SCHED_PRIORITY_COUNT - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) { 305 struct drm_sched_rq *rq = &sched->sched_rq[i]; 306 spin_lock(&rq->lock); 307 list_for_each_entry(s_entity, &rq->entities, list) { 308 while ((s_job = to_drm_sched_job(spsc_queue_pop(&s_entity->job_queue)))) { 309 struct drm_sched_fence *s_fence = s_job->s_fence; 310 311 dma_fence_signal(&s_fence->scheduled); 312 dma_fence_set_error(&s_fence->finished, -EHWPOISON); 313 dma_fence_signal(&s_fence->finished); 314 } 315 } 316 spin_unlock(&rq->lock); 317 } 318 319 /* Signal all jobs already scheduled to HW */ 320 list_for_each_entry(s_job, &sched->pending_list, list) { 321 struct drm_sched_fence *s_fence = s_job->s_fence; 322 323 dma_fence_set_error(&s_fence->finished, -EHWPOISON); 324 dma_fence_signal(&s_fence->finished); 325 } 326 } 327 328 const struct drm_sched_backend_ops amdgpu_sched_ops = { 329 .prepare_job = amdgpu_job_prepare_job, 330 .run_job = amdgpu_job_run, 331 .timedout_job = amdgpu_job_timedout, 332 .free_job = amdgpu_job_free_cb 333 }; 334