1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 28 #include <linux/firmware.h> 29 #include <linux/mfd/core.h> 30 31 #include "amdgpu.h" 32 #include "amdgpu_isp.h" 33 #include "isp_v4_1_0.h" 34 #include "isp_v4_1_1.h" 35 36 static int isp_sw_init(struct amdgpu_ip_block *ip_block) 37 { 38 return 0; 39 } 40 41 static int isp_sw_fini(struct amdgpu_ip_block *ip_block) 42 { 43 return 0; 44 } 45 46 /** 47 * isp_hw_init - start and test isp block 48 * 49 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 50 * 51 */ 52 static int isp_hw_init(struct amdgpu_ip_block *ip_block) 53 { 54 struct amdgpu_device *adev = ip_block->adev; 55 struct amdgpu_isp *isp = &adev->isp; 56 57 if (isp->funcs->hw_init != NULL) 58 return isp->funcs->hw_init(isp); 59 60 return -ENODEV; 61 } 62 63 /** 64 * isp_hw_fini - stop the hardware block 65 * 66 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 67 * 68 */ 69 static int isp_hw_fini(struct amdgpu_ip_block *ip_block) 70 { 71 struct amdgpu_isp *isp = &ip_block->adev->isp; 72 73 if (isp->funcs->hw_fini != NULL) 74 return isp->funcs->hw_fini(isp); 75 76 return -ENODEV; 77 } 78 79 static int isp_suspend(struct amdgpu_ip_block *ip_block) 80 { 81 return 0; 82 } 83 84 static int isp_resume(struct amdgpu_ip_block *ip_block) 85 { 86 return 0; 87 } 88 89 static int isp_load_fw_by_psp(struct amdgpu_device *adev) 90 { 91 const struct common_firmware_header *hdr; 92 char ucode_prefix[10]; 93 int r = 0; 94 95 /* get isp fw binary name and path */ 96 amdgpu_ucode_ip_version_decode(adev, ISP_HWIP, ucode_prefix, 97 sizeof(ucode_prefix)); 98 99 /* read isp fw */ 100 r = amdgpu_ucode_request(adev, &adev->isp.fw, "amdgpu/%s.bin", ucode_prefix); 101 if (r) { 102 amdgpu_ucode_release(&adev->isp.fw); 103 return r; 104 } 105 106 hdr = (const struct common_firmware_header *)adev->isp.fw->data; 107 108 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id = 109 AMDGPU_UCODE_ID_ISP; 110 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].fw = adev->isp.fw; 111 112 adev->firmware.fw_size += 113 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE); 114 115 return r; 116 } 117 118 static int isp_early_init(struct amdgpu_ip_block *ip_block) 119 { 120 121 struct amdgpu_device *adev = ip_block->adev; 122 struct amdgpu_isp *isp = &adev->isp; 123 124 switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) { 125 case IP_VERSION(4, 1, 0): 126 isp_v4_1_0_set_isp_funcs(isp); 127 break; 128 case IP_VERSION(4, 1, 1): 129 isp_v4_1_1_set_isp_funcs(isp); 130 break; 131 default: 132 return -EINVAL; 133 } 134 135 isp->adev = adev; 136 isp->parent = adev->dev; 137 138 if (isp_load_fw_by_psp(adev)) { 139 DRM_DEBUG_DRIVER("%s: isp fw load failed\n", __func__); 140 return -ENOENT; 141 } 142 143 return 0; 144 } 145 146 static bool isp_is_idle(void *handle) 147 { 148 return true; 149 } 150 151 static int isp_wait_for_idle(struct amdgpu_ip_block *ip_block) 152 { 153 return 0; 154 } 155 156 static int isp_soft_reset(struct amdgpu_ip_block *ip_block) 157 { 158 return 0; 159 } 160 161 static int isp_set_clockgating_state(void *handle, 162 enum amd_clockgating_state state) 163 { 164 return 0; 165 } 166 167 static int isp_set_powergating_state(void *handle, 168 enum amd_powergating_state state) 169 { 170 return 0; 171 } 172 173 static const struct amd_ip_funcs isp_ip_funcs = { 174 .name = "isp_ip", 175 .early_init = isp_early_init, 176 .late_init = NULL, 177 .sw_init = isp_sw_init, 178 .sw_fini = isp_sw_fini, 179 .hw_init = isp_hw_init, 180 .hw_fini = isp_hw_fini, 181 .suspend = isp_suspend, 182 .resume = isp_resume, 183 .is_idle = isp_is_idle, 184 .wait_for_idle = isp_wait_for_idle, 185 .soft_reset = isp_soft_reset, 186 .set_clockgating_state = isp_set_clockgating_state, 187 .set_powergating_state = isp_set_powergating_state, 188 }; 189 190 const struct amdgpu_ip_block_version isp_v4_1_0_ip_block = { 191 .type = AMD_IP_BLOCK_TYPE_ISP, 192 .major = 4, 193 .minor = 1, 194 .rev = 0, 195 .funcs = &isp_ip_funcs, 196 }; 197 198 const struct amdgpu_ip_block_version isp_v4_1_1_ip_block = { 199 .type = AMD_IP_BLOCK_TYPE_ISP, 200 .major = 4, 201 .minor = 1, 202 .rev = 1, 203 .funcs = &isp_ip_funcs, 204 }; 205