1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 28 #include <linux/firmware.h> 29 #include <linux/mfd/core.h> 30 31 #include "amdgpu.h" 32 #include "amdgpu_isp.h" 33 #include "isp_v4_1_0.h" 34 #include "isp_v4_1_1.h" 35 36 /** 37 * isp_hw_init - start and test isp block 38 * 39 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 40 * 41 */ 42 static int isp_hw_init(struct amdgpu_ip_block *ip_block) 43 { 44 struct amdgpu_device *adev = ip_block->adev; 45 struct amdgpu_isp *isp = &adev->isp; 46 47 if (isp->funcs->hw_init != NULL) 48 return isp->funcs->hw_init(isp); 49 50 return -ENODEV; 51 } 52 53 /** 54 * isp_hw_fini - stop the hardware block 55 * 56 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 57 * 58 */ 59 static int isp_hw_fini(struct amdgpu_ip_block *ip_block) 60 { 61 struct amdgpu_isp *isp = &ip_block->adev->isp; 62 63 if (isp->funcs->hw_fini != NULL) 64 return isp->funcs->hw_fini(isp); 65 66 return -ENODEV; 67 } 68 69 static int isp_suspend(struct amdgpu_ip_block *ip_block) 70 { 71 return 0; 72 } 73 74 static int isp_resume(struct amdgpu_ip_block *ip_block) 75 { 76 return 0; 77 } 78 79 static int isp_load_fw_by_psp(struct amdgpu_device *adev) 80 { 81 const struct common_firmware_header *hdr; 82 char ucode_prefix[10]; 83 int r = 0; 84 85 /* get isp fw binary name and path */ 86 amdgpu_ucode_ip_version_decode(adev, ISP_HWIP, ucode_prefix, 87 sizeof(ucode_prefix)); 88 89 /* read isp fw */ 90 r = amdgpu_ucode_request(adev, &adev->isp.fw, "amdgpu/%s.bin", ucode_prefix); 91 if (r) { 92 amdgpu_ucode_release(&adev->isp.fw); 93 return r; 94 } 95 96 hdr = (const struct common_firmware_header *)adev->isp.fw->data; 97 98 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id = 99 AMDGPU_UCODE_ID_ISP; 100 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].fw = adev->isp.fw; 101 102 adev->firmware.fw_size += 103 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE); 104 105 return r; 106 } 107 108 static int isp_early_init(struct amdgpu_ip_block *ip_block) 109 { 110 111 struct amdgpu_device *adev = ip_block->adev; 112 struct amdgpu_isp *isp = &adev->isp; 113 114 switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) { 115 case IP_VERSION(4, 1, 0): 116 isp_v4_1_0_set_isp_funcs(isp); 117 break; 118 case IP_VERSION(4, 1, 1): 119 isp_v4_1_1_set_isp_funcs(isp); 120 break; 121 default: 122 return -EINVAL; 123 } 124 125 isp->adev = adev; 126 isp->parent = adev->dev; 127 128 if (isp_load_fw_by_psp(adev)) { 129 DRM_DEBUG_DRIVER("%s: isp fw load failed\n", __func__); 130 return -ENOENT; 131 } 132 133 return 0; 134 } 135 136 static bool isp_is_idle(void *handle) 137 { 138 return true; 139 } 140 141 static int isp_wait_for_idle(struct amdgpu_ip_block *ip_block) 142 { 143 return 0; 144 } 145 146 static int isp_soft_reset(struct amdgpu_ip_block *ip_block) 147 { 148 return 0; 149 } 150 151 static int isp_set_clockgating_state(void *handle, 152 enum amd_clockgating_state state) 153 { 154 return 0; 155 } 156 157 static int isp_set_powergating_state(void *handle, 158 enum amd_powergating_state state) 159 { 160 return 0; 161 } 162 163 static const struct amd_ip_funcs isp_ip_funcs = { 164 .name = "isp_ip", 165 .early_init = isp_early_init, 166 .late_init = NULL, 167 .hw_init = isp_hw_init, 168 .hw_fini = isp_hw_fini, 169 .suspend = isp_suspend, 170 .resume = isp_resume, 171 .is_idle = isp_is_idle, 172 .wait_for_idle = isp_wait_for_idle, 173 .soft_reset = isp_soft_reset, 174 .set_clockgating_state = isp_set_clockgating_state, 175 .set_powergating_state = isp_set_powergating_state, 176 }; 177 178 const struct amdgpu_ip_block_version isp_v4_1_0_ip_block = { 179 .type = AMD_IP_BLOCK_TYPE_ISP, 180 .major = 4, 181 .minor = 1, 182 .rev = 0, 183 .funcs = &isp_ip_funcs, 184 }; 185 186 const struct amdgpu_ip_block_version isp_v4_1_1_ip_block = { 187 .type = AMD_IP_BLOCK_TYPE_ISP, 188 .major = 4, 189 .minor = 1, 190 .rev = 1, 191 .funcs = &isp_ip_funcs, 192 }; 193