1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 28 #include <linux/firmware.h> 29 #include <linux/mfd/core.h> 30 31 #include "amdgpu.h" 32 #include "amdgpu_isp.h" 33 #include "isp_v4_1_0.h" 34 #include "isp_v4_1_1.h" 35 36 /** 37 * isp_hw_init - start and test isp block 38 * 39 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 40 * 41 */ 42 static int isp_hw_init(struct amdgpu_ip_block *ip_block) 43 { 44 struct amdgpu_device *adev = ip_block->adev; 45 struct amdgpu_isp *isp = &adev->isp; 46 47 if (isp->funcs->hw_init != NULL) 48 return isp->funcs->hw_init(isp); 49 50 return -ENODEV; 51 } 52 53 /** 54 * isp_hw_fini - stop the hardware block 55 * 56 * @ip_block: Pointer to the amdgpu_ip_block for this hw instance. 57 * 58 */ 59 static int isp_hw_fini(struct amdgpu_ip_block *ip_block) 60 { 61 struct amdgpu_isp *isp = &ip_block->adev->isp; 62 63 if (isp->funcs->hw_fini != NULL) 64 return isp->funcs->hw_fini(isp); 65 66 return -ENODEV; 67 } 68 69 static int isp_load_fw_by_psp(struct amdgpu_device *adev) 70 { 71 const struct common_firmware_header *hdr; 72 char ucode_prefix[10]; 73 int r = 0; 74 75 /* get isp fw binary name and path */ 76 amdgpu_ucode_ip_version_decode(adev, ISP_HWIP, ucode_prefix, 77 sizeof(ucode_prefix)); 78 79 /* read isp fw */ 80 r = amdgpu_ucode_request(adev, &adev->isp.fw, "amdgpu/%s.bin", ucode_prefix); 81 if (r) { 82 amdgpu_ucode_release(&adev->isp.fw); 83 return r; 84 } 85 86 hdr = (const struct common_firmware_header *)adev->isp.fw->data; 87 88 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id = 89 AMDGPU_UCODE_ID_ISP; 90 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].fw = adev->isp.fw; 91 92 adev->firmware.fw_size += 93 ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE); 94 95 return r; 96 } 97 98 static int isp_early_init(struct amdgpu_ip_block *ip_block) 99 { 100 101 struct amdgpu_device *adev = ip_block->adev; 102 struct amdgpu_isp *isp = &adev->isp; 103 104 switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) { 105 case IP_VERSION(4, 1, 0): 106 isp_v4_1_0_set_isp_funcs(isp); 107 break; 108 case IP_VERSION(4, 1, 1): 109 isp_v4_1_1_set_isp_funcs(isp); 110 break; 111 default: 112 return -EINVAL; 113 } 114 115 isp->adev = adev; 116 isp->parent = adev->dev; 117 118 if (isp_load_fw_by_psp(adev)) { 119 DRM_DEBUG_DRIVER("%s: isp fw load failed\n", __func__); 120 return -ENOENT; 121 } 122 123 return 0; 124 } 125 126 static bool isp_is_idle(void *handle) 127 { 128 return true; 129 } 130 131 static int isp_set_clockgating_state(void *handle, 132 enum amd_clockgating_state state) 133 { 134 return 0; 135 } 136 137 static int isp_set_powergating_state(void *handle, 138 enum amd_powergating_state state) 139 { 140 return 0; 141 } 142 143 static const struct amd_ip_funcs isp_ip_funcs = { 144 .name = "isp_ip", 145 .early_init = isp_early_init, 146 .hw_init = isp_hw_init, 147 .hw_fini = isp_hw_fini, 148 .is_idle = isp_is_idle, 149 .set_clockgating_state = isp_set_clockgating_state, 150 .set_powergating_state = isp_set_powergating_state, 151 }; 152 153 const struct amdgpu_ip_block_version isp_v4_1_0_ip_block = { 154 .type = AMD_IP_BLOCK_TYPE_ISP, 155 .major = 4, 156 .minor = 1, 157 .rev = 0, 158 .funcs = &isp_ip_funcs, 159 }; 160 161 const struct amdgpu_ip_block_version isp_v4_1_1_ip_block = { 162 .type = AMD_IP_BLOCK_TYPE_ISP, 163 .major = 4, 164 .minor = 1, 165 .rev = 1, 166 .funcs = &isp_ip_funcs, 167 }; 168