xref: /linux/drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c (revision 8a922b7728a93d837954315c98b84f6b78de0c4f)
1 /*
2  * Copyright 2007-8 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors: Dave Airlie
24  *          Alex Deucher
25  */
26 
27 #include <drm/amdgpu_drm.h>
28 #include "amdgpu.h"
29 #include "amdgpu_connectors.h"
30 #include "amdgpu_display.h"
31 #include "atom.h"
32 #include "atombios_encoders.h"
33 
34 void
35 amdgpu_link_encoder_connector(struct drm_device *dev)
36 {
37 	struct amdgpu_device *adev = drm_to_adev(dev);
38 	struct drm_connector *connector;
39 	struct drm_connector_list_iter iter;
40 	struct amdgpu_connector *amdgpu_connector;
41 	struct drm_encoder *encoder;
42 	struct amdgpu_encoder *amdgpu_encoder;
43 
44 	drm_connector_list_iter_begin(dev, &iter);
45 	/* walk the list and link encoders to connectors */
46 	drm_for_each_connector_iter(connector, &iter) {
47 		amdgpu_connector = to_amdgpu_connector(connector);
48 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
49 			amdgpu_encoder = to_amdgpu_encoder(encoder);
50 			if (amdgpu_encoder->devices & amdgpu_connector->devices) {
51 				drm_connector_attach_encoder(connector, encoder);
52 				if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
53 					amdgpu_atombios_encoder_init_backlight(amdgpu_encoder, connector);
54 					adev->mode_info.bl_encoder = amdgpu_encoder;
55 				}
56 			}
57 		}
58 	}
59 	drm_connector_list_iter_end(&iter);
60 }
61 
62 void amdgpu_encoder_set_active_device(struct drm_encoder *encoder)
63 {
64 	struct drm_device *dev = encoder->dev;
65 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
66 	struct drm_connector *connector;
67 	struct drm_connector_list_iter iter;
68 
69 	drm_connector_list_iter_begin(dev, &iter);
70 	drm_for_each_connector_iter(connector, &iter) {
71 		if (connector->encoder == encoder) {
72 			struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
73 			amdgpu_encoder->active_device = amdgpu_encoder->devices & amdgpu_connector->devices;
74 			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
75 				  amdgpu_encoder->active_device, amdgpu_encoder->devices,
76 				  amdgpu_connector->devices, encoder->encoder_type);
77 		}
78 	}
79 	drm_connector_list_iter_end(&iter);
80 }
81 
82 struct drm_connector *
83 amdgpu_get_connector_for_encoder(struct drm_encoder *encoder)
84 {
85 	struct drm_device *dev = encoder->dev;
86 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
87 	struct drm_connector *connector, *found = NULL;
88 	struct drm_connector_list_iter iter;
89 	struct amdgpu_connector *amdgpu_connector;
90 
91 	drm_connector_list_iter_begin(dev, &iter);
92 	drm_for_each_connector_iter(connector, &iter) {
93 		amdgpu_connector = to_amdgpu_connector(connector);
94 		if (amdgpu_encoder->active_device & amdgpu_connector->devices) {
95 			found = connector;
96 			break;
97 		}
98 	}
99 	drm_connector_list_iter_end(&iter);
100 	return found;
101 }
102 
103 struct drm_connector *
104 amdgpu_get_connector_for_encoder_init(struct drm_encoder *encoder)
105 {
106 	struct drm_device *dev = encoder->dev;
107 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
108 	struct drm_connector *connector, *found = NULL;
109 	struct drm_connector_list_iter iter;
110 	struct amdgpu_connector *amdgpu_connector;
111 
112 	drm_connector_list_iter_begin(dev, &iter);
113 	drm_for_each_connector_iter(connector, &iter) {
114 		amdgpu_connector = to_amdgpu_connector(connector);
115 		if (amdgpu_encoder->devices & amdgpu_connector->devices) {
116 			found = connector;
117 			break;
118 		}
119 	}
120 	drm_connector_list_iter_end(&iter);
121 	return found;
122 }
123 
124 struct drm_encoder *amdgpu_get_external_encoder(struct drm_encoder *encoder)
125 {
126 	struct drm_device *dev = encoder->dev;
127 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
128 	struct drm_encoder *other_encoder;
129 	struct amdgpu_encoder *other_amdgpu_encoder;
130 
131 	if (amdgpu_encoder->is_ext_encoder)
132 		return NULL;
133 
134 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
135 		if (other_encoder == encoder)
136 			continue;
137 		other_amdgpu_encoder = to_amdgpu_encoder(other_encoder);
138 		if (other_amdgpu_encoder->is_ext_encoder &&
139 		    (amdgpu_encoder->devices & other_amdgpu_encoder->devices))
140 			return other_encoder;
141 	}
142 	return NULL;
143 }
144 
145 u16 amdgpu_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
146 {
147 	struct drm_encoder *other_encoder = amdgpu_get_external_encoder(encoder);
148 
149 	if (other_encoder) {
150 		struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(other_encoder);
151 
152 		switch (amdgpu_encoder->encoder_id) {
153 		case ENCODER_OBJECT_ID_TRAVIS:
154 		case ENCODER_OBJECT_ID_NUTMEG:
155 			return amdgpu_encoder->encoder_id;
156 		default:
157 			return ENCODER_OBJECT_ID_NONE;
158 		}
159 	}
160 	return ENCODER_OBJECT_ID_NONE;
161 }
162 
163 void amdgpu_panel_mode_fixup(struct drm_encoder *encoder,
164 			     struct drm_display_mode *adjusted_mode)
165 {
166 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
167 	struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
168 	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
169 	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
170 	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
171 	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
172 	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
173 	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
174 
175 	adjusted_mode->clock = native_mode->clock;
176 	adjusted_mode->flags = native_mode->flags;
177 
178 	adjusted_mode->hdisplay = native_mode->hdisplay;
179 	adjusted_mode->vdisplay = native_mode->vdisplay;
180 
181 	adjusted_mode->htotal = native_mode->hdisplay + hblank;
182 	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
183 	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
184 
185 	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
186 	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
187 	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
188 
189 	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
190 
191 	adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
192 	adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
193 
194 	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
195 	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
196 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
197 
198 	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
199 	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
200 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
201 
202 }
203 
204 bool amdgpu_dig_monitor_is_duallink(struct drm_encoder *encoder,
205 				    u32 pixel_clock)
206 {
207 	struct drm_connector *connector;
208 	struct amdgpu_connector *amdgpu_connector;
209 	struct amdgpu_connector_atom_dig *dig_connector;
210 
211 	connector = amdgpu_get_connector_for_encoder(encoder);
212 	/* if we don't have an active device yet, just use one of
213 	 * the connectors tied to the encoder.
214 	 */
215 	if (!connector)
216 		connector = amdgpu_get_connector_for_encoder_init(encoder);
217 	amdgpu_connector = to_amdgpu_connector(connector);
218 
219 	switch (connector->connector_type) {
220 	case DRM_MODE_CONNECTOR_DVII:
221 	case DRM_MODE_CONNECTOR_HDMIB:
222 		if (amdgpu_connector->use_digital) {
223 			/* HDMI 1.3 supports up to 340 Mhz over single link */
224 			if (connector->display_info.is_hdmi) {
225 				if (pixel_clock > 340000)
226 					return true;
227 				else
228 					return false;
229 			} else {
230 				if (pixel_clock > 165000)
231 					return true;
232 				else
233 					return false;
234 			}
235 		} else
236 			return false;
237 	case DRM_MODE_CONNECTOR_DVID:
238 	case DRM_MODE_CONNECTOR_HDMIA:
239 	case DRM_MODE_CONNECTOR_DisplayPort:
240 		dig_connector = amdgpu_connector->con_priv;
241 		if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
242 		    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
243 			return false;
244 		else {
245 			/* HDMI 1.3 supports up to 340 Mhz over single link */
246 			if (connector->display_info.is_hdmi) {
247 				if (pixel_clock > 340000)
248 					return true;
249 				else
250 					return false;
251 			} else {
252 				if (pixel_clock > 165000)
253 					return true;
254 				else
255 					return false;
256 			}
257 		}
258 	default:
259 		return false;
260 	}
261 }
262