1130e0371SOded Gabbay /* 2130e0371SOded Gabbay * Copyright 2014 Advanced Micro Devices, Inc. 3130e0371SOded Gabbay * 4130e0371SOded Gabbay * Permission is hereby granted, free of charge, to any person obtaining a 5130e0371SOded Gabbay * copy of this software and associated documentation files (the "Software"), 6130e0371SOded Gabbay * to deal in the Software without restriction, including without limitation 7130e0371SOded Gabbay * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8130e0371SOded Gabbay * and/or sell copies of the Software, and to permit persons to whom the 9130e0371SOded Gabbay * Software is furnished to do so, subject to the following conditions: 10130e0371SOded Gabbay * 11130e0371SOded Gabbay * The above copyright notice and this permission notice shall be included in 12130e0371SOded Gabbay * all copies or substantial portions of the Software. 13130e0371SOded Gabbay * 14130e0371SOded Gabbay * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15130e0371SOded Gabbay * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16130e0371SOded Gabbay * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17130e0371SOded Gabbay * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18130e0371SOded Gabbay * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19130e0371SOded Gabbay * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20130e0371SOded Gabbay * OTHER DEALINGS IN THE SOFTWARE. 21130e0371SOded Gabbay */ 22130e0371SOded Gabbay 23130e0371SOded Gabbay /* amdgpu_amdkfd.h defines the private interface between amdgpu and amdkfd. */ 24130e0371SOded Gabbay 25130e0371SOded Gabbay #ifndef AMDGPU_AMDKFD_H_INCLUDED 26130e0371SOded Gabbay #define AMDGPU_AMDKFD_H_INCLUDED 27130e0371SOded Gabbay 28130e0371SOded Gabbay #include <linux/types.h> 297420f482SOded Gabbay #include <linux/mm.h> 309bf5b9ebSChristoph Hellwig #include <linux/kthread.h> 315ae0283eSFelix Kuehling #include <linux/workqueue.h> 32130e0371SOded Gabbay #include <kgd_kfd_interface.h> 33a46a2cd1SFelix Kuehling #include <drm/ttm/ttm_execbuf_util.h> 34a46a2cd1SFelix Kuehling #include "amdgpu_sync.h" 35a46a2cd1SFelix Kuehling #include "amdgpu_vm.h" 36130e0371SOded Gabbay 37611736d8SFelix Kuehling extern uint64_t amdgpu_amdkfd_total_mem_size; 38d8d019ccSFelix Kuehling 39130e0371SOded Gabbay struct amdgpu_device; 40130e0371SOded Gabbay 41a46a2cd1SFelix Kuehling struct kfd_bo_va_list { 42a46a2cd1SFelix Kuehling struct list_head bo_list; 43a46a2cd1SFelix Kuehling struct amdgpu_bo_va *bo_va; 44a46a2cd1SFelix Kuehling void *kgd_dev; 45a46a2cd1SFelix Kuehling bool is_mapped; 46a46a2cd1SFelix Kuehling uint64_t va; 47a46a2cd1SFelix Kuehling uint64_t pte_flags; 48a46a2cd1SFelix Kuehling }; 49a46a2cd1SFelix Kuehling 50130e0371SOded Gabbay struct kgd_mem { 51a46a2cd1SFelix Kuehling struct mutex lock; 52130e0371SOded Gabbay struct amdgpu_bo *bo; 53a46a2cd1SFelix Kuehling struct list_head bo_va_list; 54a46a2cd1SFelix Kuehling /* protected by amdkfd_process_info.lock */ 55a46a2cd1SFelix Kuehling struct ttm_validate_buffer validate_list; 56a46a2cd1SFelix Kuehling struct ttm_validate_buffer resv_list; 57a46a2cd1SFelix Kuehling uint32_t domain; 58a46a2cd1SFelix Kuehling unsigned int mapped_to_gpu_memory; 59a46a2cd1SFelix Kuehling uint64_t va; 60a46a2cd1SFelix Kuehling 61d0ba51b1SFelix Kuehling uint32_t alloc_flags; 62a46a2cd1SFelix Kuehling 635ae0283eSFelix Kuehling atomic_t invalid; 64a46a2cd1SFelix Kuehling struct amdkfd_process_info *process_info; 65a46a2cd1SFelix Kuehling 66a46a2cd1SFelix Kuehling struct amdgpu_sync sync; 67a46a2cd1SFelix Kuehling 68a46a2cd1SFelix Kuehling bool aql_queue; 69d4566deeSMukul Joshi bool is_imported; 70130e0371SOded Gabbay }; 71130e0371SOded Gabbay 72d8d019ccSFelix Kuehling /* KFD Memory Eviction */ 73d8d019ccSFelix Kuehling struct amdgpu_amdkfd_fence { 74d8d019ccSFelix Kuehling struct dma_fence base; 75d8d019ccSFelix Kuehling struct mm_struct *mm; 76d8d019ccSFelix Kuehling spinlock_t lock; 77d8d019ccSFelix Kuehling char timeline_name[TASK_COMM_LEN]; 78d8d019ccSFelix Kuehling }; 79d8d019ccSFelix Kuehling 80611736d8SFelix Kuehling struct amdgpu_kfd_dev { 81611736d8SFelix Kuehling struct kfd_dev *dev; 82611736d8SFelix Kuehling uint64_t vram_used; 838e2712e7Sshaoyunl bool init_complete; 84611736d8SFelix Kuehling }; 85611736d8SFelix Kuehling 860da8b10eSAmber Lin enum kgd_engine_type { 870da8b10eSAmber Lin KGD_ENGINE_PFP = 1, 880da8b10eSAmber Lin KGD_ENGINE_ME, 890da8b10eSAmber Lin KGD_ENGINE_CE, 900da8b10eSAmber Lin KGD_ENGINE_MEC1, 910da8b10eSAmber Lin KGD_ENGINE_MEC2, 920da8b10eSAmber Lin KGD_ENGINE_RLC, 930da8b10eSAmber Lin KGD_ENGINE_SDMA1, 940da8b10eSAmber Lin KGD_ENGINE_SDMA2, 950da8b10eSAmber Lin KGD_ENGINE_MAX 960da8b10eSAmber Lin }; 970da8b10eSAmber Lin 98d8d019ccSFelix Kuehling 99a46a2cd1SFelix Kuehling struct amdkfd_process_info { 100a46a2cd1SFelix Kuehling /* List head of all VMs that belong to a KFD process */ 101a46a2cd1SFelix Kuehling struct list_head vm_list_head; 102a46a2cd1SFelix Kuehling /* List head for all KFD BOs that belong to a KFD process. */ 103a46a2cd1SFelix Kuehling struct list_head kfd_bo_list; 1045ae0283eSFelix Kuehling /* List of userptr BOs that are valid or invalid */ 1055ae0283eSFelix Kuehling struct list_head userptr_valid_list; 1065ae0283eSFelix Kuehling struct list_head userptr_inval_list; 107a46a2cd1SFelix Kuehling /* Lock to protect kfd_bo_list */ 108a46a2cd1SFelix Kuehling struct mutex lock; 109a46a2cd1SFelix Kuehling 110a46a2cd1SFelix Kuehling /* Number of VMs */ 111a46a2cd1SFelix Kuehling unsigned int n_vms; 112a46a2cd1SFelix Kuehling /* Eviction Fence */ 113a46a2cd1SFelix Kuehling struct amdgpu_amdkfd_fence *eviction_fence; 1145ae0283eSFelix Kuehling 1155ae0283eSFelix Kuehling /* MMU-notifier related fields */ 1165ae0283eSFelix Kuehling atomic_t evicted_bos; 1175ae0283eSFelix Kuehling struct delayed_work restore_userptr_work; 1185ae0283eSFelix Kuehling struct pid *pid; 119a46a2cd1SFelix Kuehling }; 120a46a2cd1SFelix Kuehling 121efb1c658SOded Gabbay int amdgpu_amdkfd_init(void); 122130e0371SOded Gabbay void amdgpu_amdkfd_fini(void); 123130e0371SOded Gabbay 1249593f4d6SRajneesh Bhardwaj void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool run_pm); 1259593f4d6SRajneesh Bhardwaj int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool run_pm); 126dc102c43SAndres Rodriguez void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, 127130e0371SOded Gabbay const void *ih_ring_entry); 128dc102c43SAndres Rodriguez void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev); 129dc102c43SAndres Rodriguez void amdgpu_amdkfd_device_init(struct amdgpu_device *adev); 130*e9669fb7SAndrey Grodzovsky void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev); 1314c660c8fSFelix Kuehling int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine, 1324c660c8fSFelix Kuehling uint32_t vmid, uint64_t gpu_addr, 1334c660c8fSFelix Kuehling uint32_t *ib_cmd, uint32_t ib_len); 13401c097dbSFelix Kuehling void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle); 135aabf3a95SJack Xiao bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd); 136ffa02269SAlex Sierra int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid); 137ffa02269SAlex Sierra int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid); 1384c660c8fSFelix Kuehling 139155494dbSFelix Kuehling bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid); 140155494dbSFelix Kuehling 1415c6dd71eSShaoyun Liu int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev); 1425c6dd71eSShaoyun Liu 1435c6dd71eSShaoyun Liu int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev); 1445c6dd71eSShaoyun Liu 14524da5a9cSShaoyun Liu void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd); 14624da5a9cSShaoyun Liu 147d09f85d5SYong Zhao int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev, 148d09f85d5SYong Zhao int queue_bit); 149d09f85d5SYong Zhao 150cd63989eSLang Yu struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context, 151cd63989eSLang Yu struct mm_struct *mm); 152cd63989eSLang Yu #if IS_ENABLED(CONFIG_HSA_AMD) 153cd63989eSLang Yu bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm); 154cd63989eSLang Yu struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f); 155cd63989eSLang Yu int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo); 156cd63989eSLang Yu int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm); 157cd63989eSLang Yu #else 158cd63989eSLang Yu static inline 159cd63989eSLang Yu bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm) 160cd63989eSLang Yu { 161cd63989eSLang Yu return false; 162cd63989eSLang Yu } 163cd63989eSLang Yu 164cd63989eSLang Yu static inline 165cd63989eSLang Yu struct amdgpu_amdkfd_fence *to_amdgpu_amdkfd_fence(struct dma_fence *f) 166cd63989eSLang Yu { 167cd63989eSLang Yu return NULL; 168cd63989eSLang Yu } 169cd63989eSLang Yu 170cd63989eSLang Yu static inline 171cd63989eSLang Yu int amdgpu_amdkfd_remove_fence_on_pt_pd_bos(struct amdgpu_bo *bo) 172cd63989eSLang Yu { 173cd63989eSLang Yu return 0; 174cd63989eSLang Yu } 175cd63989eSLang Yu 176cd63989eSLang Yu static inline 177cd63989eSLang Yu int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm) 178cd63989eSLang Yu { 179cd63989eSLang Yu return 0; 180cd63989eSLang Yu } 181cd63989eSLang Yu #endif 182130e0371SOded Gabbay /* Shared API */ 1837cd52c91SAmber Lin int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size, 184130e0371SOded Gabbay void **mem_obj, uint64_t *gpu_addr, 18515426dbbSYong Zhao void **cpu_ptr, bool mqd_gfx9); 1867cd52c91SAmber Lin void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj); 187ca66fb8fSOak Zeng int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size, void **mem_obj); 188ca66fb8fSOak Zeng void amdgpu_amdkfd_free_gws(struct kgd_dev *kgd, void *mem_obj); 18971efab6aSOak Zeng int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem); 19071efab6aSOak Zeng int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem); 1910da8b10eSAmber Lin uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd, 1920da8b10eSAmber Lin enum kgd_engine_type type); 1937cd52c91SAmber Lin void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd, 19430f1c042SHarish Kasiviswanathan struct kfd_local_mem_info *mem_info); 1957cd52c91SAmber Lin uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd); 196130e0371SOded Gabbay 1977cd52c91SAmber Lin uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd); 1987cd52c91SAmber Lin void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info); 1991dde0ea9SFelix Kuehling int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd, 2001dde0ea9SFelix Kuehling struct kgd_dev **dmabuf_kgd, 2011dde0ea9SFelix Kuehling uint64_t *bo_size, void *metadata_buffer, 2021dde0ea9SFelix Kuehling size_t buffer_size, uint32_t *metadata_size, 2031dde0ea9SFelix Kuehling uint32_t *flags); 2049f0a0b41SKent Russell uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd); 205db8b62c0SShaoyun Liu uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd); 2060c663695SDivya Shikre uint64_t amdgpu_amdkfd_get_unique_id(struct kgd_dev *kgd); 207d8e408a8SOak Zeng uint64_t amdgpu_amdkfd_get_mmio_remap_phys_addr(struct kgd_dev *kgd); 20829e76462SOak Zeng uint32_t amdgpu_amdkfd_get_num_gws(struct kgd_dev *kgd); 209c6d1ec41SJoseph Greathouse uint32_t amdgpu_amdkfd_get_asic_rev_id(struct kgd_dev *kgd); 2109b498efaSAlex Deucher int amdgpu_amdkfd_get_noretry(struct kgd_dev *kgd); 211da361dd1Sshaoyunl uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *src); 212130e0371SOded Gabbay 213cd05c865SFelix Kuehling /* Read user wptr from a specified user address space with page fault 214cd05c865SFelix Kuehling * disabled. The memory must be pinned and mapped to the hardware when 215cd05c865SFelix Kuehling * this is called in hqd_load functions, so it should never fault in 216cd05c865SFelix Kuehling * the first place. This resolves a circular lock dependency involving 217c1e8d7c6SMichel Lespinasse * four locks, including the DQM lock and mmap_lock. 218cd05c865SFelix Kuehling */ 21970539bd7SFelix Kuehling #define read_user_wptr(mmptr, wptr, dst) \ 22070539bd7SFelix Kuehling ({ \ 22170539bd7SFelix Kuehling bool valid = false; \ 22270539bd7SFelix Kuehling if ((mmptr) && (wptr)) { \ 223cd05c865SFelix Kuehling pagefault_disable(); \ 22470539bd7SFelix Kuehling if ((mmptr) == current->mm) { \ 22570539bd7SFelix Kuehling valid = !get_user((dst), (wptr)); \ 2268449d150SChristoph Hellwig } else if (current->flags & PF_KTHREAD) { \ 227f5678e7fSChristoph Hellwig kthread_use_mm(mmptr); \ 22870539bd7SFelix Kuehling valid = !get_user((dst), (wptr)); \ 229f5678e7fSChristoph Hellwig kthread_unuse_mm(mmptr); \ 23070539bd7SFelix Kuehling } \ 231cd05c865SFelix Kuehling pagefault_enable(); \ 23270539bd7SFelix Kuehling } \ 23370539bd7SFelix Kuehling valid; \ 23470539bd7SFelix Kuehling }) 23570539bd7SFelix Kuehling 236a46a2cd1SFelix Kuehling /* GPUVM API */ 237ede0dd86SFelix Kuehling int amdgpu_amdkfd_gpuvm_acquire_process_vm(struct kgd_dev *kgd, 238c7b6bac9SFenghua Yu struct file *filp, u32 pasid, 239ede0dd86SFelix Kuehling void **vm, void **process_info, 240ede0dd86SFelix Kuehling struct dma_fence **ef); 241bf47afbaSOak Zeng void amdgpu_amdkfd_gpuvm_release_process_vm(struct kgd_dev *kgd, void *vm); 242e715c6d0SShaoyun Liu uint64_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm); 243a46a2cd1SFelix Kuehling int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( 244a46a2cd1SFelix Kuehling struct kgd_dev *kgd, uint64_t va, uint64_t size, 245a46a2cd1SFelix Kuehling void *vm, struct kgd_mem **mem, 246a46a2cd1SFelix Kuehling uint64_t *offset, uint32_t flags); 247a46a2cd1SFelix Kuehling int amdgpu_amdkfd_gpuvm_free_memory_of_gpu( 248d4566deeSMukul Joshi struct kgd_dev *kgd, struct kgd_mem *mem, uint64_t *size); 249a46a2cd1SFelix Kuehling int amdgpu_amdkfd_gpuvm_map_memory_to_gpu( 250a46a2cd1SFelix Kuehling struct kgd_dev *kgd, struct kgd_mem *mem, void *vm); 251a46a2cd1SFelix Kuehling int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu( 252a46a2cd1SFelix Kuehling struct kgd_dev *kgd, struct kgd_mem *mem, void *vm); 253a46a2cd1SFelix Kuehling int amdgpu_amdkfd_gpuvm_sync_memory( 254a46a2cd1SFelix Kuehling struct kgd_dev *kgd, struct kgd_mem *mem, bool intr); 255a46a2cd1SFelix Kuehling int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_dev *kgd, 256a46a2cd1SFelix Kuehling struct kgd_mem *mem, void **kptr, uint64_t *size); 257a46a2cd1SFelix Kuehling int amdgpu_amdkfd_gpuvm_restore_process_bos(void *process_info, 258a46a2cd1SFelix Kuehling struct dma_fence **ef); 259b97dfa27Sshaoyunl int amdgpu_amdkfd_gpuvm_get_vm_fault_info(struct kgd_dev *kgd, 260b97dfa27Sshaoyunl struct kfd_vm_fault_info *info); 2611dde0ea9SFelix Kuehling int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd, 2621dde0ea9SFelix Kuehling struct dma_buf *dmabuf, 2631dde0ea9SFelix Kuehling uint64_t va, void *vm, 2641dde0ea9SFelix Kuehling struct kgd_mem **mem, uint64_t *size, 2651dde0ea9SFelix Kuehling uint64_t *mmap_offset); 266fd7d08baSYong Zhao int amdgpu_amdkfd_get_tile_config(struct kgd_dev *kgd, 267fd7d08baSYong Zhao struct tile_config *config); 268cd63989eSLang Yu #if IS_ENABLED(CONFIG_HSA_AMD) 269cd63989eSLang Yu void amdgpu_amdkfd_gpuvm_init_mem_limits(void); 270cd63989eSLang Yu void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev, 271cd63989eSLang Yu struct amdgpu_vm *vm); 272cd63989eSLang Yu void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo); 273cd63989eSLang Yu #else 274cd63989eSLang Yu static inline 275cd63989eSLang Yu void amdgpu_amdkfd_gpuvm_init_mem_limits(void) 276cd63989eSLang Yu { 277cd63989eSLang Yu } 278fd7d08baSYong Zhao 279cd63989eSLang Yu static inline 280cd63989eSLang Yu void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev, 281cd63989eSLang Yu struct amdgpu_vm *vm) 282cd63989eSLang Yu { 283cd63989eSLang Yu } 284cd63989eSLang Yu 285cd63989eSLang Yu static inline 286cd63989eSLang Yu void amdgpu_amdkfd_unreserve_memory_limit(struct amdgpu_bo *bo) 287cd63989eSLang Yu { 288cd63989eSLang Yu } 289cd63989eSLang Yu #endif 2902d3d25b6SAmber Lin /* KGD2KFD callbacks */ 291cd63989eSLang Yu int kgd2kfd_quiesce_mm(struct mm_struct *mm); 292cd63989eSLang Yu int kgd2kfd_resume_mm(struct mm_struct *mm); 293cd63989eSLang Yu int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm, 294cd63989eSLang Yu struct dma_fence *fence); 295cd63989eSLang Yu #if IS_ENABLED(CONFIG_HSA_AMD) 296308176d6SAmber Lin int kgd2kfd_init(void); 2972d3d25b6SAmber Lin void kgd2kfd_exit(void); 2982d3d25b6SAmber Lin struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev, 299050091abSYong Zhao unsigned int asic_type, bool vf); 3002d3d25b6SAmber Lin bool kgd2kfd_device_init(struct kfd_dev *kfd, 3013a0c3423SHarish Kasiviswanathan struct drm_device *ddev, 3022d3d25b6SAmber Lin const struct kgd2kfd_shared_resources *gpu_resources); 3032d3d25b6SAmber Lin void kgd2kfd_device_exit(struct kfd_dev *kfd); 3049593f4d6SRajneesh Bhardwaj void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm); 3059593f4d6SRajneesh Bhardwaj int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm); 3062d3d25b6SAmber Lin int kgd2kfd_pre_reset(struct kfd_dev *kfd); 3072d3d25b6SAmber Lin int kgd2kfd_post_reset(struct kfd_dev *kfd); 3082d3d25b6SAmber Lin void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry); 3099b54d201SEric Huang void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd); 3102c2b0d88SMukul Joshi void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint32_t throttle_bitmask); 311cd63989eSLang Yu #else 312cd63989eSLang Yu static inline int kgd2kfd_init(void) 313cd63989eSLang Yu { 314cd63989eSLang Yu return -ENOENT; 315cd63989eSLang Yu } 3162d3d25b6SAmber Lin 317cd63989eSLang Yu static inline void kgd2kfd_exit(void) 318cd63989eSLang Yu { 319cd63989eSLang Yu } 320cd63989eSLang Yu 321cd63989eSLang Yu static inline 322cd63989eSLang Yu struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev, 323cd63989eSLang Yu unsigned int asic_type, bool vf) 324cd63989eSLang Yu { 325cd63989eSLang Yu return NULL; 326cd63989eSLang Yu } 327cd63989eSLang Yu 328cd63989eSLang Yu static inline 329cd63989eSLang Yu bool kgd2kfd_device_init(struct kfd_dev *kfd, struct drm_device *ddev, 330cd63989eSLang Yu const struct kgd2kfd_shared_resources *gpu_resources) 331cd63989eSLang Yu { 332cd63989eSLang Yu return false; 333cd63989eSLang Yu } 334cd63989eSLang Yu 335cd63989eSLang Yu static inline void kgd2kfd_device_exit(struct kfd_dev *kfd) 336cd63989eSLang Yu { 337cd63989eSLang Yu } 338cd63989eSLang Yu 339cd63989eSLang Yu static inline void kgd2kfd_suspend(struct kfd_dev *kfd, bool run_pm) 340cd63989eSLang Yu { 341cd63989eSLang Yu } 342cd63989eSLang Yu 343cd63989eSLang Yu static inline int kgd2kfd_resume(struct kfd_dev *kfd, bool run_pm) 344cd63989eSLang Yu { 345cd63989eSLang Yu return 0; 346cd63989eSLang Yu } 347cd63989eSLang Yu 348cd63989eSLang Yu static inline int kgd2kfd_pre_reset(struct kfd_dev *kfd) 349cd63989eSLang Yu { 350cd63989eSLang Yu return 0; 351cd63989eSLang Yu } 352cd63989eSLang Yu 353cd63989eSLang Yu static inline int kgd2kfd_post_reset(struct kfd_dev *kfd) 354cd63989eSLang Yu { 355cd63989eSLang Yu return 0; 356cd63989eSLang Yu } 357cd63989eSLang Yu 358cd63989eSLang Yu static inline 359cd63989eSLang Yu void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry) 360cd63989eSLang Yu { 361cd63989eSLang Yu } 362cd63989eSLang Yu 363cd63989eSLang Yu static inline 364cd63989eSLang Yu void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd) 365cd63989eSLang Yu { 366cd63989eSLang Yu } 367cd63989eSLang Yu 368cd63989eSLang Yu static inline 369cd63989eSLang Yu void kgd2kfd_smi_event_throttle(struct kfd_dev *kfd, uint32_t throttle_bitmask) 370cd63989eSLang Yu { 371cd63989eSLang Yu } 372cd63989eSLang Yu #endif 373130e0371SOded Gabbay #endif /* AMDGPU_AMDKFD_H_INCLUDED */ 374