xref: /linux/drivers/gpio/gpio-xilinx.c (revision b7019ac550eb3916f34d79db583e9b7ea2524afa)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Xilinx gpio driver for xps/axi_gpio IP.
4  *
5  * Copyright 2008 - 2013 Xilinx, Inc.
6  */
7 
8 #include <linux/bitops.h>
9 #include <linux/init.h>
10 #include <linux/errno.h>
11 #include <linux/module.h>
12 #include <linux/of_device.h>
13 #include <linux/of_platform.h>
14 #include <linux/of_gpio.h>
15 #include <linux/io.h>
16 #include <linux/gpio/driver.h>
17 #include <linux/slab.h>
18 
19 /* Register Offset Definitions */
20 #define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
21 #define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */
22 
23 #define XGPIO_CHANNEL_OFFSET	0x8
24 
25 /* Read/Write access to the GPIO registers */
26 #if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86)
27 # define xgpio_readreg(offset)		readl(offset)
28 # define xgpio_writereg(offset, val)	writel(val, offset)
29 #else
30 # define xgpio_readreg(offset)		__raw_readl(offset)
31 # define xgpio_writereg(offset, val)	__raw_writel(val, offset)
32 #endif
33 
34 /**
35  * struct xgpio_instance - Stores information about GPIO device
36  * @mmchip: OF GPIO chip for memory mapped banks
37  * @gpio_width: GPIO width for every channel
38  * @gpio_state: GPIO state shadow register
39  * @gpio_dir: GPIO direction shadow register
40  * @gpio_lock: Lock used for synchronization
41  */
42 struct xgpio_instance {
43 	struct of_mm_gpio_chip mmchip;
44 	unsigned int gpio_width[2];
45 	u32 gpio_state[2];
46 	u32 gpio_dir[2];
47 	spinlock_t gpio_lock[2];
48 };
49 
50 static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
51 {
52 	if (gpio >= chip->gpio_width[0])
53 		return 1;
54 
55 	return 0;
56 }
57 
58 static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio)
59 {
60 	if (xgpio_index(chip, gpio))
61 		return XGPIO_CHANNEL_OFFSET;
62 
63 	return 0;
64 }
65 
66 static inline int xgpio_offset(struct xgpio_instance *chip, int gpio)
67 {
68 	if (xgpio_index(chip, gpio))
69 		return gpio - chip->gpio_width[0];
70 
71 	return gpio;
72 }
73 
74 /**
75  * xgpio_get - Read the specified signal of the GPIO device.
76  * @gc:     Pointer to gpio_chip device structure.
77  * @gpio:   GPIO signal number.
78  *
79  * This function reads the specified signal of the GPIO device.
80  *
81  * Return:
82  * 0 if direction of GPIO signals is set as input otherwise it
83  * returns negative error value.
84  */
85 static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
86 {
87 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
88 	struct xgpio_instance *chip = gpiochip_get_data(gc);
89 	u32 val;
90 
91 	val = xgpio_readreg(mm_gc->regs + XGPIO_DATA_OFFSET +
92 			    xgpio_regoffset(chip, gpio));
93 
94 	return !!(val & BIT(xgpio_offset(chip, gpio)));
95 }
96 
97 /**
98  * xgpio_set - Write the specified signal of the GPIO device.
99  * @gc:     Pointer to gpio_chip device structure.
100  * @gpio:   GPIO signal number.
101  * @val:    Value to be written to specified signal.
102  *
103  * This function writes the specified value in to the specified signal of the
104  * GPIO device.
105  */
106 static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
107 {
108 	unsigned long flags;
109 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
110 	struct xgpio_instance *chip = gpiochip_get_data(gc);
111 	int index =  xgpio_index(chip, gpio);
112 	int offset =  xgpio_offset(chip, gpio);
113 
114 	spin_lock_irqsave(&chip->gpio_lock[index], flags);
115 
116 	/* Write to GPIO signal and set its direction to output */
117 	if (val)
118 		chip->gpio_state[index] |= BIT(offset);
119 	else
120 		chip->gpio_state[index] &= ~BIT(offset);
121 
122 	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
123 		       xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
124 
125 	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
126 }
127 
128 /**
129  * xgpio_set_multiple - Write the specified signals of the GPIO device.
130  * @gc:     Pointer to gpio_chip device structure.
131  * @mask:   Mask of the GPIOS to modify.
132  * @bits:   Value to be wrote on each GPIO
133  *
134  * This function writes the specified values into the specified signals of the
135  * GPIO devices.
136  */
137 static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
138 			       unsigned long *bits)
139 {
140 	unsigned long flags;
141 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
142 	struct xgpio_instance *chip = gpiochip_get_data(gc);
143 	int index = xgpio_index(chip, 0);
144 	int offset, i;
145 
146 	spin_lock_irqsave(&chip->gpio_lock[index], flags);
147 
148 	/* Write to GPIO signals */
149 	for (i = 0; i < gc->ngpio; i++) {
150 		if (*mask == 0)
151 			break;
152 		if (index !=  xgpio_index(chip, i)) {
153 			xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
154 				       xgpio_regoffset(chip, i),
155 				       chip->gpio_state[index]);
156 			spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
157 			index =  xgpio_index(chip, i);
158 			spin_lock_irqsave(&chip->gpio_lock[index], flags);
159 		}
160 		if (__test_and_clear_bit(i, mask)) {
161 			offset =  xgpio_offset(chip, i);
162 			if (test_bit(i, bits))
163 				chip->gpio_state[index] |= BIT(offset);
164 			else
165 				chip->gpio_state[index] &= ~BIT(offset);
166 		}
167 	}
168 
169 	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
170 		       xgpio_regoffset(chip, i), chip->gpio_state[index]);
171 
172 	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
173 }
174 
175 /**
176  * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
177  * @gc:     Pointer to gpio_chip device structure.
178  * @gpio:   GPIO signal number.
179  *
180  * Return:
181  * 0 - if direction of GPIO signals is set as input
182  * otherwise it returns negative error value.
183  */
184 static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
185 {
186 	unsigned long flags;
187 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
188 	struct xgpio_instance *chip = gpiochip_get_data(gc);
189 	int index =  xgpio_index(chip, gpio);
190 	int offset =  xgpio_offset(chip, gpio);
191 
192 	spin_lock_irqsave(&chip->gpio_lock[index], flags);
193 
194 	/* Set the GPIO bit in shadow register and set direction as input */
195 	chip->gpio_dir[index] |= BIT(offset);
196 	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
197 		       xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
198 
199 	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
200 
201 	return 0;
202 }
203 
204 /**
205  * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
206  * @gc:     Pointer to gpio_chip device structure.
207  * @gpio:   GPIO signal number.
208  * @val:    Value to be written to specified signal.
209  *
210  * This function sets the direction of specified GPIO signal as output.
211  *
212  * Return:
213  * If all GPIO signals of GPIO chip is configured as input then it returns
214  * error otherwise it returns 0.
215  */
216 static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
217 {
218 	unsigned long flags;
219 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
220 	struct xgpio_instance *chip = gpiochip_get_data(gc);
221 	int index =  xgpio_index(chip, gpio);
222 	int offset =  xgpio_offset(chip, gpio);
223 
224 	spin_lock_irqsave(&chip->gpio_lock[index], flags);
225 
226 	/* Write state of GPIO signal */
227 	if (val)
228 		chip->gpio_state[index] |= BIT(offset);
229 	else
230 		chip->gpio_state[index] &= ~BIT(offset);
231 	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET +
232 			xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
233 
234 	/* Clear the GPIO bit in shadow register and set direction as output */
235 	chip->gpio_dir[index] &= ~BIT(offset);
236 	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET +
237 			xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
238 
239 	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
240 
241 	return 0;
242 }
243 
244 /**
245  * xgpio_save_regs - Set initial values of GPIO pins
246  * @mm_gc: Pointer to memory mapped GPIO chip structure
247  */
248 static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
249 {
250 	struct xgpio_instance *chip =
251 		container_of(mm_gc, struct xgpio_instance, mmchip);
252 
253 	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET,	chip->gpio_state[0]);
254 	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
255 
256 	if (!chip->gpio_width[1])
257 		return;
258 
259 	xgpio_writereg(mm_gc->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
260 		       chip->gpio_state[1]);
261 	xgpio_writereg(mm_gc->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
262 		       chip->gpio_dir[1]);
263 }
264 
265 /**
266  * xgpio_remove - Remove method for the GPIO device.
267  * @pdev: pointer to the platform device
268  *
269  * This function remove gpiochips and frees all the allocated resources.
270  *
271  * Return: 0 always
272  */
273 static int xgpio_remove(struct platform_device *pdev)
274 {
275 	struct xgpio_instance *chip = platform_get_drvdata(pdev);
276 
277 	of_mm_gpiochip_remove(&chip->mmchip);
278 
279 	return 0;
280 }
281 
282 /**
283  * xgpio_of_probe - Probe method for the GPIO device.
284  * @pdev: pointer to the platform device
285  *
286  * Return:
287  * It returns 0, if the driver is bound to the GPIO device, or
288  * a negative value if there is an error.
289  */
290 static int xgpio_probe(struct platform_device *pdev)
291 {
292 	struct xgpio_instance *chip;
293 	int status = 0;
294 	struct device_node *np = pdev->dev.of_node;
295 	u32 is_dual;
296 
297 	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
298 	if (!chip)
299 		return -ENOMEM;
300 
301 	platform_set_drvdata(pdev, chip);
302 
303 	/* Update GPIO state shadow register with default value */
304 	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]);
305 
306 	/* Update GPIO direction shadow register with default value */
307 	if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0]))
308 		chip->gpio_dir[0] = 0xFFFFFFFF;
309 
310 	/*
311 	 * Check device node and parent device node for device width
312 	 * and assume default width of 32
313 	 */
314 	if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
315 		chip->gpio_width[0] = 32;
316 
317 	spin_lock_init(&chip->gpio_lock[0]);
318 
319 	if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
320 		is_dual = 0;
321 
322 	if (is_dual) {
323 		/* Update GPIO state shadow register with default value */
324 		of_property_read_u32(np, "xlnx,dout-default-2",
325 				     &chip->gpio_state[1]);
326 
327 		/* Update GPIO direction shadow register with default value */
328 		if (of_property_read_u32(np, "xlnx,tri-default-2",
329 					 &chip->gpio_dir[1]))
330 			chip->gpio_dir[1] = 0xFFFFFFFF;
331 
332 		/*
333 		 * Check device node and parent device node for device width
334 		 * and assume default width of 32
335 		 */
336 		if (of_property_read_u32(np, "xlnx,gpio2-width",
337 					 &chip->gpio_width[1]))
338 			chip->gpio_width[1] = 32;
339 
340 		spin_lock_init(&chip->gpio_lock[1]);
341 	}
342 
343 	chip->mmchip.gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
344 	chip->mmchip.gc.parent = &pdev->dev;
345 	chip->mmchip.gc.direction_input = xgpio_dir_in;
346 	chip->mmchip.gc.direction_output = xgpio_dir_out;
347 	chip->mmchip.gc.get = xgpio_get;
348 	chip->mmchip.gc.set = xgpio_set;
349 	chip->mmchip.gc.set_multiple = xgpio_set_multiple;
350 
351 	chip->mmchip.save_regs = xgpio_save_regs;
352 
353 	/* Call the OF gpio helper to setup and register the GPIO device */
354 	status = of_mm_gpiochip_add_data(np, &chip->mmchip, chip);
355 	if (status) {
356 		pr_err("%pOF: error in probe function with status %d\n",
357 		       np, status);
358 		return status;
359 	}
360 
361 	return 0;
362 }
363 
364 static const struct of_device_id xgpio_of_match[] = {
365 	{ .compatible = "xlnx,xps-gpio-1.00.a", },
366 	{ /* end of list */ },
367 };
368 
369 MODULE_DEVICE_TABLE(of, xgpio_of_match);
370 
371 static struct platform_driver xgpio_plat_driver = {
372 	.probe		= xgpio_probe,
373 	.remove		= xgpio_remove,
374 	.driver		= {
375 			.name = "gpio-xilinx",
376 			.of_match_table	= xgpio_of_match,
377 	},
378 };
379 
380 static int __init xgpio_init(void)
381 {
382 	return platform_driver_register(&xgpio_plat_driver);
383 }
384 
385 subsys_initcall(xgpio_init);
386 
387 static void __exit xgpio_exit(void)
388 {
389 	platform_driver_unregister(&xgpio_plat_driver);
390 }
391 module_exit(xgpio_exit);
392 
393 MODULE_AUTHOR("Xilinx, Inc.");
394 MODULE_DESCRIPTION("Xilinx GPIO driver");
395 MODULE_LICENSE("GPL");
396