xref: /linux/drivers/gpio/gpio-spear-spics.c (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * SPEAr platform SPI chipselect abstraction over gpiolib
3  *
4  * Copyright (C) 2012 ST Microelectronics
5  * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
6  *
7  * This file is licensed under the terms of the GNU General Public
8  * License version 2. This program is licensed "as is" without any
9  * warranty of any kind, whether express or implied.
10  */
11 
12 #include <linux/err.h>
13 #include <linux/gpio.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/platform_device.h>
18 #include <linux/types.h>
19 
20 /* maximum chipselects */
21 #define NUM_OF_GPIO	4
22 
23 /*
24  * Provision is available on some SPEAr SoCs to control ARM PL022 spi cs
25  * through system registers. This register lies outside spi (pl022)
26  * address space into system registers.
27  *
28  * It provides control for spi chip select lines so that any chipselect
29  * (out of 4 possible chipselects in pl022) can be made low to select
30  * the particular slave.
31  */
32 
33 /**
34  * struct spear_spics - represents spi chip select control
35  * @base: base address
36  * @perip_cfg: configuration register
37  * @sw_enable_bit: bit to enable s/w control over chipselects
38  * @cs_value_bit: bit to program high or low chipselect
39  * @cs_enable_mask: mask to select bits required to select chipselect
40  * @cs_enable_shift: bit pos of cs_enable_mask
41  * @use_count: use count of a spi controller cs lines
42  * @last_off: stores last offset caller of set_value()
43  * @chip: gpio_chip abstraction
44  */
45 struct spear_spics {
46 	void __iomem		*base;
47 	u32			perip_cfg;
48 	u32			sw_enable_bit;
49 	u32			cs_value_bit;
50 	u32			cs_enable_mask;
51 	u32			cs_enable_shift;
52 	unsigned long		use_count;
53 	int			last_off;
54 	struct gpio_chip	chip;
55 };
56 
57 /* gpio framework specific routines */
58 static int spics_get_value(struct gpio_chip *chip, unsigned offset)
59 {
60 	return -ENXIO;
61 }
62 
63 static void spics_set_value(struct gpio_chip *chip, unsigned offset, int value)
64 {
65 	struct spear_spics *spics = container_of(chip, struct spear_spics,
66 			chip);
67 	u32 tmp;
68 
69 	/* select chip select from register */
70 	tmp = readl_relaxed(spics->base + spics->perip_cfg);
71 	if (spics->last_off != offset) {
72 		spics->last_off = offset;
73 		tmp &= ~(spics->cs_enable_mask << spics->cs_enable_shift);
74 		tmp |= offset << spics->cs_enable_shift;
75 	}
76 
77 	/* toggle chip select line */
78 	tmp &= ~(0x1 << spics->cs_value_bit);
79 	tmp |= value << spics->cs_value_bit;
80 	writel_relaxed(tmp, spics->base + spics->perip_cfg);
81 }
82 
83 static int spics_direction_input(struct gpio_chip *chip, unsigned offset)
84 {
85 	return -ENXIO;
86 }
87 
88 static int spics_direction_output(struct gpio_chip *chip, unsigned offset,
89 		int value)
90 {
91 	spics_set_value(chip, offset, value);
92 	return 0;
93 }
94 
95 static int spics_request(struct gpio_chip *chip, unsigned offset)
96 {
97 	struct spear_spics *spics = container_of(chip, struct spear_spics,
98 			chip);
99 	u32 tmp;
100 
101 	if (!spics->use_count++) {
102 		tmp = readl_relaxed(spics->base + spics->perip_cfg);
103 		tmp |= 0x1 << spics->sw_enable_bit;
104 		tmp |= 0x1 << spics->cs_value_bit;
105 		writel_relaxed(tmp, spics->base + spics->perip_cfg);
106 	}
107 
108 	return 0;
109 }
110 
111 static void spics_free(struct gpio_chip *chip, unsigned offset)
112 {
113 	struct spear_spics *spics = container_of(chip, struct spear_spics,
114 			chip);
115 	u32 tmp;
116 
117 	if (!--spics->use_count) {
118 		tmp = readl_relaxed(spics->base + spics->perip_cfg);
119 		tmp &= ~(0x1 << spics->sw_enable_bit);
120 		writel_relaxed(tmp, spics->base + spics->perip_cfg);
121 	}
122 }
123 
124 static int spics_gpio_probe(struct platform_device *pdev)
125 {
126 	struct device_node *np = pdev->dev.of_node;
127 	struct spear_spics *spics;
128 	struct resource *res;
129 	int ret;
130 
131 	spics = devm_kzalloc(&pdev->dev, sizeof(*spics), GFP_KERNEL);
132 	if (!spics)
133 		return -ENOMEM;
134 
135 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
136 	spics->base = devm_ioremap_resource(&pdev->dev, res);
137 	if (IS_ERR(spics->base))
138 		return PTR_ERR(spics->base);
139 
140 	if (of_property_read_u32(np, "st-spics,peripcfg-reg",
141 				&spics->perip_cfg))
142 		goto err_dt_data;
143 	if (of_property_read_u32(np, "st-spics,sw-enable-bit",
144 				&spics->sw_enable_bit))
145 		goto err_dt_data;
146 	if (of_property_read_u32(np, "st-spics,cs-value-bit",
147 				&spics->cs_value_bit))
148 		goto err_dt_data;
149 	if (of_property_read_u32(np, "st-spics,cs-enable-mask",
150 				&spics->cs_enable_mask))
151 		goto err_dt_data;
152 	if (of_property_read_u32(np, "st-spics,cs-enable-shift",
153 				&spics->cs_enable_shift))
154 		goto err_dt_data;
155 
156 	platform_set_drvdata(pdev, spics);
157 
158 	spics->chip.ngpio = NUM_OF_GPIO;
159 	spics->chip.base = -1;
160 	spics->chip.request = spics_request;
161 	spics->chip.free = spics_free;
162 	spics->chip.direction_input = spics_direction_input;
163 	spics->chip.direction_output = spics_direction_output;
164 	spics->chip.get = spics_get_value;
165 	spics->chip.set = spics_set_value;
166 	spics->chip.label = dev_name(&pdev->dev);
167 	spics->chip.dev = &pdev->dev;
168 	spics->chip.owner = THIS_MODULE;
169 	spics->last_off = -1;
170 
171 	ret = gpiochip_add(&spics->chip);
172 	if (ret) {
173 		dev_err(&pdev->dev, "unable to add gpio chip\n");
174 		return ret;
175 	}
176 
177 	dev_info(&pdev->dev, "spear spics registered\n");
178 	return 0;
179 
180 err_dt_data:
181 	dev_err(&pdev->dev, "DT probe failed\n");
182 	return -EINVAL;
183 }
184 
185 static const struct of_device_id spics_gpio_of_match[] = {
186 	{ .compatible = "st,spear-spics-gpio" },
187 	{}
188 };
189 MODULE_DEVICE_TABLE(of, spics_gpio_of_match);
190 
191 static struct platform_driver spics_gpio_driver = {
192 	.probe = spics_gpio_probe,
193 	.driver = {
194 		.name = "spear-spics-gpio",
195 		.of_match_table = spics_gpio_of_match,
196 	},
197 };
198 
199 static int __init spics_gpio_init(void)
200 {
201 	return platform_driver_register(&spics_gpio_driver);
202 }
203 subsys_initcall(spics_gpio_init);
204 
205 MODULE_AUTHOR("Shiraz Hashim <shiraz.linux.kernel@gmail.com>");
206 MODULE_DESCRIPTION("STMicroelectronics SPEAr SPI Chip Select Abstraction");
207 MODULE_LICENSE("GPL");
208