1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/ 4 * Andrew Davis <afd@ti.com> 5 */ 6 7 #include <linux/bitmap.h> 8 #include <linux/bitops.h> 9 #include <linux/delay.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/gpio/driver.h> 12 #include <linux/module.h> 13 #include <linux/mutex.h> 14 #include <linux/spi/spi.h> 15 16 #define DEFAULT_NGPIO 8 17 18 /** 19 * struct pisosr_gpio - GPIO driver data 20 * @chip: GPIO controller chip 21 * @spi: SPI device pointer 22 * @buffer: Buffer for device reads 23 * @buffer_size: Size of buffer 24 * @load_gpio: GPIO pin used to load input into device 25 * @lock: Protects read sequences 26 */ 27 struct pisosr_gpio { 28 struct gpio_chip chip; 29 struct spi_device *spi; 30 u8 *buffer; 31 size_t buffer_size; 32 struct gpio_desc *load_gpio; 33 struct mutex lock; 34 }; 35 36 static int pisosr_gpio_refresh(struct pisosr_gpio *gpio) 37 { 38 int ret; 39 40 mutex_lock(&gpio->lock); 41 42 if (gpio->load_gpio) { 43 gpiod_set_value_cansleep(gpio->load_gpio, 1); 44 udelay(1); /* registers load time (~10ns) */ 45 gpiod_set_value_cansleep(gpio->load_gpio, 0); 46 udelay(1); /* registers recovery time (~5ns) */ 47 } 48 49 ret = spi_read(gpio->spi, gpio->buffer, gpio->buffer_size); 50 51 mutex_unlock(&gpio->lock); 52 53 return ret; 54 } 55 56 static int pisosr_gpio_get_direction(struct gpio_chip *chip, 57 unsigned offset) 58 { 59 /* This device always input */ 60 return GPIO_LINE_DIRECTION_IN; 61 } 62 63 static int pisosr_gpio_direction_input(struct gpio_chip *chip, 64 unsigned offset) 65 { 66 /* This device always input */ 67 return 0; 68 } 69 70 static int pisosr_gpio_get(struct gpio_chip *chip, unsigned offset) 71 { 72 struct pisosr_gpio *gpio = gpiochip_get_data(chip); 73 74 /* Refresh may not always be needed */ 75 pisosr_gpio_refresh(gpio); 76 77 return (gpio->buffer[offset / 8] >> (offset % 8)) & 0x1; 78 } 79 80 static int pisosr_gpio_get_multiple(struct gpio_chip *chip, 81 unsigned long *mask, unsigned long *bits) 82 { 83 struct pisosr_gpio *gpio = gpiochip_get_data(chip); 84 unsigned long offset; 85 unsigned long gpio_mask; 86 unsigned long buffer_state; 87 88 pisosr_gpio_refresh(gpio); 89 90 bitmap_zero(bits, chip->ngpio); 91 for_each_set_clump8(offset, gpio_mask, mask, chip->ngpio) { 92 buffer_state = gpio->buffer[offset / 8] & gpio_mask; 93 bitmap_set_value8(bits, buffer_state, offset); 94 } 95 96 return 0; 97 } 98 99 static const struct gpio_chip template_chip = { 100 .label = "pisosr-gpio", 101 .owner = THIS_MODULE, 102 .get_direction = pisosr_gpio_get_direction, 103 .direction_input = pisosr_gpio_direction_input, 104 .get = pisosr_gpio_get, 105 .get_multiple = pisosr_gpio_get_multiple, 106 .base = -1, 107 .ngpio = DEFAULT_NGPIO, 108 .can_sleep = true, 109 }; 110 111 static void pisosr_mutex_destroy(void *lock) 112 { 113 mutex_destroy(lock); 114 } 115 116 static int pisosr_gpio_probe(struct spi_device *spi) 117 { 118 struct device *dev = &spi->dev; 119 struct pisosr_gpio *gpio; 120 int ret; 121 122 gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL); 123 if (!gpio) 124 return -ENOMEM; 125 126 gpio->chip = template_chip; 127 gpio->chip.parent = dev; 128 of_property_read_u16(dev->of_node, "ngpios", &gpio->chip.ngpio); 129 130 gpio->spi = spi; 131 132 gpio->buffer_size = DIV_ROUND_UP(gpio->chip.ngpio, 8); 133 gpio->buffer = devm_kzalloc(dev, gpio->buffer_size, GFP_KERNEL); 134 if (!gpio->buffer) 135 return -ENOMEM; 136 137 gpio->load_gpio = devm_gpiod_get_optional(dev, "load", GPIOD_OUT_LOW); 138 if (IS_ERR(gpio->load_gpio)) 139 return dev_err_probe(dev, PTR_ERR(gpio->load_gpio), 140 "Unable to allocate load GPIO\n"); 141 142 mutex_init(&gpio->lock); 143 ret = devm_add_action_or_reset(dev, pisosr_mutex_destroy, &gpio->lock); 144 if (ret) 145 return ret; 146 147 ret = devm_gpiochip_add_data(dev, &gpio->chip, gpio); 148 if (ret < 0) { 149 dev_err(dev, "Unable to register gpiochip\n"); 150 return ret; 151 } 152 153 return 0; 154 } 155 156 static const struct spi_device_id pisosr_gpio_id_table[] = { 157 { "pisosr-gpio", }, 158 { /* sentinel */ } 159 }; 160 MODULE_DEVICE_TABLE(spi, pisosr_gpio_id_table); 161 162 static const struct of_device_id pisosr_gpio_of_match_table[] = { 163 { .compatible = "pisosr-gpio", }, 164 { /* sentinel */ } 165 }; 166 MODULE_DEVICE_TABLE(of, pisosr_gpio_of_match_table); 167 168 static struct spi_driver pisosr_gpio_driver = { 169 .driver = { 170 .name = "pisosr-gpio", 171 .of_match_table = pisosr_gpio_of_match_table, 172 }, 173 .probe = pisosr_gpio_probe, 174 .id_table = pisosr_gpio_id_table, 175 }; 176 module_spi_driver(pisosr_gpio_driver); 177 178 MODULE_AUTHOR("Andrew Davis <afd@ti.com>"); 179 MODULE_DESCRIPTION("SPI Compatible PISO Shift Register GPIO Driver"); 180 MODULE_LICENSE("GPL v2"); 181