1 /* 2 * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; version 2 of the License. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program; if not, write to the Free Software 15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. 16 */ 17 #include <linux/kernel.h> 18 #include <linux/pci.h> 19 #include <linux/gpio.h> 20 21 #define PCH_GPIO_ALL_PINS 0xfff /* Mask for GPIO pins 0 to 11 */ 22 #define GPIO_NUM_PINS 12 /* Specifies number of GPIO PINS GPIO0-GPIO11 */ 23 24 struct pch_regs { 25 u32 ien; 26 u32 istatus; 27 u32 idisp; 28 u32 iclr; 29 u32 imask; 30 u32 imaskclr; 31 u32 po; 32 u32 pi; 33 u32 pm; 34 u32 im0; 35 u32 im1; 36 u32 reserved[4]; 37 u32 reset; 38 }; 39 40 /** 41 * struct pch_gpio_reg_data - The register store data. 42 * @po_reg: To store contents of PO register. 43 * @pm_reg: To store contents of PM register. 44 */ 45 struct pch_gpio_reg_data { 46 u32 po_reg; 47 u32 pm_reg; 48 }; 49 50 /** 51 * struct pch_gpio - GPIO private data structure. 52 * @base: PCI base address of Memory mapped I/O register. 53 * @reg: Memory mapped PCH GPIO register list. 54 * @dev: Pointer to device structure. 55 * @gpio: Data for GPIO infrastructure. 56 * @pch_gpio_reg: Memory mapped Register data is saved here 57 * when suspend. 58 * @spinlock: Used for register access protection in 59 * interrupt context pch_irq_mask, 60 * pch_irq_unmask and pch_irq_type; 61 */ 62 struct pch_gpio { 63 void __iomem *base; 64 struct pch_regs __iomem *reg; 65 struct device *dev; 66 struct gpio_chip gpio; 67 struct pch_gpio_reg_data pch_gpio_reg; 68 struct mutex lock; 69 spinlock_t spinlock; 70 }; 71 72 static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) 73 { 74 u32 reg_val; 75 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 76 77 mutex_lock(&chip->lock); 78 reg_val = ioread32(&chip->reg->po); 79 if (val) 80 reg_val |= (1 << nr); 81 else 82 reg_val &= ~(1 << nr); 83 84 iowrite32(reg_val, &chip->reg->po); 85 mutex_unlock(&chip->lock); 86 } 87 88 static int pch_gpio_get(struct gpio_chip *gpio, unsigned nr) 89 { 90 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 91 92 return ioread32(&chip->reg->pi) & (1 << nr); 93 } 94 95 static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, 96 int val) 97 { 98 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 99 u32 pm; 100 u32 reg_val; 101 102 mutex_lock(&chip->lock); 103 pm = ioread32(&chip->reg->pm) & PCH_GPIO_ALL_PINS; 104 pm |= (1 << nr); 105 iowrite32(pm, &chip->reg->pm); 106 107 reg_val = ioread32(&chip->reg->po); 108 if (val) 109 reg_val |= (1 << nr); 110 else 111 reg_val &= ~(1 << nr); 112 iowrite32(reg_val, &chip->reg->po); 113 114 mutex_unlock(&chip->lock); 115 116 return 0; 117 } 118 119 static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) 120 { 121 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 122 u32 pm; 123 124 mutex_lock(&chip->lock); 125 pm = ioread32(&chip->reg->pm) & PCH_GPIO_ALL_PINS; /*bits 0-11*/ 126 pm &= ~(1 << nr); 127 iowrite32(pm, &chip->reg->pm); 128 mutex_unlock(&chip->lock); 129 130 return 0; 131 } 132 133 /* 134 * Save register configuration and disable interrupts. 135 */ 136 static void pch_gpio_save_reg_conf(struct pch_gpio *chip) 137 { 138 chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po); 139 chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm); 140 } 141 142 /* 143 * This function restores the register configuration of the GPIO device. 144 */ 145 static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) 146 { 147 /* to store contents of PO register */ 148 iowrite32(chip->pch_gpio_reg.po_reg, &chip->reg->po); 149 /* to store contents of PM register */ 150 iowrite32(chip->pch_gpio_reg.pm_reg, &chip->reg->pm); 151 } 152 153 static void pch_gpio_setup(struct pch_gpio *chip) 154 { 155 struct gpio_chip *gpio = &chip->gpio; 156 157 gpio->label = dev_name(chip->dev); 158 gpio->owner = THIS_MODULE; 159 gpio->direction_input = pch_gpio_direction_input; 160 gpio->get = pch_gpio_get; 161 gpio->direction_output = pch_gpio_direction_output; 162 gpio->set = pch_gpio_set; 163 gpio->dbg_show = NULL; 164 gpio->base = -1; 165 gpio->ngpio = GPIO_NUM_PINS; 166 gpio->can_sleep = 0; 167 } 168 169 static int __devinit pch_gpio_probe(struct pci_dev *pdev, 170 const struct pci_device_id *id) 171 { 172 s32 ret; 173 struct pch_gpio *chip; 174 175 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 176 if (chip == NULL) 177 return -ENOMEM; 178 179 chip->dev = &pdev->dev; 180 ret = pci_enable_device(pdev); 181 if (ret) { 182 dev_err(&pdev->dev, "%s : pci_enable_device FAILED", __func__); 183 goto err_pci_enable; 184 } 185 186 ret = pci_request_regions(pdev, KBUILD_MODNAME); 187 if (ret) { 188 dev_err(&pdev->dev, "pci_request_regions FAILED-%d", ret); 189 goto err_request_regions; 190 } 191 192 chip->base = pci_iomap(pdev, 1, 0); 193 if (chip->base == 0) { 194 dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__); 195 ret = -ENOMEM; 196 goto err_iomap; 197 } 198 199 chip->reg = chip->base; 200 pci_set_drvdata(pdev, chip); 201 mutex_init(&chip->lock); 202 pch_gpio_setup(chip); 203 ret = gpiochip_add(&chip->gpio); 204 if (ret) { 205 dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n"); 206 goto err_gpiochip_add; 207 } 208 209 return 0; 210 211 err_gpiochip_add: 212 pci_iounmap(pdev, chip->base); 213 214 err_iomap: 215 pci_release_regions(pdev); 216 217 err_request_regions: 218 pci_disable_device(pdev); 219 220 err_pci_enable: 221 kfree(chip); 222 dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret); 223 return ret; 224 } 225 226 static void __devexit pch_gpio_remove(struct pci_dev *pdev) 227 { 228 int err; 229 struct pch_gpio *chip = pci_get_drvdata(pdev); 230 231 err = gpiochip_remove(&chip->gpio); 232 if (err) 233 dev_err(&pdev->dev, "Failed gpiochip_remove\n"); 234 235 pci_iounmap(pdev, chip->base); 236 pci_release_regions(pdev); 237 pci_disable_device(pdev); 238 kfree(chip); 239 } 240 241 #ifdef CONFIG_PM 242 static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state) 243 { 244 s32 ret; 245 struct pch_gpio *chip = pci_get_drvdata(pdev); 246 unsigned long flags; 247 248 spin_lock_irqsave(&chip->spinlock, flags); 249 pch_gpio_save_reg_conf(chip); 250 spin_unlock_irqrestore(&chip->spinlock, flags); 251 252 ret = pci_save_state(pdev); 253 if (ret) { 254 dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); 255 return ret; 256 } 257 pci_disable_device(pdev); 258 pci_set_power_state(pdev, PCI_D0); 259 ret = pci_enable_wake(pdev, PCI_D0, 1); 260 if (ret) 261 dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); 262 263 return 0; 264 } 265 266 static int pch_gpio_resume(struct pci_dev *pdev) 267 { 268 s32 ret; 269 struct pch_gpio *chip = pci_get_drvdata(pdev); 270 unsigned long flags; 271 272 ret = pci_enable_wake(pdev, PCI_D0, 0); 273 274 pci_set_power_state(pdev, PCI_D0); 275 ret = pci_enable_device(pdev); 276 if (ret) { 277 dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); 278 return ret; 279 } 280 pci_restore_state(pdev); 281 282 spin_lock_irqsave(&chip->spinlock, flags); 283 iowrite32(0x01, &chip->reg->reset); 284 iowrite32(0x00, &chip->reg->reset); 285 pch_gpio_restore_reg_conf(chip); 286 spin_unlock_irqrestore(&chip->spinlock, flags); 287 288 return 0; 289 } 290 #else 291 #define pch_gpio_suspend NULL 292 #define pch_gpio_resume NULL 293 #endif 294 295 #define PCI_VENDOR_ID_ROHM 0x10DB 296 static DEFINE_PCI_DEVICE_TABLE(pch_gpio_pcidev_id) = { 297 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8803) }, 298 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8014) }, 299 { 0, } 300 }; 301 MODULE_DEVICE_TABLE(pci, pch_gpio_pcidev_id); 302 303 static struct pci_driver pch_gpio_driver = { 304 .name = "pch_gpio", 305 .id_table = pch_gpio_pcidev_id, 306 .probe = pch_gpio_probe, 307 .remove = __devexit_p(pch_gpio_remove), 308 .suspend = pch_gpio_suspend, 309 .resume = pch_gpio_resume 310 }; 311 312 static int __init pch_gpio_pci_init(void) 313 { 314 return pci_register_driver(&pch_gpio_driver); 315 } 316 module_init(pch_gpio_pci_init); 317 318 static void __exit pch_gpio_pci_exit(void) 319 { 320 pci_unregister_driver(&pch_gpio_driver); 321 } 322 module_exit(pch_gpio_pci_exit); 323 324 MODULE_DESCRIPTION("PCH GPIO PCI Driver"); 325 MODULE_LICENSE("GPL"); 326