1 /* 2 * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; version 2 of the License. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program; if not, write to the Free Software 15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. 16 */ 17 #include <linux/kernel.h> 18 #include <linux/pci.h> 19 #include <linux/gpio.h> 20 21 #define PCH_GPIO_ALL_PINS 0xfff /* Mask for GPIO pins 0 to 11 */ 22 #define GPIO_NUM_PINS 12 /* Specifies number of GPIO PINS GPIO0-GPIO11 */ 23 24 struct pch_regs { 25 u32 ien; 26 u32 istatus; 27 u32 idisp; 28 u32 iclr; 29 u32 imask; 30 u32 imaskclr; 31 u32 po; 32 u32 pi; 33 u32 pm; 34 u32 im0; 35 u32 im1; 36 u32 reserved[4]; 37 u32 reset; 38 }; 39 40 /** 41 * struct pch_gpio_reg_data - The register store data. 42 * @po_reg: To store contents of PO register. 43 * @pm_reg: To store contents of PM register. 44 */ 45 struct pch_gpio_reg_data { 46 u32 po_reg; 47 u32 pm_reg; 48 }; 49 50 /** 51 * struct pch_gpio - GPIO private data structure. 52 * @base: PCI base address of Memory mapped I/O register. 53 * @reg: Memory mapped PCH GPIO register list. 54 * @dev: Pointer to device structure. 55 * @gpio: Data for GPIO infrastructure. 56 * @pch_gpio_reg: Memory mapped Register data is saved here 57 * when suspend. 58 */ 59 struct pch_gpio { 60 void __iomem *base; 61 struct pch_regs __iomem *reg; 62 struct device *dev; 63 struct gpio_chip gpio; 64 struct pch_gpio_reg_data pch_gpio_reg; 65 struct mutex lock; 66 }; 67 68 static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) 69 { 70 u32 reg_val; 71 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 72 73 mutex_lock(&chip->lock); 74 reg_val = ioread32(&chip->reg->po); 75 if (val) 76 reg_val |= (1 << nr); 77 else 78 reg_val &= ~(1 << nr); 79 80 iowrite32(reg_val, &chip->reg->po); 81 mutex_unlock(&chip->lock); 82 } 83 84 static int pch_gpio_get(struct gpio_chip *gpio, unsigned nr) 85 { 86 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 87 88 return ioread32(&chip->reg->pi) & (1 << nr); 89 } 90 91 static int pch_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, 92 int val) 93 { 94 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 95 u32 pm; 96 u32 reg_val; 97 98 mutex_lock(&chip->lock); 99 pm = ioread32(&chip->reg->pm) & PCH_GPIO_ALL_PINS; 100 pm |= (1 << nr); 101 iowrite32(pm, &chip->reg->pm); 102 103 reg_val = ioread32(&chip->reg->po); 104 if (val) 105 reg_val |= (1 << nr); 106 else 107 reg_val &= ~(1 << nr); 108 iowrite32(reg_val, &chip->reg->po); 109 110 mutex_unlock(&chip->lock); 111 112 return 0; 113 } 114 115 static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) 116 { 117 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); 118 u32 pm; 119 120 mutex_lock(&chip->lock); 121 pm = ioread32(&chip->reg->pm) & PCH_GPIO_ALL_PINS; /*bits 0-11*/ 122 pm &= ~(1 << nr); 123 iowrite32(pm, &chip->reg->pm); 124 mutex_unlock(&chip->lock); 125 126 return 0; 127 } 128 129 /* 130 * Save register configuration and disable interrupts. 131 */ 132 static void pch_gpio_save_reg_conf(struct pch_gpio *chip) 133 { 134 chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po); 135 chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm); 136 } 137 138 /* 139 * This function restores the register configuration of the GPIO device. 140 */ 141 static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) 142 { 143 /* to store contents of PO register */ 144 iowrite32(chip->pch_gpio_reg.po_reg, &chip->reg->po); 145 /* to store contents of PM register */ 146 iowrite32(chip->pch_gpio_reg.pm_reg, &chip->reg->pm); 147 } 148 149 static void pch_gpio_setup(struct pch_gpio *chip) 150 { 151 struct gpio_chip *gpio = &chip->gpio; 152 153 gpio->label = dev_name(chip->dev); 154 gpio->owner = THIS_MODULE; 155 gpio->direction_input = pch_gpio_direction_input; 156 gpio->get = pch_gpio_get; 157 gpio->direction_output = pch_gpio_direction_output; 158 gpio->set = pch_gpio_set; 159 gpio->dbg_show = NULL; 160 gpio->base = -1; 161 gpio->ngpio = GPIO_NUM_PINS; 162 gpio->can_sleep = 0; 163 } 164 165 static int __devinit pch_gpio_probe(struct pci_dev *pdev, 166 const struct pci_device_id *id) 167 { 168 s32 ret; 169 struct pch_gpio *chip; 170 171 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 172 if (chip == NULL) 173 return -ENOMEM; 174 175 chip->dev = &pdev->dev; 176 ret = pci_enable_device(pdev); 177 if (ret) { 178 dev_err(&pdev->dev, "%s : pci_enable_device FAILED", __func__); 179 goto err_pci_enable; 180 } 181 182 ret = pci_request_regions(pdev, KBUILD_MODNAME); 183 if (ret) { 184 dev_err(&pdev->dev, "pci_request_regions FAILED-%d", ret); 185 goto err_request_regions; 186 } 187 188 chip->base = pci_iomap(pdev, 1, 0); 189 if (chip->base == 0) { 190 dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__); 191 ret = -ENOMEM; 192 goto err_iomap; 193 } 194 195 chip->reg = chip->base; 196 pci_set_drvdata(pdev, chip); 197 mutex_init(&chip->lock); 198 pch_gpio_setup(chip); 199 ret = gpiochip_add(&chip->gpio); 200 if (ret) { 201 dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n"); 202 goto err_gpiochip_add; 203 } 204 205 return 0; 206 207 err_gpiochip_add: 208 pci_iounmap(pdev, chip->base); 209 210 err_iomap: 211 pci_release_regions(pdev); 212 213 err_request_regions: 214 pci_disable_device(pdev); 215 216 err_pci_enable: 217 kfree(chip); 218 dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret); 219 return ret; 220 } 221 222 static void __devexit pch_gpio_remove(struct pci_dev *pdev) 223 { 224 int err; 225 struct pch_gpio *chip = pci_get_drvdata(pdev); 226 227 err = gpiochip_remove(&chip->gpio); 228 if (err) 229 dev_err(&pdev->dev, "Failed gpiochip_remove\n"); 230 231 pci_iounmap(pdev, chip->base); 232 pci_release_regions(pdev); 233 pci_disable_device(pdev); 234 kfree(chip); 235 } 236 237 #ifdef CONFIG_PM 238 static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state) 239 { 240 s32 ret; 241 struct pch_gpio *chip = pci_get_drvdata(pdev); 242 243 pch_gpio_save_reg_conf(chip); 244 245 ret = pci_save_state(pdev); 246 if (ret) { 247 dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); 248 return ret; 249 } 250 pci_disable_device(pdev); 251 pci_set_power_state(pdev, PCI_D0); 252 ret = pci_enable_wake(pdev, PCI_D0, 1); 253 if (ret) 254 dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); 255 256 return 0; 257 } 258 259 static int pch_gpio_resume(struct pci_dev *pdev) 260 { 261 s32 ret; 262 struct pch_gpio *chip = pci_get_drvdata(pdev); 263 264 ret = pci_enable_wake(pdev, PCI_D0, 0); 265 266 pci_set_power_state(pdev, PCI_D0); 267 ret = pci_enable_device(pdev); 268 if (ret) { 269 dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); 270 return ret; 271 } 272 pci_restore_state(pdev); 273 274 iowrite32(0x01, &chip->reg->reset); 275 iowrite32(0x00, &chip->reg->reset); 276 pch_gpio_restore_reg_conf(chip); 277 278 return 0; 279 } 280 #else 281 #define pch_gpio_suspend NULL 282 #define pch_gpio_resume NULL 283 #endif 284 285 #define PCI_VENDOR_ID_ROHM 0x10DB 286 static DEFINE_PCI_DEVICE_TABLE(pch_gpio_pcidev_id) = { 287 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8803) }, 288 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8014) }, 289 { 0, } 290 }; 291 MODULE_DEVICE_TABLE(pci, pch_gpio_pcidev_id); 292 293 static struct pci_driver pch_gpio_driver = { 294 .name = "pch_gpio", 295 .id_table = pch_gpio_pcidev_id, 296 .probe = pch_gpio_probe, 297 .remove = __devexit_p(pch_gpio_remove), 298 .suspend = pch_gpio_suspend, 299 .resume = pch_gpio_resume 300 }; 301 302 static int __init pch_gpio_pci_init(void) 303 { 304 return pci_register_driver(&pch_gpio_driver); 305 } 306 module_init(pch_gpio_pci_init); 307 308 static void __exit pch_gpio_pci_exit(void) 309 { 310 pci_unregister_driver(&pch_gpio_driver); 311 } 312 module_exit(pch_gpio_pci_exit); 313 314 MODULE_DESCRIPTION("PCH GPIO PCI Driver"); 315 MODULE_LICENSE("GPL"); 316