1 /* 2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders 3 * 4 * Copyright (C) 2007 David Brownell 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 21 #include <linux/gpio.h> 22 #include <linux/i2c.h> 23 #include <linux/i2c/pcf857x.h> 24 #include <linux/interrupt.h> 25 #include <linux/irq.h> 26 #include <linux/irqdomain.h> 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/of.h> 30 #include <linux/of_device.h> 31 #include <linux/slab.h> 32 #include <linux/spinlock.h> 33 34 35 static const struct i2c_device_id pcf857x_id[] = { 36 { "pcf8574", 8 }, 37 { "pcf8574a", 8 }, 38 { "pca8574", 8 }, 39 { "pca9670", 8 }, 40 { "pca9672", 8 }, 41 { "pca9674", 8 }, 42 { "pcf8575", 16 }, 43 { "pca8575", 16 }, 44 { "pca9671", 16 }, 45 { "pca9673", 16 }, 46 { "pca9675", 16 }, 47 { "max7328", 8 }, 48 { "max7329", 8 }, 49 { "tca9554", 8 }, 50 { } 51 }; 52 MODULE_DEVICE_TABLE(i2c, pcf857x_id); 53 54 #ifdef CONFIG_OF 55 static const struct of_device_id pcf857x_of_table[] = { 56 { .compatible = "nxp,pcf8574" }, 57 { .compatible = "nxp,pcf8574a" }, 58 { .compatible = "nxp,pca8574" }, 59 { .compatible = "nxp,pca9670" }, 60 { .compatible = "nxp,pca9672" }, 61 { .compatible = "nxp,pca9674" }, 62 { .compatible = "nxp,pcf8575" }, 63 { .compatible = "nxp,pca8575" }, 64 { .compatible = "nxp,pca9671" }, 65 { .compatible = "nxp,pca9673" }, 66 { .compatible = "nxp,pca9675" }, 67 { .compatible = "maxim,max7328" }, 68 { .compatible = "maxim,max7329" }, 69 { .compatible = "ti,tca9554" }, 70 { } 71 }; 72 MODULE_DEVICE_TABLE(of, pcf857x_of_table); 73 #endif 74 75 /* 76 * The pcf857x, pca857x, and pca967x chips only expose one read and one 77 * write register. Writing a "one" bit (to match the reset state) lets 78 * that pin be used as an input; it's not an open-drain model, but acts 79 * a bit like one. This is described as "quasi-bidirectional"; read the 80 * chip documentation for details. 81 * 82 * Many other I2C GPIO expander chips (like the pca953x models) have 83 * more complex register models and more conventional circuitry using 84 * push/pull drivers. They often use the same 0x20..0x27 addresses as 85 * pcf857x parts, making the "legacy" I2C driver model problematic. 86 */ 87 struct pcf857x { 88 struct gpio_chip chip; 89 struct i2c_client *client; 90 struct mutex lock; /* protect 'out' */ 91 unsigned out; /* software latch */ 92 unsigned status; /* current status */ 93 unsigned int irq_parent; 94 unsigned irq_enabled; /* enabled irqs */ 95 96 int (*write)(struct i2c_client *client, unsigned data); 97 int (*read)(struct i2c_client *client); 98 }; 99 100 /*-------------------------------------------------------------------------*/ 101 102 /* Talk to 8-bit I/O expander */ 103 104 static int i2c_write_le8(struct i2c_client *client, unsigned data) 105 { 106 return i2c_smbus_write_byte(client, data); 107 } 108 109 static int i2c_read_le8(struct i2c_client *client) 110 { 111 return (int)i2c_smbus_read_byte(client); 112 } 113 114 /* Talk to 16-bit I/O expander */ 115 116 static int i2c_write_le16(struct i2c_client *client, unsigned word) 117 { 118 u8 buf[2] = { word & 0xff, word >> 8, }; 119 int status; 120 121 status = i2c_master_send(client, buf, 2); 122 return (status < 0) ? status : 0; 123 } 124 125 static int i2c_read_le16(struct i2c_client *client) 126 { 127 u8 buf[2]; 128 int status; 129 130 status = i2c_master_recv(client, buf, 2); 131 if (status < 0) 132 return status; 133 return (buf[1] << 8) | buf[0]; 134 } 135 136 /*-------------------------------------------------------------------------*/ 137 138 static int pcf857x_input(struct gpio_chip *chip, unsigned offset) 139 { 140 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); 141 int status; 142 143 mutex_lock(&gpio->lock); 144 gpio->out |= (1 << offset); 145 status = gpio->write(gpio->client, gpio->out); 146 mutex_unlock(&gpio->lock); 147 148 return status; 149 } 150 151 static int pcf857x_get(struct gpio_chip *chip, unsigned offset) 152 { 153 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); 154 int value; 155 156 value = gpio->read(gpio->client); 157 return (value < 0) ? 0 : (value & (1 << offset)); 158 } 159 160 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) 161 { 162 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); 163 unsigned bit = 1 << offset; 164 int status; 165 166 mutex_lock(&gpio->lock); 167 if (value) 168 gpio->out |= bit; 169 else 170 gpio->out &= ~bit; 171 status = gpio->write(gpio->client, gpio->out); 172 mutex_unlock(&gpio->lock); 173 174 return status; 175 } 176 177 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value) 178 { 179 pcf857x_output(chip, offset, value); 180 } 181 182 /*-------------------------------------------------------------------------*/ 183 184 static irqreturn_t pcf857x_irq(int irq, void *data) 185 { 186 struct pcf857x *gpio = data; 187 unsigned long change, i, status; 188 189 status = gpio->read(gpio->client); 190 191 /* 192 * call the interrupt handler iff gpio is used as 193 * interrupt source, just to avoid bad irqs 194 */ 195 mutex_lock(&gpio->lock); 196 change = (gpio->status ^ status) & gpio->irq_enabled; 197 gpio->status = status; 198 mutex_unlock(&gpio->lock); 199 200 for_each_set_bit(i, &change, gpio->chip.ngpio) 201 handle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i)); 202 203 return IRQ_HANDLED; 204 } 205 206 /* 207 * NOP functions 208 */ 209 static void noop(struct irq_data *data) { } 210 211 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on) 212 { 213 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 214 215 int error = 0; 216 217 if (gpio->irq_parent) { 218 error = irq_set_irq_wake(gpio->irq_parent, on); 219 if (error) { 220 dev_dbg(&gpio->client->dev, 221 "irq %u doesn't support irq_set_wake\n", 222 gpio->irq_parent); 223 gpio->irq_parent = 0; 224 } 225 } 226 return error; 227 } 228 229 static void pcf857x_irq_enable(struct irq_data *data) 230 { 231 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 232 233 gpio->irq_enabled |= (1 << data->hwirq); 234 } 235 236 static void pcf857x_irq_disable(struct irq_data *data) 237 { 238 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 239 240 gpio->irq_enabled &= ~(1 << data->hwirq); 241 } 242 243 static void pcf857x_irq_bus_lock(struct irq_data *data) 244 { 245 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 246 247 mutex_lock(&gpio->lock); 248 } 249 250 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data) 251 { 252 struct pcf857x *gpio = irq_data_get_irq_chip_data(data); 253 254 mutex_unlock(&gpio->lock); 255 } 256 257 static struct irq_chip pcf857x_irq_chip = { 258 .name = "pcf857x", 259 .irq_enable = pcf857x_irq_enable, 260 .irq_disable = pcf857x_irq_disable, 261 .irq_ack = noop, 262 .irq_mask = noop, 263 .irq_unmask = noop, 264 .irq_set_wake = pcf857x_irq_set_wake, 265 .irq_bus_lock = pcf857x_irq_bus_lock, 266 .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock, 267 }; 268 269 /*-------------------------------------------------------------------------*/ 270 271 static int pcf857x_probe(struct i2c_client *client, 272 const struct i2c_device_id *id) 273 { 274 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 275 struct device_node *np = client->dev.of_node; 276 struct pcf857x *gpio; 277 unsigned int n_latch = 0; 278 int status; 279 280 if (IS_ENABLED(CONFIG_OF) && np) 281 of_property_read_u32(np, "lines-initial-states", &n_latch); 282 else if (pdata) 283 n_latch = pdata->n_latch; 284 else 285 dev_dbg(&client->dev, "no platform data\n"); 286 287 /* Allocate, initialize, and register this gpio_chip. */ 288 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); 289 if (!gpio) 290 return -ENOMEM; 291 292 mutex_init(&gpio->lock); 293 294 gpio->chip.base = pdata ? pdata->gpio_base : -1; 295 gpio->chip.can_sleep = true; 296 gpio->chip.dev = &client->dev; 297 gpio->chip.owner = THIS_MODULE; 298 gpio->chip.get = pcf857x_get; 299 gpio->chip.set = pcf857x_set; 300 gpio->chip.direction_input = pcf857x_input; 301 gpio->chip.direction_output = pcf857x_output; 302 gpio->chip.ngpio = id->driver_data; 303 304 /* NOTE: the OnSemi jlc1562b is also largely compatible with 305 * these parts, notably for output. It has a low-resolution 306 * DAC instead of pin change IRQs; and its inputs can be the 307 * result of comparators. 308 */ 309 310 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; 311 * 9670, 9672, 9764, and 9764a use quite a variety. 312 * 313 * NOTE: we don't distinguish here between *4 and *4a parts. 314 */ 315 if (gpio->chip.ngpio == 8) { 316 gpio->write = i2c_write_le8; 317 gpio->read = i2c_read_le8; 318 319 if (!i2c_check_functionality(client->adapter, 320 I2C_FUNC_SMBUS_BYTE)) 321 status = -EIO; 322 323 /* fail if there's no chip present */ 324 else 325 status = i2c_smbus_read_byte(client); 326 327 /* '75/'75c addresses are 0x20..0x27, just like the '74; 328 * the '75c doesn't have a current source pulling high. 329 * 9671, 9673, and 9765 use quite a variety of addresses. 330 * 331 * NOTE: we don't distinguish here between '75 and '75c parts. 332 */ 333 } else if (gpio->chip.ngpio == 16) { 334 gpio->write = i2c_write_le16; 335 gpio->read = i2c_read_le16; 336 337 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 338 status = -EIO; 339 340 /* fail if there's no chip present */ 341 else 342 status = i2c_read_le16(client); 343 344 } else { 345 dev_dbg(&client->dev, "unsupported number of gpios\n"); 346 status = -EINVAL; 347 } 348 349 if (status < 0) 350 goto fail; 351 352 gpio->chip.label = client->name; 353 354 gpio->client = client; 355 i2c_set_clientdata(client, gpio); 356 357 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. 358 * We can't actually know whether a pin is configured (a) as output 359 * and driving the signal low, or (b) as input and reporting a low 360 * value ... without knowing the last value written since the chip 361 * came out of reset (if any). We can't read the latched output. 362 * 363 * In short, the only reliable solution for setting up pin direction 364 * is to do it explicitly. The setup() method can do that, but it 365 * may cause transient glitching since it can't know the last value 366 * written (some pins may need to be driven low). 367 * 368 * Using n_latch avoids that trouble. When left initialized to zero, 369 * our software copy of the "latch" then matches the chip's all-ones 370 * reset state. Otherwise it flags pins to be driven low. 371 */ 372 gpio->out = ~n_latch; 373 gpio->status = gpio->out; 374 375 status = gpiochip_add(&gpio->chip); 376 if (status < 0) 377 goto fail; 378 379 /* Enable irqchip if we have an interrupt */ 380 if (client->irq) { 381 status = gpiochip_irqchip_add(&gpio->chip, &pcf857x_irq_chip, 382 0, handle_level_irq, 383 IRQ_TYPE_NONE); 384 if (status) { 385 dev_err(&client->dev, "cannot add irqchip\n"); 386 goto fail_irq; 387 } 388 389 status = devm_request_threaded_irq(&client->dev, client->irq, 390 NULL, pcf857x_irq, IRQF_ONESHOT | 391 IRQF_TRIGGER_FALLING | IRQF_SHARED, 392 dev_name(&client->dev), gpio); 393 if (status) 394 goto fail_irq; 395 396 gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip, 397 client->irq, NULL); 398 gpio->irq_parent = client->irq; 399 } 400 401 /* Let platform code set up the GPIOs and their users. 402 * Now is the first time anyone could use them. 403 */ 404 if (pdata && pdata->setup) { 405 status = pdata->setup(client, 406 gpio->chip.base, gpio->chip.ngpio, 407 pdata->context); 408 if (status < 0) 409 dev_warn(&client->dev, "setup --> %d\n", status); 410 } 411 412 dev_info(&client->dev, "probed\n"); 413 414 return 0; 415 416 fail_irq: 417 gpiochip_remove(&gpio->chip); 418 419 fail: 420 dev_dbg(&client->dev, "probe error %d for '%s'\n", status, 421 client->name); 422 423 return status; 424 } 425 426 static int pcf857x_remove(struct i2c_client *client) 427 { 428 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); 429 struct pcf857x *gpio = i2c_get_clientdata(client); 430 int status = 0; 431 432 if (pdata && pdata->teardown) { 433 status = pdata->teardown(client, 434 gpio->chip.base, gpio->chip.ngpio, 435 pdata->context); 436 if (status < 0) { 437 dev_err(&client->dev, "%s --> %d\n", 438 "teardown", status); 439 return status; 440 } 441 } 442 443 gpiochip_remove(&gpio->chip); 444 return status; 445 } 446 447 static struct i2c_driver pcf857x_driver = { 448 .driver = { 449 .name = "pcf857x", 450 .owner = THIS_MODULE, 451 .of_match_table = of_match_ptr(pcf857x_of_table), 452 }, 453 .probe = pcf857x_probe, 454 .remove = pcf857x_remove, 455 .id_table = pcf857x_id, 456 }; 457 458 static int __init pcf857x_init(void) 459 { 460 return i2c_add_driver(&pcf857x_driver); 461 } 462 /* register after i2c postcore initcall and before 463 * subsys initcalls that may rely on these GPIOs 464 */ 465 subsys_initcall(pcf857x_init); 466 467 static void __exit pcf857x_exit(void) 468 { 469 i2c_del_driver(&pcf857x_driver); 470 } 471 module_exit(pcf857x_exit); 472 473 MODULE_LICENSE("GPL"); 474 MODULE_AUTHOR("David Brownell"); 475