1 /* 2 * PCA953x 4/8/16/24/40 bit I/O ports 3 * 4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 5 * Copyright (C) 2007 Marvell International Ltd. 6 * 7 * Derived from drivers/i2c/chips/pca9539.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/init.h> 16 #include <linux/gpio.h> 17 #include <linux/interrupt.h> 18 #include <linux/i2c.h> 19 #include <linux/platform_data/pca953x.h> 20 #include <linux/slab.h> 21 #include <asm/unaligned.h> 22 #include <linux/of_platform.h> 23 #include <linux/acpi.h> 24 25 #define PCA953X_INPUT 0 26 #define PCA953X_OUTPUT 1 27 #define PCA953X_INVERT 2 28 #define PCA953X_DIRECTION 3 29 30 #define REG_ADDR_AI 0x80 31 32 #define PCA957X_IN 0 33 #define PCA957X_INVRT 1 34 #define PCA957X_BKEN 2 35 #define PCA957X_PUPD 3 36 #define PCA957X_CFG 4 37 #define PCA957X_OUT 5 38 #define PCA957X_MSK 6 39 #define PCA957X_INTS 7 40 41 #define PCAL953X_IN_LATCH 34 42 #define PCAL953X_INT_MASK 37 43 #define PCAL953X_INT_STAT 38 44 45 #define PCA_GPIO_MASK 0x00FF 46 #define PCA_INT 0x0100 47 #define PCA_PCAL 0x0200 48 #define PCA953X_TYPE 0x1000 49 #define PCA957X_TYPE 0x2000 50 #define PCA_TYPE_MASK 0xF000 51 52 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK) 53 54 static const struct i2c_device_id pca953x_id[] = { 55 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 56 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 57 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 58 { "pca9536", 4 | PCA953X_TYPE, }, 59 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 60 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 61 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 62 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 63 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 64 { "pca9556", 8 | PCA953X_TYPE, }, 65 { "pca9557", 8 | PCA953X_TYPE, }, 66 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 67 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 68 { "pca9698", 40 | PCA953X_TYPE, }, 69 70 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, 71 72 { "max7310", 8 | PCA953X_TYPE, }, 73 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 74 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 75 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 76 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 77 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 78 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 79 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 80 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, }, 81 { "xra1202", 8 | PCA953X_TYPE }, 82 { } 83 }; 84 MODULE_DEVICE_TABLE(i2c, pca953x_id); 85 86 static const struct acpi_device_id pca953x_acpi_ids[] = { 87 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, }, 88 { } 89 }; 90 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); 91 92 #define MAX_BANK 5 93 #define BANK_SZ 8 94 95 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) 96 97 struct pca953x_chip { 98 unsigned gpio_start; 99 u8 reg_output[MAX_BANK]; 100 u8 reg_direction[MAX_BANK]; 101 struct mutex i2c_lock; 102 103 #ifdef CONFIG_GPIO_PCA953X_IRQ 104 struct mutex irq_lock; 105 u8 irq_mask[MAX_BANK]; 106 u8 irq_stat[MAX_BANK]; 107 u8 irq_trig_raise[MAX_BANK]; 108 u8 irq_trig_fall[MAX_BANK]; 109 #endif 110 111 struct i2c_client *client; 112 struct gpio_chip gpio_chip; 113 const char *const *names; 114 int chip_type; 115 unsigned long driver_data; 116 }; 117 118 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, 119 int off) 120 { 121 int ret; 122 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 123 int offset = off / BANK_SZ; 124 125 ret = i2c_smbus_read_byte_data(chip->client, 126 (reg << bank_shift) + offset); 127 *val = ret; 128 129 if (ret < 0) { 130 dev_err(&chip->client->dev, "failed reading register\n"); 131 return ret; 132 } 133 134 return 0; 135 } 136 137 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, 138 int off) 139 { 140 int ret; 141 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 142 int offset = off / BANK_SZ; 143 144 ret = i2c_smbus_write_byte_data(chip->client, 145 (reg << bank_shift) + offset, val); 146 147 if (ret < 0) { 148 dev_err(&chip->client->dev, "failed writing register\n"); 149 return ret; 150 } 151 152 return 0; 153 } 154 155 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) 156 { 157 int ret = 0; 158 159 if (chip->gpio_chip.ngpio <= 8) 160 ret = i2c_smbus_write_byte_data(chip->client, reg, *val); 161 else if (chip->gpio_chip.ngpio >= 24) { 162 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 163 ret = i2c_smbus_write_i2c_block_data(chip->client, 164 (reg << bank_shift) | REG_ADDR_AI, 165 NBANK(chip), val); 166 } else { 167 switch (chip->chip_type) { 168 case PCA953X_TYPE: { 169 __le16 word = cpu_to_le16(get_unaligned((u16 *)val)); 170 171 ret = i2c_smbus_write_word_data(chip->client, reg << 1, 172 (__force u16)word); 173 break; 174 } 175 case PCA957X_TYPE: 176 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, 177 val[0]); 178 if (ret < 0) 179 break; 180 ret = i2c_smbus_write_byte_data(chip->client, 181 (reg << 1) + 1, 182 val[1]); 183 break; 184 } 185 } 186 187 if (ret < 0) { 188 dev_err(&chip->client->dev, "failed writing register\n"); 189 return ret; 190 } 191 192 return 0; 193 } 194 195 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) 196 { 197 int ret; 198 199 if (chip->gpio_chip.ngpio <= 8) { 200 ret = i2c_smbus_read_byte_data(chip->client, reg); 201 *val = ret; 202 } else if (chip->gpio_chip.ngpio >= 24) { 203 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 204 205 ret = i2c_smbus_read_i2c_block_data(chip->client, 206 (reg << bank_shift) | REG_ADDR_AI, 207 NBANK(chip), val); 208 } else { 209 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 210 val[0] = (u16)ret & 0xFF; 211 val[1] = (u16)ret >> 8; 212 } 213 if (ret < 0) { 214 dev_err(&chip->client->dev, "failed reading register\n"); 215 return ret; 216 } 217 218 return 0; 219 } 220 221 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 222 { 223 struct pca953x_chip *chip = gpiochip_get_data(gc); 224 u8 reg_val; 225 int ret, offset = 0; 226 227 mutex_lock(&chip->i2c_lock); 228 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); 229 230 switch (chip->chip_type) { 231 case PCA953X_TYPE: 232 offset = PCA953X_DIRECTION; 233 break; 234 case PCA957X_TYPE: 235 offset = PCA957X_CFG; 236 break; 237 } 238 ret = pca953x_write_single(chip, offset, reg_val, off); 239 if (ret) 240 goto exit; 241 242 chip->reg_direction[off / BANK_SZ] = reg_val; 243 exit: 244 mutex_unlock(&chip->i2c_lock); 245 return ret; 246 } 247 248 static int pca953x_gpio_direction_output(struct gpio_chip *gc, 249 unsigned off, int val) 250 { 251 struct pca953x_chip *chip = gpiochip_get_data(gc); 252 u8 reg_val; 253 int ret, offset = 0; 254 255 mutex_lock(&chip->i2c_lock); 256 /* set output level */ 257 if (val) 258 reg_val = chip->reg_output[off / BANK_SZ] 259 | (1u << (off % BANK_SZ)); 260 else 261 reg_val = chip->reg_output[off / BANK_SZ] 262 & ~(1u << (off % BANK_SZ)); 263 264 switch (chip->chip_type) { 265 case PCA953X_TYPE: 266 offset = PCA953X_OUTPUT; 267 break; 268 case PCA957X_TYPE: 269 offset = PCA957X_OUT; 270 break; 271 } 272 ret = pca953x_write_single(chip, offset, reg_val, off); 273 if (ret) 274 goto exit; 275 276 chip->reg_output[off / BANK_SZ] = reg_val; 277 278 /* then direction */ 279 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); 280 switch (chip->chip_type) { 281 case PCA953X_TYPE: 282 offset = PCA953X_DIRECTION; 283 break; 284 case PCA957X_TYPE: 285 offset = PCA957X_CFG; 286 break; 287 } 288 ret = pca953x_write_single(chip, offset, reg_val, off); 289 if (ret) 290 goto exit; 291 292 chip->reg_direction[off / BANK_SZ] = reg_val; 293 exit: 294 mutex_unlock(&chip->i2c_lock); 295 return ret; 296 } 297 298 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 299 { 300 struct pca953x_chip *chip = gpiochip_get_data(gc); 301 u32 reg_val; 302 int ret, offset = 0; 303 304 mutex_lock(&chip->i2c_lock); 305 switch (chip->chip_type) { 306 case PCA953X_TYPE: 307 offset = PCA953X_INPUT; 308 break; 309 case PCA957X_TYPE: 310 offset = PCA957X_IN; 311 break; 312 } 313 ret = pca953x_read_single(chip, offset, ®_val, off); 314 mutex_unlock(&chip->i2c_lock); 315 if (ret < 0) { 316 /* NOTE: diagnostic already emitted; that's all we should 317 * do unless gpio_*_value_cansleep() calls become different 318 * from their nonsleeping siblings (and report faults). 319 */ 320 return 0; 321 } 322 323 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; 324 } 325 326 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 327 { 328 struct pca953x_chip *chip = gpiochip_get_data(gc); 329 u8 reg_val; 330 int ret, offset = 0; 331 332 mutex_lock(&chip->i2c_lock); 333 if (val) 334 reg_val = chip->reg_output[off / BANK_SZ] 335 | (1u << (off % BANK_SZ)); 336 else 337 reg_val = chip->reg_output[off / BANK_SZ] 338 & ~(1u << (off % BANK_SZ)); 339 340 switch (chip->chip_type) { 341 case PCA953X_TYPE: 342 offset = PCA953X_OUTPUT; 343 break; 344 case PCA957X_TYPE: 345 offset = PCA957X_OUT; 346 break; 347 } 348 ret = pca953x_write_single(chip, offset, reg_val, off); 349 if (ret) 350 goto exit; 351 352 chip->reg_output[off / BANK_SZ] = reg_val; 353 exit: 354 mutex_unlock(&chip->i2c_lock); 355 } 356 357 static void pca953x_gpio_set_multiple(struct gpio_chip *gc, 358 unsigned long *mask, unsigned long *bits) 359 { 360 struct pca953x_chip *chip = gpiochip_get_data(gc); 361 u8 reg_val[MAX_BANK]; 362 int ret, offset = 0; 363 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 364 int bank; 365 366 switch (chip->chip_type) { 367 case PCA953X_TYPE: 368 offset = PCA953X_OUTPUT; 369 break; 370 case PCA957X_TYPE: 371 offset = PCA957X_OUT; 372 break; 373 } 374 375 memcpy(reg_val, chip->reg_output, NBANK(chip)); 376 mutex_lock(&chip->i2c_lock); 377 for(bank=0; bank<NBANK(chip); bank++) { 378 unsigned bankmask = mask[bank / sizeof(*mask)] >> 379 ((bank % sizeof(*mask)) * 8); 380 if(bankmask) { 381 unsigned bankval = bits[bank / sizeof(*bits)] >> 382 ((bank % sizeof(*bits)) * 8); 383 reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval; 384 } 385 } 386 ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val); 387 if (ret) 388 goto exit; 389 390 memcpy(chip->reg_output, reg_val, NBANK(chip)); 391 exit: 392 mutex_unlock(&chip->i2c_lock); 393 } 394 395 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 396 { 397 struct gpio_chip *gc; 398 399 gc = &chip->gpio_chip; 400 401 gc->direction_input = pca953x_gpio_direction_input; 402 gc->direction_output = pca953x_gpio_direction_output; 403 gc->get = pca953x_gpio_get_value; 404 gc->set = pca953x_gpio_set_value; 405 gc->set_multiple = pca953x_gpio_set_multiple; 406 gc->can_sleep = true; 407 408 gc->base = chip->gpio_start; 409 gc->ngpio = gpios; 410 gc->label = chip->client->name; 411 gc->parent = &chip->client->dev; 412 gc->owner = THIS_MODULE; 413 gc->names = chip->names; 414 } 415 416 #ifdef CONFIG_GPIO_PCA953X_IRQ 417 static void pca953x_irq_mask(struct irq_data *d) 418 { 419 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 420 struct pca953x_chip *chip = gpiochip_get_data(gc); 421 422 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 423 } 424 425 static void pca953x_irq_unmask(struct irq_data *d) 426 { 427 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 428 struct pca953x_chip *chip = gpiochip_get_data(gc); 429 430 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 431 } 432 433 static void pca953x_irq_bus_lock(struct irq_data *d) 434 { 435 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 436 struct pca953x_chip *chip = gpiochip_get_data(gc); 437 438 mutex_lock(&chip->irq_lock); 439 } 440 441 static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 442 { 443 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 444 struct pca953x_chip *chip = gpiochip_get_data(gc); 445 u8 new_irqs; 446 int level, i; 447 u8 invert_irq_mask[MAX_BANK]; 448 449 if (chip->driver_data & PCA_PCAL) { 450 /* Enable latch on interrupt-enabled inputs */ 451 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); 452 453 for (i = 0; i < NBANK(chip); i++) 454 invert_irq_mask[i] = ~chip->irq_mask[i]; 455 456 /* Unmask enabled interrupts */ 457 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask); 458 } 459 460 /* Look for any newly setup interrupt */ 461 for (i = 0; i < NBANK(chip); i++) { 462 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; 463 new_irqs &= ~chip->reg_direction[i]; 464 465 while (new_irqs) { 466 level = __ffs(new_irqs); 467 pca953x_gpio_direction_input(&chip->gpio_chip, 468 level + (BANK_SZ * i)); 469 new_irqs &= ~(1 << level); 470 } 471 } 472 473 mutex_unlock(&chip->irq_lock); 474 } 475 476 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 477 { 478 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 479 struct pca953x_chip *chip = gpiochip_get_data(gc); 480 int bank_nb = d->hwirq / BANK_SZ; 481 u8 mask = 1 << (d->hwirq % BANK_SZ); 482 483 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 484 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 485 d->irq, type); 486 return -EINVAL; 487 } 488 489 if (type & IRQ_TYPE_EDGE_FALLING) 490 chip->irq_trig_fall[bank_nb] |= mask; 491 else 492 chip->irq_trig_fall[bank_nb] &= ~mask; 493 494 if (type & IRQ_TYPE_EDGE_RISING) 495 chip->irq_trig_raise[bank_nb] |= mask; 496 else 497 chip->irq_trig_raise[bank_nb] &= ~mask; 498 499 return 0; 500 } 501 502 static struct irq_chip pca953x_irq_chip = { 503 .name = "pca953x", 504 .irq_mask = pca953x_irq_mask, 505 .irq_unmask = pca953x_irq_unmask, 506 .irq_bus_lock = pca953x_irq_bus_lock, 507 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, 508 .irq_set_type = pca953x_irq_set_type, 509 }; 510 511 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 512 { 513 u8 cur_stat[MAX_BANK]; 514 u8 old_stat[MAX_BANK]; 515 bool pending_seen = false; 516 bool trigger_seen = false; 517 u8 trigger[MAX_BANK]; 518 int ret, i, offset = 0; 519 520 if (chip->driver_data & PCA_PCAL) { 521 /* Read the current interrupt status from the device */ 522 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger); 523 if (ret) 524 return false; 525 526 /* Check latched inputs and clear interrupt status */ 527 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat); 528 if (ret) 529 return false; 530 531 for (i = 0; i < NBANK(chip); i++) { 532 /* Apply filter for rising/falling edge selection */ 533 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) | 534 (cur_stat[i] & chip->irq_trig_raise[i]); 535 pending[i] &= trigger[i]; 536 if (pending[i]) 537 pending_seen = true; 538 } 539 540 return pending_seen; 541 } 542 543 switch (chip->chip_type) { 544 case PCA953X_TYPE: 545 offset = PCA953X_INPUT; 546 break; 547 case PCA957X_TYPE: 548 offset = PCA957X_IN; 549 break; 550 } 551 ret = pca953x_read_regs(chip, offset, cur_stat); 552 if (ret) 553 return false; 554 555 /* Remove output pins from the equation */ 556 for (i = 0; i < NBANK(chip); i++) 557 cur_stat[i] &= chip->reg_direction[i]; 558 559 memcpy(old_stat, chip->irq_stat, NBANK(chip)); 560 561 for (i = 0; i < NBANK(chip); i++) { 562 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 563 if (trigger[i]) 564 trigger_seen = true; 565 } 566 567 if (!trigger_seen) 568 return false; 569 570 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 571 572 for (i = 0; i < NBANK(chip); i++) { 573 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 574 (cur_stat[i] & chip->irq_trig_raise[i]); 575 pending[i] &= trigger[i]; 576 if (pending[i]) 577 pending_seen = true; 578 } 579 580 return pending_seen; 581 } 582 583 static irqreturn_t pca953x_irq_handler(int irq, void *devid) 584 { 585 struct pca953x_chip *chip = devid; 586 u8 pending[MAX_BANK]; 587 u8 level; 588 unsigned nhandled = 0; 589 int i; 590 591 if (!pca953x_irq_pending(chip, pending)) 592 return IRQ_NONE; 593 594 for (i = 0; i < NBANK(chip); i++) { 595 while (pending[i]) { 596 level = __ffs(pending[i]); 597 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, 598 level + (BANK_SZ * i))); 599 pending[i] &= ~(1 << level); 600 nhandled++; 601 } 602 } 603 604 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; 605 } 606 607 static int pca953x_irq_setup(struct pca953x_chip *chip, 608 int irq_base) 609 { 610 struct i2c_client *client = chip->client; 611 int ret, i, offset = 0; 612 613 if (client->irq && irq_base != -1 614 && (chip->driver_data & PCA_INT)) { 615 616 switch (chip->chip_type) { 617 case PCA953X_TYPE: 618 offset = PCA953X_INPUT; 619 break; 620 case PCA957X_TYPE: 621 offset = PCA957X_IN; 622 break; 623 } 624 ret = pca953x_read_regs(chip, offset, chip->irq_stat); 625 if (ret) 626 return ret; 627 628 /* 629 * There is no way to know which GPIO line generated the 630 * interrupt. We have to rely on the previous read for 631 * this purpose. 632 */ 633 for (i = 0; i < NBANK(chip); i++) 634 chip->irq_stat[i] &= chip->reg_direction[i]; 635 mutex_init(&chip->irq_lock); 636 637 ret = devm_request_threaded_irq(&client->dev, 638 client->irq, 639 NULL, 640 pca953x_irq_handler, 641 IRQF_TRIGGER_LOW | IRQF_ONESHOT | 642 IRQF_SHARED, 643 dev_name(&client->dev), chip); 644 if (ret) { 645 dev_err(&client->dev, "failed to request irq %d\n", 646 client->irq); 647 return ret; 648 } 649 650 ret = gpiochip_irqchip_add(&chip->gpio_chip, 651 &pca953x_irq_chip, 652 irq_base, 653 handle_simple_irq, 654 IRQ_TYPE_NONE); 655 if (ret) { 656 dev_err(&client->dev, 657 "could not connect irqchip to gpiochip\n"); 658 return ret; 659 } 660 661 gpiochip_set_chained_irqchip(&chip->gpio_chip, 662 &pca953x_irq_chip, 663 client->irq, NULL); 664 } 665 666 return 0; 667 } 668 669 #else /* CONFIG_GPIO_PCA953X_IRQ */ 670 static int pca953x_irq_setup(struct pca953x_chip *chip, 671 int irq_base) 672 { 673 struct i2c_client *client = chip->client; 674 675 if (irq_base != -1 && (chip->driver_data & PCA_INT)) 676 dev_warn(&client->dev, "interrupt support not compiled in\n"); 677 678 return 0; 679 } 680 #endif 681 682 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 683 { 684 int ret; 685 u8 val[MAX_BANK]; 686 687 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); 688 if (ret) 689 goto out; 690 691 ret = pca953x_read_regs(chip, PCA953X_DIRECTION, 692 chip->reg_direction); 693 if (ret) 694 goto out; 695 696 /* set platform specific polarity inversion */ 697 if (invert) 698 memset(val, 0xFF, NBANK(chip)); 699 else 700 memset(val, 0, NBANK(chip)); 701 702 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); 703 out: 704 return ret; 705 } 706 707 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 708 { 709 int ret; 710 u8 val[MAX_BANK]; 711 712 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); 713 if (ret) 714 goto out; 715 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction); 716 if (ret) 717 goto out; 718 719 /* set platform specific polarity inversion */ 720 if (invert) 721 memset(val, 0xFF, NBANK(chip)); 722 else 723 memset(val, 0, NBANK(chip)); 724 ret = pca953x_write_regs(chip, PCA957X_INVRT, val); 725 if (ret) 726 goto out; 727 728 /* To enable register 6, 7 to control pull up and pull down */ 729 memset(val, 0x02, NBANK(chip)); 730 ret = pca953x_write_regs(chip, PCA957X_BKEN, val); 731 if (ret) 732 goto out; 733 734 return 0; 735 out: 736 return ret; 737 } 738 739 static const struct of_device_id pca953x_dt_ids[]; 740 741 static int pca953x_probe(struct i2c_client *client, 742 const struct i2c_device_id *id) 743 { 744 struct pca953x_platform_data *pdata; 745 struct pca953x_chip *chip; 746 int irq_base = 0; 747 int ret; 748 u32 invert = 0; 749 750 chip = devm_kzalloc(&client->dev, 751 sizeof(struct pca953x_chip), GFP_KERNEL); 752 if (chip == NULL) 753 return -ENOMEM; 754 755 pdata = dev_get_platdata(&client->dev); 756 if (pdata) { 757 irq_base = pdata->irq_base; 758 chip->gpio_start = pdata->gpio_base; 759 invert = pdata->invert; 760 chip->names = pdata->names; 761 } else { 762 chip->gpio_start = -1; 763 irq_base = 0; 764 } 765 766 chip->client = client; 767 768 if (id) { 769 chip->driver_data = id->driver_data; 770 } else { 771 const struct acpi_device_id *id; 772 const struct of_device_id *match; 773 774 match = of_match_device(pca953x_dt_ids, &client->dev); 775 if (match) { 776 chip->driver_data = (int)(uintptr_t)match->data; 777 } else { 778 id = acpi_match_device(pca953x_acpi_ids, &client->dev); 779 if (!id) 780 return -ENODEV; 781 782 chip->driver_data = id->driver_data; 783 } 784 } 785 786 chip->chip_type = PCA_CHIP_TYPE(chip->driver_data); 787 788 mutex_init(&chip->i2c_lock); 789 790 /* initialize cached registers from their original values. 791 * we can't share this chip with another i2c master. 792 */ 793 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); 794 795 if (chip->chip_type == PCA953X_TYPE) 796 ret = device_pca953x_init(chip, invert); 797 else 798 ret = device_pca957x_init(chip, invert); 799 if (ret) 800 return ret; 801 802 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip); 803 if (ret) 804 return ret; 805 806 ret = pca953x_irq_setup(chip, irq_base); 807 if (ret) 808 return ret; 809 810 if (pdata && pdata->setup) { 811 ret = pdata->setup(client, chip->gpio_chip.base, 812 chip->gpio_chip.ngpio, pdata->context); 813 if (ret < 0) 814 dev_warn(&client->dev, "setup failed, %d\n", ret); 815 } 816 817 i2c_set_clientdata(client, chip); 818 return 0; 819 } 820 821 static int pca953x_remove(struct i2c_client *client) 822 { 823 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 824 struct pca953x_chip *chip = i2c_get_clientdata(client); 825 int ret; 826 827 if (pdata && pdata->teardown) { 828 ret = pdata->teardown(client, chip->gpio_chip.base, 829 chip->gpio_chip.ngpio, pdata->context); 830 if (ret < 0) { 831 dev_err(&client->dev, "%s failed, %d\n", 832 "teardown", ret); 833 return ret; 834 } 835 } 836 837 return 0; 838 } 839 840 /* convenience to stop overlong match-table lines */ 841 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) 842 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) 843 844 static const struct of_device_id pca953x_dt_ids[] = { 845 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), }, 846 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), }, 847 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), }, 848 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), }, 849 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), }, 850 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), }, 851 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), }, 852 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), }, 853 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), }, 854 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), }, 855 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), }, 856 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), }, 857 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), }, 858 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), }, 859 860 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), }, 861 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 862 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 863 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 864 865 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 866 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 867 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), }, 868 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), }, 869 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), }, 870 871 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), }, 872 873 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), }, 874 { } 875 }; 876 877 MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 878 879 static struct i2c_driver pca953x_driver = { 880 .driver = { 881 .name = "pca953x", 882 .of_match_table = pca953x_dt_ids, 883 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), 884 }, 885 .probe = pca953x_probe, 886 .remove = pca953x_remove, 887 .id_table = pca953x_id, 888 }; 889 890 static int __init pca953x_init(void) 891 { 892 return i2c_add_driver(&pca953x_driver); 893 } 894 /* register after i2c postcore initcall and before 895 * subsys initcalls that may rely on these GPIOs 896 */ 897 subsys_initcall(pca953x_init); 898 899 static void __exit pca953x_exit(void) 900 { 901 i2c_del_driver(&pca953x_driver); 902 } 903 module_exit(pca953x_exit); 904 905 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 906 MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 907 MODULE_LICENSE("GPL"); 908