15238f7bcSJohn Crispin /* 25238f7bcSJohn Crispin * This program is free software; you can redistribute it and/or modify it 35238f7bcSJohn Crispin * under the terms of the GNU General Public License version 2 as published 45238f7bcSJohn Crispin * by the Free Software Foundation. 55238f7bcSJohn Crispin * 6a36e9a1cSJohn Crispin * Copyright (C) 2012 John Crispin <blogic@openwrt.org> 75238f7bcSJohn Crispin */ 85238f7bcSJohn Crispin 95238f7bcSJohn Crispin #include <linux/init.h> 10a36e9a1cSJohn Crispin #include <linux/module.h> 115238f7bcSJohn Crispin #include <linux/types.h> 125238f7bcSJohn Crispin #include <linux/platform_device.h> 135238f7bcSJohn Crispin #include <linux/mutex.h> 145238f7bcSJohn Crispin #include <linux/gpio.h> 15a36e9a1cSJohn Crispin #include <linux/of.h> 16a36e9a1cSJohn Crispin #include <linux/of_gpio.h> 175238f7bcSJohn Crispin #include <linux/io.h> 18a36e9a1cSJohn Crispin #include <linux/slab.h> 195238f7bcSJohn Crispin 205238f7bcSJohn Crispin #include <lantiq_soc.h> 215238f7bcSJohn Crispin 225238f7bcSJohn Crispin /* 235238f7bcSJohn Crispin * By attaching hardware latches to the EBU it is possible to create output 245238f7bcSJohn Crispin * only gpios. This driver configures a special memory address, which when 255238f7bcSJohn Crispin * written to outputs 16 bit to the latches. 265238f7bcSJohn Crispin */ 275238f7bcSJohn Crispin 285238f7bcSJohn Crispin #define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */ 295238f7bcSJohn Crispin #define LTQ_EBU_WP 0x80000000 /* write protect bit */ 305238f7bcSJohn Crispin 31a36e9a1cSJohn Crispin struct ltq_mm { 32a36e9a1cSJohn Crispin struct of_mm_gpio_chip mmchip; 33a36e9a1cSJohn Crispin u16 shadow; /* shadow the latches state */ 34a36e9a1cSJohn Crispin }; 355238f7bcSJohn Crispin 36a36e9a1cSJohn Crispin /** 37a36e9a1cSJohn Crispin * ltq_mm_apply() - write the shadow value to the ebu address. 38a36e9a1cSJohn Crispin * @chip: Pointer to our private data structure. 39a36e9a1cSJohn Crispin * 40a36e9a1cSJohn Crispin * Write the shadow value to the EBU to set the gpios. We need to set the 41a36e9a1cSJohn Crispin * global EBU lock to make sure that PCI/MTD dont break. 42a36e9a1cSJohn Crispin */ 43a36e9a1cSJohn Crispin static void ltq_mm_apply(struct ltq_mm *chip) 445238f7bcSJohn Crispin { 455238f7bcSJohn Crispin unsigned long flags; 465238f7bcSJohn Crispin 475238f7bcSJohn Crispin spin_lock_irqsave(&ebu_lock, flags); 485238f7bcSJohn Crispin ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1); 49a36e9a1cSJohn Crispin __raw_writew(chip->shadow, chip->mmchip.regs); 505238f7bcSJohn Crispin ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); 515238f7bcSJohn Crispin spin_unlock_irqrestore(&ebu_lock, flags); 525238f7bcSJohn Crispin } 535238f7bcSJohn Crispin 54a36e9a1cSJohn Crispin /** 55a36e9a1cSJohn Crispin * ltq_mm_set() - gpio_chip->set - set gpios. 56a36e9a1cSJohn Crispin * @gc: Pointer to gpio_chip device structure. 57a36e9a1cSJohn Crispin * @gpio: GPIO signal number. 58a36e9a1cSJohn Crispin * @val: Value to be written to specified signal. 59a36e9a1cSJohn Crispin * 60a36e9a1cSJohn Crispin * Set the shadow value and call ltq_mm_apply. 61a36e9a1cSJohn Crispin */ 62a36e9a1cSJohn Crispin static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value) 635238f7bcSJohn Crispin { 646aa7dbfaSLinus Walleij struct ltq_mm *chip = gpiochip_get_data(gc); 65a36e9a1cSJohn Crispin 665238f7bcSJohn Crispin if (value) 67a36e9a1cSJohn Crispin chip->shadow |= (1 << offset); 685238f7bcSJohn Crispin else 69a36e9a1cSJohn Crispin chip->shadow &= ~(1 << offset); 70a36e9a1cSJohn Crispin ltq_mm_apply(chip); 715238f7bcSJohn Crispin } 725238f7bcSJohn Crispin 73a36e9a1cSJohn Crispin /** 74a36e9a1cSJohn Crispin * ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction. 75a36e9a1cSJohn Crispin * @gc: Pointer to gpio_chip device structure. 76a36e9a1cSJohn Crispin * @gpio: GPIO signal number. 77a36e9a1cSJohn Crispin * @val: Value to be written to specified signal. 78a36e9a1cSJohn Crispin * 79a36e9a1cSJohn Crispin * Same as ltq_mm_set, always returns 0. 80a36e9a1cSJohn Crispin */ 81a36e9a1cSJohn Crispin static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value) 825238f7bcSJohn Crispin { 83a36e9a1cSJohn Crispin ltq_mm_set(gc, offset, value); 845238f7bcSJohn Crispin 855238f7bcSJohn Crispin return 0; 865238f7bcSJohn Crispin } 875238f7bcSJohn Crispin 88a36e9a1cSJohn Crispin /** 89a36e9a1cSJohn Crispin * ltq_mm_save_regs() - Set initial values of GPIO pins 90a36e9a1cSJohn Crispin * @mm_gc: pointer to memory mapped GPIO chip structure 91a36e9a1cSJohn Crispin */ 92a36e9a1cSJohn Crispin static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc) 935238f7bcSJohn Crispin { 94*95c76170SGuenter Roeck struct ltq_mm *chip = 95*95c76170SGuenter Roeck container_of(mm_gc, struct ltq_mm, mmchip); 96a36e9a1cSJohn Crispin 97a36e9a1cSJohn Crispin /* tell the ebu controller which memory address we will be using */ 98a36e9a1cSJohn Crispin ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); 99a36e9a1cSJohn Crispin 100a36e9a1cSJohn Crispin ltq_mm_apply(chip); 101a36e9a1cSJohn Crispin } 102a36e9a1cSJohn Crispin 103a36e9a1cSJohn Crispin static int ltq_mm_probe(struct platform_device *pdev) 104a36e9a1cSJohn Crispin { 105a36e9a1cSJohn Crispin struct ltq_mm *chip; 10668a99b18SRicardo Ribalda Delgado u32 shadow; 1075238f7bcSJohn Crispin 108080440a2SRicardo Ribalda Delgado chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 109a36e9a1cSJohn Crispin if (!chip) 1105238f7bcSJohn Crispin return -ENOMEM; 1115238f7bcSJohn Crispin 112da238221SRicardo Ribalda Delgado platform_set_drvdata(pdev, chip); 113da238221SRicardo Ribalda Delgado 114a36e9a1cSJohn Crispin chip->mmchip.gc.ngpio = 16; 115a36e9a1cSJohn Crispin chip->mmchip.gc.direction_output = ltq_mm_dir_out; 116a36e9a1cSJohn Crispin chip->mmchip.gc.set = ltq_mm_set; 117a36e9a1cSJohn Crispin chip->mmchip.save_regs = ltq_mm_save_regs; 1185238f7bcSJohn Crispin 119a36e9a1cSJohn Crispin /* store the shadow value if one was passed by the devicetree */ 12068a99b18SRicardo Ribalda Delgado if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) 12168a99b18SRicardo Ribalda Delgado chip->shadow = shadow; 1225238f7bcSJohn Crispin 1236aa7dbfaSLinus Walleij return of_mm_gpiochip_add_data(pdev->dev.of_node, &chip->mmchip, chip); 1245238f7bcSJohn Crispin } 1255238f7bcSJohn Crispin 126da238221SRicardo Ribalda Delgado static int ltq_mm_remove(struct platform_device *pdev) 127da238221SRicardo Ribalda Delgado { 128da238221SRicardo Ribalda Delgado struct ltq_mm *chip = platform_get_drvdata(pdev); 129da238221SRicardo Ribalda Delgado 130da238221SRicardo Ribalda Delgado of_mm_gpiochip_remove(&chip->mmchip); 131da238221SRicardo Ribalda Delgado 132da238221SRicardo Ribalda Delgado return 0; 133da238221SRicardo Ribalda Delgado } 134da238221SRicardo Ribalda Delgado 135a36e9a1cSJohn Crispin static const struct of_device_id ltq_mm_match[] = { 136a36e9a1cSJohn Crispin { .compatible = "lantiq,gpio-mm" }, 137a36e9a1cSJohn Crispin {}, 138a36e9a1cSJohn Crispin }; 139a36e9a1cSJohn Crispin MODULE_DEVICE_TABLE(of, ltq_mm_match); 140a36e9a1cSJohn Crispin 141a36e9a1cSJohn Crispin static struct platform_driver ltq_mm_driver = { 142a36e9a1cSJohn Crispin .probe = ltq_mm_probe, 143da238221SRicardo Ribalda Delgado .remove = ltq_mm_remove, 1445238f7bcSJohn Crispin .driver = { 145a36e9a1cSJohn Crispin .name = "gpio-mm-ltq", 146a36e9a1cSJohn Crispin .of_match_table = ltq_mm_match, 1475238f7bcSJohn Crispin }, 1485238f7bcSJohn Crispin }; 1495238f7bcSJohn Crispin 150a36e9a1cSJohn Crispin static int __init ltq_mm_init(void) 1515238f7bcSJohn Crispin { 152a36e9a1cSJohn Crispin return platform_driver_register(<q_mm_driver); 1535238f7bcSJohn Crispin } 1545238f7bcSJohn Crispin 155a36e9a1cSJohn Crispin subsys_initcall(ltq_mm_init); 156da238221SRicardo Ribalda Delgado 157da238221SRicardo Ribalda Delgado static void __exit ltq_mm_exit(void) 158da238221SRicardo Ribalda Delgado { 159da238221SRicardo Ribalda Delgado platform_driver_unregister(<q_mm_driver); 160da238221SRicardo Ribalda Delgado } 161da238221SRicardo Ribalda Delgado module_exit(ltq_mm_exit); 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