1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 25238f7bcSJohn Crispin /* 35238f7bcSJohn Crispin * 4baddc7caSJohn Crispin * Copyright (C) 2012 John Crispin <john@phrozen.org> 55238f7bcSJohn Crispin */ 65238f7bcSJohn Crispin 75238f7bcSJohn Crispin #include <linux/init.h> 8a36e9a1cSJohn Crispin #include <linux/module.h> 95238f7bcSJohn Crispin #include <linux/types.h> 105238f7bcSJohn Crispin #include <linux/platform_device.h> 115238f7bcSJohn Crispin #include <linux/mutex.h> 120cbbdcf9SLinus Walleij #include <linux/gpio/driver.h> 13*2ffd04caSAndy Shevchenko #include <linux/gpio/legacy-of-mm-gpiochip.h> 14a36e9a1cSJohn Crispin #include <linux/of.h> 155238f7bcSJohn Crispin #include <linux/io.h> 16a36e9a1cSJohn Crispin #include <linux/slab.h> 175238f7bcSJohn Crispin 185238f7bcSJohn Crispin #include <lantiq_soc.h> 195238f7bcSJohn Crispin 205238f7bcSJohn Crispin /* 215238f7bcSJohn Crispin * By attaching hardware latches to the EBU it is possible to create output 225238f7bcSJohn Crispin * only gpios. This driver configures a special memory address, which when 235238f7bcSJohn Crispin * written to outputs 16 bit to the latches. 245238f7bcSJohn Crispin */ 255238f7bcSJohn Crispin 265238f7bcSJohn Crispin #define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */ 275238f7bcSJohn Crispin #define LTQ_EBU_WP 0x80000000 /* write protect bit */ 285238f7bcSJohn Crispin 29a36e9a1cSJohn Crispin struct ltq_mm { 30a36e9a1cSJohn Crispin struct of_mm_gpio_chip mmchip; 31a36e9a1cSJohn Crispin u16 shadow; /* shadow the latches state */ 32a36e9a1cSJohn Crispin }; 335238f7bcSJohn Crispin 34a36e9a1cSJohn Crispin /** 35a36e9a1cSJohn Crispin * ltq_mm_apply() - write the shadow value to the ebu address. 36a36e9a1cSJohn Crispin * @chip: Pointer to our private data structure. 37a36e9a1cSJohn Crispin * 38a36e9a1cSJohn Crispin * Write the shadow value to the EBU to set the gpios. We need to set the 39dc5c1439SDejin Zheng * global EBU lock to make sure that PCI/MTD don't break. 40a36e9a1cSJohn Crispin */ 41a36e9a1cSJohn Crispin static void ltq_mm_apply(struct ltq_mm *chip) 425238f7bcSJohn Crispin { 435238f7bcSJohn Crispin unsigned long flags; 445238f7bcSJohn Crispin 455238f7bcSJohn Crispin spin_lock_irqsave(&ebu_lock, flags); 465238f7bcSJohn Crispin ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1); 47a36e9a1cSJohn Crispin __raw_writew(chip->shadow, chip->mmchip.regs); 485238f7bcSJohn Crispin ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); 495238f7bcSJohn Crispin spin_unlock_irqrestore(&ebu_lock, flags); 505238f7bcSJohn Crispin } 515238f7bcSJohn Crispin 52a36e9a1cSJohn Crispin /** 53a36e9a1cSJohn Crispin * ltq_mm_set() - gpio_chip->set - set gpios. 54a36e9a1cSJohn Crispin * @gc: Pointer to gpio_chip device structure. 55a36e9a1cSJohn Crispin * @gpio: GPIO signal number. 56a36e9a1cSJohn Crispin * @val: Value to be written to specified signal. 57a36e9a1cSJohn Crispin * 58a36e9a1cSJohn Crispin * Set the shadow value and call ltq_mm_apply. 59a36e9a1cSJohn Crispin */ 60a36e9a1cSJohn Crispin static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value) 615238f7bcSJohn Crispin { 626aa7dbfaSLinus Walleij struct ltq_mm *chip = gpiochip_get_data(gc); 63a36e9a1cSJohn Crispin 645238f7bcSJohn Crispin if (value) 65a36e9a1cSJohn Crispin chip->shadow |= (1 << offset); 665238f7bcSJohn Crispin else 67a36e9a1cSJohn Crispin chip->shadow &= ~(1 << offset); 68a36e9a1cSJohn Crispin ltq_mm_apply(chip); 695238f7bcSJohn Crispin } 705238f7bcSJohn Crispin 71a36e9a1cSJohn Crispin /** 72a36e9a1cSJohn Crispin * ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction. 73a36e9a1cSJohn Crispin * @gc: Pointer to gpio_chip device structure. 74a36e9a1cSJohn Crispin * @gpio: GPIO signal number. 75a36e9a1cSJohn Crispin * @val: Value to be written to specified signal. 76a36e9a1cSJohn Crispin * 77a36e9a1cSJohn Crispin * Same as ltq_mm_set, always returns 0. 78a36e9a1cSJohn Crispin */ 79a36e9a1cSJohn Crispin static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value) 805238f7bcSJohn Crispin { 81a36e9a1cSJohn Crispin ltq_mm_set(gc, offset, value); 825238f7bcSJohn Crispin 835238f7bcSJohn Crispin return 0; 845238f7bcSJohn Crispin } 855238f7bcSJohn Crispin 86a36e9a1cSJohn Crispin /** 87a36e9a1cSJohn Crispin * ltq_mm_save_regs() - Set initial values of GPIO pins 88a36e9a1cSJohn Crispin * @mm_gc: pointer to memory mapped GPIO chip structure 89a36e9a1cSJohn Crispin */ 90a36e9a1cSJohn Crispin static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc) 915238f7bcSJohn Crispin { 9295c76170SGuenter Roeck struct ltq_mm *chip = 9395c76170SGuenter Roeck container_of(mm_gc, struct ltq_mm, mmchip); 94a36e9a1cSJohn Crispin 95a36e9a1cSJohn Crispin /* tell the ebu controller which memory address we will be using */ 96a36e9a1cSJohn Crispin ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); 97a36e9a1cSJohn Crispin 98a36e9a1cSJohn Crispin ltq_mm_apply(chip); 99a36e9a1cSJohn Crispin } 100a36e9a1cSJohn Crispin 101a36e9a1cSJohn Crispin static int ltq_mm_probe(struct platform_device *pdev) 102a36e9a1cSJohn Crispin { 103a36e9a1cSJohn Crispin struct ltq_mm *chip; 10468a99b18SRicardo Ribalda Delgado u32 shadow; 1055238f7bcSJohn Crispin 106080440a2SRicardo Ribalda Delgado chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 107a36e9a1cSJohn Crispin if (!chip) 1085238f7bcSJohn Crispin return -ENOMEM; 1095238f7bcSJohn Crispin 110da238221SRicardo Ribalda Delgado platform_set_drvdata(pdev, chip); 111da238221SRicardo Ribalda Delgado 112a36e9a1cSJohn Crispin chip->mmchip.gc.ngpio = 16; 113a36e9a1cSJohn Crispin chip->mmchip.gc.direction_output = ltq_mm_dir_out; 114a36e9a1cSJohn Crispin chip->mmchip.gc.set = ltq_mm_set; 115a36e9a1cSJohn Crispin chip->mmchip.save_regs = ltq_mm_save_regs; 1165238f7bcSJohn Crispin 117a36e9a1cSJohn Crispin /* store the shadow value if one was passed by the devicetree */ 11868a99b18SRicardo Ribalda Delgado if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) 11968a99b18SRicardo Ribalda Delgado chip->shadow = shadow; 1205238f7bcSJohn Crispin 1216aa7dbfaSLinus Walleij return of_mm_gpiochip_add_data(pdev->dev.of_node, &chip->mmchip, chip); 1225238f7bcSJohn Crispin } 1235238f7bcSJohn Crispin 124da238221SRicardo Ribalda Delgado static int ltq_mm_remove(struct platform_device *pdev) 125da238221SRicardo Ribalda Delgado { 126da238221SRicardo Ribalda Delgado struct ltq_mm *chip = platform_get_drvdata(pdev); 127da238221SRicardo Ribalda Delgado 128da238221SRicardo Ribalda Delgado of_mm_gpiochip_remove(&chip->mmchip); 129da238221SRicardo Ribalda Delgado 130da238221SRicardo Ribalda Delgado return 0; 131da238221SRicardo Ribalda Delgado } 132da238221SRicardo Ribalda Delgado 133a36e9a1cSJohn Crispin static const struct of_device_id ltq_mm_match[] = { 134a36e9a1cSJohn Crispin { .compatible = "lantiq,gpio-mm" }, 135a36e9a1cSJohn Crispin {}, 136a36e9a1cSJohn Crispin }; 137a36e9a1cSJohn Crispin MODULE_DEVICE_TABLE(of, ltq_mm_match); 138a36e9a1cSJohn Crispin 139a36e9a1cSJohn Crispin static struct platform_driver ltq_mm_driver = { 140a36e9a1cSJohn Crispin .probe = ltq_mm_probe, 141da238221SRicardo Ribalda Delgado .remove = ltq_mm_remove, 1425238f7bcSJohn Crispin .driver = { 143a36e9a1cSJohn Crispin .name = "gpio-mm-ltq", 144a36e9a1cSJohn Crispin .of_match_table = ltq_mm_match, 1455238f7bcSJohn Crispin }, 1465238f7bcSJohn Crispin }; 1475238f7bcSJohn Crispin 148a36e9a1cSJohn Crispin static int __init ltq_mm_init(void) 1495238f7bcSJohn Crispin { 150a36e9a1cSJohn Crispin return platform_driver_register(<q_mm_driver); 1515238f7bcSJohn Crispin } 1525238f7bcSJohn Crispin 153a36e9a1cSJohn Crispin subsys_initcall(ltq_mm_init); 154da238221SRicardo Ribalda Delgado 155da238221SRicardo Ribalda Delgado static void __exit ltq_mm_exit(void) 156da238221SRicardo Ribalda Delgado { 157da238221SRicardo Ribalda Delgado platform_driver_unregister(<q_mm_driver); 158da238221SRicardo Ribalda Delgado } 159da238221SRicardo Ribalda Delgado module_exit(ltq_mm_exit); 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