1 /* 2 * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; version 2 of the License. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program; if not, write to the Free Software 15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. 16 */ 17 #include <linux/kernel.h> 18 #include <linux/slab.h> 19 #include <linux/pci.h> 20 #include <linux/gpio.h> 21 22 #define PCI_VENDOR_ID_ROHM 0x10DB 23 24 struct ioh_reg_comn { 25 u32 ien; 26 u32 istatus; 27 u32 idisp; 28 u32 iclr; 29 u32 imask; 30 u32 imaskclr; 31 u32 po; 32 u32 pi; 33 u32 pm; 34 u32 im_0; 35 u32 im_1; 36 u32 reserved; 37 }; 38 39 struct ioh_regs { 40 struct ioh_reg_comn regs[8]; 41 u32 reserve1[16]; 42 u32 ioh_sel_reg[4]; 43 u32 reserve2[11]; 44 u32 srst; 45 }; 46 47 /** 48 * struct ioh_gpio_reg_data - The register store data. 49 * @po_reg: To store contents of PO register. 50 * @pm_reg: To store contents of PM register. 51 */ 52 struct ioh_gpio_reg_data { 53 u32 po_reg; 54 u32 pm_reg; 55 }; 56 57 /** 58 * struct ioh_gpio - GPIO private data structure. 59 * @base: PCI base address of Memory mapped I/O register. 60 * @reg: Memory mapped IOH GPIO register list. 61 * @dev: Pointer to device structure. 62 * @gpio: Data for GPIO infrastructure. 63 * @ioh_gpio_reg: Memory mapped Register data is saved here 64 * when suspend. 65 * @ch: Indicate GPIO channel 66 */ 67 struct ioh_gpio { 68 void __iomem *base; 69 struct ioh_regs __iomem *reg; 70 struct device *dev; 71 struct gpio_chip gpio; 72 struct ioh_gpio_reg_data ioh_gpio_reg; 73 struct mutex lock; 74 int ch; 75 }; 76 77 static const int num_ports[] = {6, 12, 16, 16, 15, 16, 16, 12}; 78 79 static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) 80 { 81 u32 reg_val; 82 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 83 84 mutex_lock(&chip->lock); 85 reg_val = ioread32(&chip->reg->regs[chip->ch].po); 86 if (val) 87 reg_val |= (1 << nr); 88 else 89 reg_val &= ~(1 << nr); 90 91 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); 92 mutex_unlock(&chip->lock); 93 } 94 95 static int ioh_gpio_get(struct gpio_chip *gpio, unsigned nr) 96 { 97 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 98 99 return ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr); 100 } 101 102 static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, 103 int val) 104 { 105 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 106 u32 pm; 107 u32 reg_val; 108 109 mutex_lock(&chip->lock); 110 pm = ioread32(&chip->reg->regs[chip->ch].pm) & 111 ((1 << num_ports[chip->ch]) - 1); 112 pm |= (1 << nr); 113 iowrite32(pm, &chip->reg->regs[chip->ch].pm); 114 115 reg_val = ioread32(&chip->reg->regs[chip->ch].po); 116 if (val) 117 reg_val |= (1 << nr); 118 else 119 reg_val &= ~(1 << nr); 120 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); 121 122 mutex_unlock(&chip->lock); 123 124 return 0; 125 } 126 127 static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) 128 { 129 struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 130 u32 pm; 131 132 mutex_lock(&chip->lock); 133 pm = ioread32(&chip->reg->regs[chip->ch].pm) & 134 ((1 << num_ports[chip->ch]) - 1); 135 pm &= ~(1 << nr); 136 iowrite32(pm, &chip->reg->regs[chip->ch].pm); 137 mutex_unlock(&chip->lock); 138 139 return 0; 140 } 141 142 #ifdef CONFIG_PM 143 /* 144 * Save register configuration and disable interrupts. 145 */ 146 static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) 147 { 148 chip->ioh_gpio_reg.po_reg = ioread32(&chip->reg->regs[chip->ch].po); 149 chip->ioh_gpio_reg.pm_reg = ioread32(&chip->reg->regs[chip->ch].pm); 150 } 151 152 /* 153 * This function restores the register configuration of the GPIO device. 154 */ 155 static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) 156 { 157 /* to store contents of PO register */ 158 iowrite32(chip->ioh_gpio_reg.po_reg, &chip->reg->regs[chip->ch].po); 159 /* to store contents of PM register */ 160 iowrite32(chip->ioh_gpio_reg.pm_reg, &chip->reg->regs[chip->ch].pm); 161 } 162 #endif 163 164 static void ioh_gpio_setup(struct ioh_gpio *chip, int num_port) 165 { 166 struct gpio_chip *gpio = &chip->gpio; 167 168 gpio->label = dev_name(chip->dev); 169 gpio->owner = THIS_MODULE; 170 gpio->direction_input = ioh_gpio_direction_input; 171 gpio->get = ioh_gpio_get; 172 gpio->direction_output = ioh_gpio_direction_output; 173 gpio->set = ioh_gpio_set; 174 gpio->dbg_show = NULL; 175 gpio->base = -1; 176 gpio->ngpio = num_port; 177 gpio->can_sleep = 0; 178 } 179 180 static int __devinit ioh_gpio_probe(struct pci_dev *pdev, 181 const struct pci_device_id *id) 182 { 183 int ret; 184 int i; 185 struct ioh_gpio *chip; 186 void __iomem *base; 187 void __iomem *chip_save; 188 189 ret = pci_enable_device(pdev); 190 if (ret) { 191 dev_err(&pdev->dev, "%s : pci_enable_device failed", __func__); 192 goto err_pci_enable; 193 } 194 195 ret = pci_request_regions(pdev, KBUILD_MODNAME); 196 if (ret) { 197 dev_err(&pdev->dev, "pci_request_regions failed-%d", ret); 198 goto err_request_regions; 199 } 200 201 base = pci_iomap(pdev, 1, 0); 202 if (base == 0) { 203 dev_err(&pdev->dev, "%s : pci_iomap failed", __func__); 204 ret = -ENOMEM; 205 goto err_iomap; 206 } 207 208 chip_save = kzalloc(sizeof(*chip) * 8, GFP_KERNEL); 209 if (chip_save == NULL) { 210 dev_err(&pdev->dev, "%s : kzalloc failed", __func__); 211 ret = -ENOMEM; 212 goto err_kzalloc; 213 } 214 215 chip = chip_save; 216 for (i = 0; i < 8; i++, chip++) { 217 chip->dev = &pdev->dev; 218 chip->base = base; 219 chip->reg = chip->base; 220 chip->ch = i; 221 mutex_init(&chip->lock); 222 ioh_gpio_setup(chip, num_ports[i]); 223 ret = gpiochip_add(&chip->gpio); 224 if (ret) { 225 dev_err(&pdev->dev, "IOH gpio: Failed to register GPIO\n"); 226 goto err_gpiochip_add; 227 } 228 } 229 230 chip = chip_save; 231 pci_set_drvdata(pdev, chip); 232 233 return 0; 234 235 err_gpiochip_add: 236 while (--i >= 0) { 237 chip--; 238 ret = gpiochip_remove(&chip->gpio); 239 if (ret) 240 dev_err(&pdev->dev, "Failed gpiochip_remove(%d)\n", i); 241 } 242 kfree(chip_save); 243 244 err_kzalloc: 245 pci_iounmap(pdev, base); 246 247 err_iomap: 248 pci_release_regions(pdev); 249 250 err_request_regions: 251 pci_disable_device(pdev); 252 253 err_pci_enable: 254 255 dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret); 256 return ret; 257 } 258 259 static void __devexit ioh_gpio_remove(struct pci_dev *pdev) 260 { 261 int err; 262 int i; 263 struct ioh_gpio *chip = pci_get_drvdata(pdev); 264 void __iomem *chip_save; 265 266 chip_save = chip; 267 for (i = 0; i < 8; i++, chip++) { 268 err = gpiochip_remove(&chip->gpio); 269 if (err) 270 dev_err(&pdev->dev, "Failed gpiochip_remove\n"); 271 } 272 273 chip = chip_save; 274 pci_iounmap(pdev, chip->base); 275 pci_release_regions(pdev); 276 pci_disable_device(pdev); 277 kfree(chip); 278 } 279 280 #ifdef CONFIG_PM 281 static int ioh_gpio_suspend(struct pci_dev *pdev, pm_message_t state) 282 { 283 s32 ret; 284 struct ioh_gpio *chip = pci_get_drvdata(pdev); 285 286 ioh_gpio_save_reg_conf(chip); 287 288 ret = pci_save_state(pdev); 289 if (ret) { 290 dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); 291 return ret; 292 } 293 pci_disable_device(pdev); 294 pci_set_power_state(pdev, PCI_D0); 295 ret = pci_enable_wake(pdev, PCI_D0, 1); 296 if (ret) 297 dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); 298 299 return 0; 300 } 301 302 static int ioh_gpio_resume(struct pci_dev *pdev) 303 { 304 s32 ret; 305 struct ioh_gpio *chip = pci_get_drvdata(pdev); 306 307 ret = pci_enable_wake(pdev, PCI_D0, 0); 308 309 pci_set_power_state(pdev, PCI_D0); 310 ret = pci_enable_device(pdev); 311 if (ret) { 312 dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); 313 return ret; 314 } 315 pci_restore_state(pdev); 316 317 iowrite32(0x01, &chip->reg->srst); 318 iowrite32(0x00, &chip->reg->srst); 319 ioh_gpio_restore_reg_conf(chip); 320 321 return 0; 322 } 323 #else 324 #define ioh_gpio_suspend NULL 325 #define ioh_gpio_resume NULL 326 #endif 327 328 static DEFINE_PCI_DEVICE_TABLE(ioh_gpio_pcidev_id) = { 329 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) }, 330 { 0, } 331 }; 332 MODULE_DEVICE_TABLE(pci, ioh_gpio_pcidev_id); 333 334 static struct pci_driver ioh_gpio_driver = { 335 .name = "ml_ioh_gpio", 336 .id_table = ioh_gpio_pcidev_id, 337 .probe = ioh_gpio_probe, 338 .remove = __devexit_p(ioh_gpio_remove), 339 .suspend = ioh_gpio_suspend, 340 .resume = ioh_gpio_resume 341 }; 342 343 static int __init ioh_gpio_pci_init(void) 344 { 345 return pci_register_driver(&ioh_gpio_driver); 346 } 347 module_init(ioh_gpio_pci_init); 348 349 static void __exit ioh_gpio_pci_exit(void) 350 { 351 pci_unregister_driver(&ioh_gpio_driver); 352 } 353 module_exit(ioh_gpio_pci_exit); 354 355 MODULE_DESCRIPTION("OKI SEMICONDUCTOR ML-IOH series GPIO Driver"); 356 MODULE_LICENSE("GPL"); 357