1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * GPIO latch driver 4 * 5 * Copyright (C) 2022 Sascha Hauer <s.hauer@pengutronix.de> 6 * 7 * This driver implements a GPIO (or better GPO as there is no input) 8 * multiplexer based on latches like this: 9 * 10 * CLK0 ----------------------. ,--------. 11 * CLK1 -------------------. `--------|> #0 | 12 * | | | 13 * OUT0 ----------------+--|-----------|D0 Q0|-----|< 14 * OUT1 --------------+-|--|-----------|D1 Q1|-----|< 15 * OUT2 ------------+-|-|--|-----------|D2 Q2|-----|< 16 * OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|< 17 * OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|< 18 * OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|< 19 * OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|< 20 * OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|< 21 * | | | | | | | | | `--------' 22 * | | | | | | | | | 23 * | | | | | | | | | ,--------. 24 * | | | | | | | | `-----------|> #1 | 25 * | | | | | | | | | | 26 * | | | | | | | `--------------|D0 Q0|-----|< 27 * | | | | | | `----------------|D1 Q1|-----|< 28 * | | | | | `------------------|D2 Q2|-----|< 29 * | | | | `--------------------|D3 Q3|-----|< 30 * | | | `----------------------|D4 Q4|-----|< 31 * | | `------------------------|D5 Q5|-----|< 32 * | `--------------------------|D6 Q6|-----|< 33 * `----------------------------|D7 Q7|-----|< 34 * `--------' 35 * 36 * The above is just an example. The actual number of number of latches and 37 * the number of inputs per latch is derived from the number of GPIOs given 38 * in the corresponding device tree properties. 39 */ 40 41 #include <linux/cleanup.h> 42 #include <linux/err.h> 43 #include <linux/gpio/consumer.h> 44 #include <linux/gpio/driver.h> 45 #include <linux/module.h> 46 #include <linux/mod_devicetable.h> 47 #include <linux/platform_device.h> 48 #include <linux/property.h> 49 #include <linux/delay.h> 50 51 #include "gpiolib.h" 52 53 struct gpio_latch_priv { 54 struct gpio_chip gc; 55 struct gpio_descs *clk_gpios; 56 struct gpio_descs *latched_gpios; 57 int n_latched_gpios; 58 unsigned int setup_duration_ns; 59 unsigned int clock_duration_ns; 60 unsigned long *shadow; 61 /* 62 * Depending on whether any of the underlying GPIOs may sleep we either 63 * use a mutex or a spinlock to protect our shadow map. 64 */ 65 union { 66 struct mutex mutex; /* protects @shadow */ 67 spinlock_t spinlock; /* protects @shadow */ 68 }; 69 }; 70 71 static int gpio_latch_get_direction(struct gpio_chip *gc, unsigned int offset) 72 { 73 return GPIO_LINE_DIRECTION_OUT; 74 } 75 76 static int gpio_latch_set_unlocked(struct gpio_latch_priv *priv, 77 int (*set)(struct gpio_desc *desc, int value), 78 unsigned int offset, bool val) 79 { 80 int latch = offset / priv->n_latched_gpios, i, ret; 81 82 assign_bit(offset, priv->shadow, val); 83 84 for (i = 0; i < priv->n_latched_gpios; i++) { 85 ret = set(priv->latched_gpios->desc[i], 86 test_bit(latch * priv->n_latched_gpios + i, 87 priv->shadow)); 88 if (ret) 89 return ret; 90 } 91 92 ndelay(priv->setup_duration_ns); 93 set(priv->clk_gpios->desc[latch], 1); 94 ndelay(priv->clock_duration_ns); 95 set(priv->clk_gpios->desc[latch], 0); 96 97 return 0; 98 } 99 100 static int gpio_latch_set(struct gpio_chip *gc, unsigned int offset, int val) 101 { 102 struct gpio_latch_priv *priv = gpiochip_get_data(gc); 103 104 guard(spinlock_irqsave)(&priv->spinlock); 105 106 return gpio_latch_set_unlocked(priv, gpiod_set_value, offset, val); 107 } 108 109 static int gpio_latch_set_can_sleep(struct gpio_chip *gc, unsigned int offset, int val) 110 { 111 struct gpio_latch_priv *priv = gpiochip_get_data(gc); 112 113 guard(mutex)(&priv->mutex); 114 115 return gpio_latch_set_unlocked(priv, gpiod_set_value_cansleep, offset, val); 116 } 117 118 static bool gpio_latch_can_sleep(struct gpio_latch_priv *priv, unsigned int n_latches) 119 { 120 int i; 121 122 for (i = 0; i < n_latches; i++) 123 if (gpiod_cansleep(priv->clk_gpios->desc[i])) 124 return true; 125 126 for (i = 0; i < priv->n_latched_gpios; i++) 127 if (gpiod_cansleep(priv->latched_gpios->desc[i])) 128 return true; 129 130 return false; 131 } 132 133 /* 134 * Some value which is still acceptable to delay in atomic context. 135 * If we need to go higher we might have to switch to usleep_range(), 136 * but that cannot ne used in atomic context and the driver would have 137 * to be adjusted to support that. 138 */ 139 #define DURATION_NS_MAX 5000 140 141 static int gpio_latch_probe(struct platform_device *pdev) 142 { 143 struct device *dev = &pdev->dev; 144 struct gpio_latch_priv *priv; 145 unsigned int n_latches; 146 147 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 148 if (!priv) 149 return -ENOMEM; 150 151 priv->clk_gpios = devm_gpiod_get_array(dev, "clk", GPIOD_OUT_LOW); 152 if (IS_ERR(priv->clk_gpios)) 153 return PTR_ERR(priv->clk_gpios); 154 155 priv->latched_gpios = devm_gpiod_get_array(dev, "latched", GPIOD_OUT_LOW); 156 if (IS_ERR(priv->latched_gpios)) 157 return PTR_ERR(priv->latched_gpios); 158 159 n_latches = priv->clk_gpios->ndescs; 160 priv->n_latched_gpios = priv->latched_gpios->ndescs; 161 162 priv->shadow = devm_bitmap_zalloc(dev, n_latches * priv->n_latched_gpios, 163 GFP_KERNEL); 164 if (!priv->shadow) 165 return -ENOMEM; 166 167 if (gpio_latch_can_sleep(priv, n_latches)) { 168 priv->gc.can_sleep = true; 169 priv->gc.set_rv = gpio_latch_set_can_sleep; 170 mutex_init(&priv->mutex); 171 } else { 172 priv->gc.can_sleep = false; 173 priv->gc.set_rv = gpio_latch_set; 174 spin_lock_init(&priv->spinlock); 175 } 176 177 device_property_read_u32(dev, "setup-duration-ns", 178 &priv->setup_duration_ns); 179 if (priv->setup_duration_ns > DURATION_NS_MAX) { 180 dev_warn(dev, "setup-duration-ns too high, limit to %d\n", 181 DURATION_NS_MAX); 182 priv->setup_duration_ns = DURATION_NS_MAX; 183 } 184 185 device_property_read_u32(dev, "clock-duration-ns", 186 &priv->clock_duration_ns); 187 if (priv->clock_duration_ns > DURATION_NS_MAX) { 188 dev_warn(dev, "clock-duration-ns too high, limit to %d\n", 189 DURATION_NS_MAX); 190 priv->clock_duration_ns = DURATION_NS_MAX; 191 } 192 193 priv->gc.get_direction = gpio_latch_get_direction; 194 priv->gc.ngpio = n_latches * priv->n_latched_gpios; 195 priv->gc.owner = THIS_MODULE; 196 priv->gc.base = -1; 197 priv->gc.parent = dev; 198 199 platform_set_drvdata(pdev, priv); 200 201 return devm_gpiochip_add_data(dev, &priv->gc, priv); 202 } 203 204 static const struct of_device_id gpio_latch_ids[] = { 205 { 206 .compatible = "gpio-latch", 207 }, 208 { /* sentinel */ } 209 }; 210 MODULE_DEVICE_TABLE(of, gpio_latch_ids); 211 212 static struct platform_driver gpio_latch_driver = { 213 .driver = { 214 .name = "gpio-latch", 215 .of_match_table = gpio_latch_ids, 216 }, 217 .probe = gpio_latch_probe, 218 }; 219 module_platform_driver(gpio_latch_driver); 220 221 MODULE_LICENSE("GPL v2"); 222 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); 223 MODULE_DESCRIPTION("GPIO latch driver"); 224