xref: /linux/drivers/gpio/gpio-latch.c (revision 72856afd33f2fa166c06f1536003e300e51ecf09)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * GPIO latch driver
4  *
5  *  Copyright (C) 2022 Sascha Hauer <s.hauer@pengutronix.de>
6  *
7  * This driver implements a GPIO (or better GPO as there is no input)
8  * multiplexer based on latches like this:
9  *
10  * CLK0 ----------------------.        ,--------.
11  * CLK1 -------------------.  `--------|>    #0 |
12  *                         |           |        |
13  * OUT0 ----------------+--|-----------|D0    Q0|-----|<
14  * OUT1 --------------+-|--|-----------|D1    Q1|-----|<
15  * OUT2 ------------+-|-|--|-----------|D2    Q2|-----|<
16  * OUT3 ----------+-|-|-|--|-----------|D3    Q3|-----|<
17  * OUT4 --------+-|-|-|-|--|-----------|D4    Q4|-----|<
18  * OUT5 ------+-|-|-|-|-|--|-----------|D5    Q5|-----|<
19  * OUT6 ----+-|-|-|-|-|-|--|-----------|D6    Q6|-----|<
20  * OUT7 --+-|-|-|-|-|-|-|--|-----------|D7    Q7|-----|<
21  *        | | | | | | | |  |           `--------'
22  *        | | | | | | | |  |
23  *        | | | | | | | |  |           ,--------.
24  *        | | | | | | | |  `-----------|>    #1 |
25  *        | | | | | | | |              |        |
26  *        | | | | | | | `--------------|D0    Q0|-----|<
27  *        | | | | | | `----------------|D1    Q1|-----|<
28  *        | | | | | `------------------|D2    Q2|-----|<
29  *        | | | | `--------------------|D3    Q3|-----|<
30  *        | | | `----------------------|D4    Q4|-----|<
31  *        | | `------------------------|D5    Q5|-----|<
32  *        | `--------------------------|D6    Q6|-----|<
33  *        `----------------------------|D7    Q7|-----|<
34  *                                     `--------'
35  *
36  * The above is just an example. The actual number of number of latches and
37  * the number of inputs per latch is derived from the number of GPIOs given
38  * in the corresponding device tree properties.
39  */
40 
41 #include <linux/cleanup.h>
42 #include <linux/err.h>
43 #include <linux/gpio/consumer.h>
44 #include <linux/gpio/driver.h>
45 #include <linux/module.h>
46 #include <linux/platform_device.h>
47 #include <linux/property.h>
48 #include <linux/delay.h>
49 
50 struct gpio_latch_priv {
51 	struct gpio_chip gc;
52 	struct gpio_descs *clk_gpios;
53 	struct gpio_descs *latched_gpios;
54 	int n_latched_gpios;
55 	unsigned int setup_duration_ns;
56 	unsigned int clock_duration_ns;
57 	unsigned long *shadow;
58 	/*
59 	 * Depending on whether any of the underlying GPIOs may sleep we either
60 	 * use a mutex or a spinlock to protect our shadow map.
61 	 */
62 	union {
63 		struct mutex mutex; /* protects @shadow */
64 		spinlock_t spinlock; /* protects @shadow */
65 	};
66 };
67 
68 static int gpio_latch_get_direction(struct gpio_chip *gc, unsigned int offset)
69 {
70 	return GPIO_LINE_DIRECTION_OUT;
71 }
72 
73 static int gpio_latch_set_unlocked(struct gpio_latch_priv *priv,
74 				   int (*set)(struct gpio_desc *desc, int value),
75 				   unsigned int offset, bool val)
76 {
77 	int latch = offset / priv->n_latched_gpios, i, ret;
78 
79 	assign_bit(offset, priv->shadow, val);
80 
81 	for (i = 0; i < priv->n_latched_gpios; i++) {
82 		ret = set(priv->latched_gpios->desc[i],
83 			  test_bit(latch * priv->n_latched_gpios + i,
84 				   priv->shadow));
85 		if (ret)
86 			return ret;
87 	}
88 
89 	ndelay(priv->setup_duration_ns);
90 	set(priv->clk_gpios->desc[latch], 1);
91 	ndelay(priv->clock_duration_ns);
92 	set(priv->clk_gpios->desc[latch], 0);
93 
94 	return 0;
95 }
96 
97 static int gpio_latch_set(struct gpio_chip *gc, unsigned int offset, int val)
98 {
99 	struct gpio_latch_priv *priv = gpiochip_get_data(gc);
100 
101 	guard(spinlock_irqsave)(&priv->spinlock);
102 
103 	return gpio_latch_set_unlocked(priv, gpiod_set_value, offset, val);
104 }
105 
106 static int gpio_latch_set_can_sleep(struct gpio_chip *gc, unsigned int offset, int val)
107 {
108 	struct gpio_latch_priv *priv = gpiochip_get_data(gc);
109 
110 	guard(mutex)(&priv->mutex);
111 
112 	return gpio_latch_set_unlocked(priv, gpiod_set_value_cansleep, offset, val);
113 }
114 
115 static bool gpio_latch_can_sleep(struct gpio_latch_priv *priv, unsigned int n_latches)
116 {
117 	int i;
118 
119 	for (i = 0; i < n_latches; i++)
120 		if (gpiod_cansleep(priv->clk_gpios->desc[i]))
121 			return true;
122 
123 	for (i = 0; i < priv->n_latched_gpios; i++)
124 		if (gpiod_cansleep(priv->latched_gpios->desc[i]))
125 			return true;
126 
127 	return false;
128 }
129 
130 /*
131  * Some value which is still acceptable to delay in atomic context.
132  * If we need to go higher we might have to switch to usleep_range(),
133  * but that cannot ne used in atomic context and the driver would have
134  * to be adjusted to support that.
135  */
136 #define DURATION_NS_MAX 5000
137 
138 static int gpio_latch_probe(struct platform_device *pdev)
139 {
140 	struct device *dev = &pdev->dev;
141 	struct gpio_latch_priv *priv;
142 	unsigned int n_latches;
143 
144 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
145 	if (!priv)
146 		return -ENOMEM;
147 
148 	priv->clk_gpios = devm_gpiod_get_array(dev, "clk", GPIOD_OUT_LOW);
149 	if (IS_ERR(priv->clk_gpios))
150 		return PTR_ERR(priv->clk_gpios);
151 
152 	priv->latched_gpios = devm_gpiod_get_array(dev, "latched", GPIOD_OUT_LOW);
153 	if (IS_ERR(priv->latched_gpios))
154 		return PTR_ERR(priv->latched_gpios);
155 
156 	n_latches = priv->clk_gpios->ndescs;
157 	priv->n_latched_gpios = priv->latched_gpios->ndescs;
158 
159 	priv->shadow = devm_bitmap_zalloc(dev, n_latches * priv->n_latched_gpios,
160 					  GFP_KERNEL);
161 	if (!priv->shadow)
162 		return -ENOMEM;
163 
164 	if (gpio_latch_can_sleep(priv, n_latches)) {
165 		priv->gc.can_sleep = true;
166 		priv->gc.set = gpio_latch_set_can_sleep;
167 		mutex_init(&priv->mutex);
168 	} else {
169 		priv->gc.can_sleep = false;
170 		priv->gc.set = gpio_latch_set;
171 		spin_lock_init(&priv->spinlock);
172 	}
173 
174 	device_property_read_u32(dev, "setup-duration-ns",
175 				 &priv->setup_duration_ns);
176 	if (priv->setup_duration_ns > DURATION_NS_MAX) {
177 		dev_warn(dev, "setup-duration-ns too high, limit to %d\n",
178 			 DURATION_NS_MAX);
179 		priv->setup_duration_ns = DURATION_NS_MAX;
180 	}
181 
182 	device_property_read_u32(dev, "clock-duration-ns",
183 				 &priv->clock_duration_ns);
184 	if (priv->clock_duration_ns > DURATION_NS_MAX) {
185 		dev_warn(dev, "clock-duration-ns too high, limit to %d\n",
186 			 DURATION_NS_MAX);
187 		priv->clock_duration_ns = DURATION_NS_MAX;
188 	}
189 
190 	priv->gc.get_direction = gpio_latch_get_direction;
191 	priv->gc.ngpio = n_latches * priv->n_latched_gpios;
192 	priv->gc.owner = THIS_MODULE;
193 	priv->gc.base = -1;
194 	priv->gc.parent = dev;
195 
196 	platform_set_drvdata(pdev, priv);
197 
198 	return devm_gpiochip_add_data(dev, &priv->gc, priv);
199 }
200 
201 static const struct of_device_id gpio_latch_ids[] = {
202 	{
203 		.compatible = "gpio-latch",
204 	},
205 	{ /* sentinel */ }
206 };
207 MODULE_DEVICE_TABLE(of, gpio_latch_ids);
208 
209 static struct platform_driver gpio_latch_driver = {
210 	.driver	= {
211 		.name		= "gpio-latch",
212 		.of_match_table	= gpio_latch_ids,
213 	},
214 	.probe	= gpio_latch_probe,
215 };
216 module_platform_driver(gpio_latch_driver);
217 
218 MODULE_LICENSE("GPL v2");
219 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
220 MODULE_DESCRIPTION("GPIO latch driver");
221