xref: /linux/drivers/gpio/gpio-htc-egpio.c (revision fc2d791a43d3880496d1c729b8bd74d2c19cb4e7) 
1 /*
2  * Support for the GPIO/IRQ expander chips present on several HTC phones.
3  * These are implemented in CPLD chips present on the board.
4  *
5  * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
6  * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
7  *
8  * This file may be distributed under the terms of the GNU GPL license.
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/io.h>
16 #include <linux/spinlock.h>
17 #include <linux/platform_data/gpio-htc-egpio.h>
18 #include <linux/platform_device.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/gpio/driver.h>
22 
23 struct egpio_chip {
24 	int              reg_start;
25 	int              cached_values;
26 	unsigned long    is_out;
27 	struct device    *dev;
28 	struct gpio_chip chip;
29 };
30 
31 struct egpio_info {
32 	spinlock_t        lock;
33 
34 	/* iomem info */
35 	void __iomem      *base_addr;
36 	int               bus_shift;	/* byte shift */
37 	int               reg_shift;	/* bit shift */
38 	int               reg_mask;
39 
40 	/* irq info */
41 	int               ack_register;
42 	int               ack_write;
43 	u16               irqs_enabled;
44 	uint              irq_start;
45 	int               nirqs;
46 	uint              chained_irq;
47 
48 	/* egpio info */
49 	int               nchips;
50 	struct egpio_chip chip[] __counted_by(nchips);
51 };
52 
53 static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
54 {
55 	writew(value, ei->base_addr + (reg << ei->bus_shift));
56 }
57 
58 static inline u16 egpio_readw(struct egpio_info *ei, int reg)
59 {
60 	return readw(ei->base_addr + (reg << ei->bus_shift));
61 }
62 
63 /*
64  * IRQs
65  */
66 
67 static inline void ack_irqs(struct egpio_info *ei)
68 {
69 	egpio_writew(ei->ack_write, ei, ei->ack_register);
70 	pr_debug("EGPIO ack - write %x to base+%x\n",
71 			ei->ack_write, ei->ack_register << ei->bus_shift);
72 }
73 
74 static void egpio_ack(struct irq_data *data)
75 {
76 }
77 
78 /* There does not appear to be a way to proactively mask interrupts
79  * on the egpio chip itself.  So, we simply ignore interrupts that
80  * aren't desired. */
81 static void egpio_mask(struct irq_data *data)
82 {
83 	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
84 	ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
85 	pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
86 }
87 
88 static void egpio_unmask(struct irq_data *data)
89 {
90 	struct egpio_info *ei = irq_data_get_irq_chip_data(data);
91 	ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
92 	pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
93 }
94 
95 static struct irq_chip egpio_muxed_chip = {
96 	.name		= "htc-egpio",
97 	.irq_ack	= egpio_ack,
98 	.irq_mask	= egpio_mask,
99 	.irq_unmask	= egpio_unmask,
100 };
101 
102 static void egpio_handler(struct irq_desc *desc)
103 {
104 	struct egpio_info *ei = irq_desc_get_handler_data(desc);
105 	int irqpin;
106 
107 	/* Read current pins. */
108 	unsigned long readval = egpio_readw(ei, ei->ack_register);
109 	pr_debug("IRQ reg: %x\n", (unsigned int)readval);
110 	/* Ack/unmask interrupts. */
111 	ack_irqs(ei);
112 	/* Process all set pins. */
113 	readval &= ei->irqs_enabled;
114 	for_each_set_bit(irqpin, &readval, ei->nirqs) {
115 		/* Run irq handler */
116 		pr_debug("got IRQ %d\n", irqpin);
117 		generic_handle_irq(ei->irq_start + irqpin);
118 	}
119 }
120 
121 static inline int egpio_pos(struct egpio_info *ei, int bit)
122 {
123 	return bit >> ei->reg_shift;
124 }
125 
126 static inline int egpio_bit(struct egpio_info *ei, int bit)
127 {
128 	return 1 << (bit & ((1 << ei->reg_shift)-1));
129 }
130 
131 /*
132  * Input pins
133  */
134 
135 static int egpio_get(struct gpio_chip *chip, unsigned offset)
136 {
137 	struct egpio_chip *egpio;
138 	struct egpio_info *ei;
139 	unsigned           bit;
140 	int                reg;
141 	int                value;
142 
143 	pr_debug("egpio_get_value(%d)\n", chip->base + offset);
144 
145 	egpio = gpiochip_get_data(chip);
146 	ei    = dev_get_drvdata(egpio->dev);
147 	bit   = egpio_bit(ei, offset);
148 	reg   = egpio->reg_start + egpio_pos(ei, offset);
149 
150 	if (test_bit(offset, &egpio->is_out)) {
151 		return !!(egpio->cached_values & (1 << offset));
152 	} else {
153 		value = egpio_readw(ei, reg);
154 		pr_debug("readw(%p + %x) = %x\n",
155 			 ei->base_addr, reg << ei->bus_shift, value);
156 		return !!(value & bit);
157 	}
158 }
159 
160 static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
161 {
162 	struct egpio_chip *egpio;
163 
164 	egpio = gpiochip_get_data(chip);
165 	return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
166 }
167 
168 
169 /*
170  * Output pins
171  */
172 
173 static int egpio_set(struct gpio_chip *chip, unsigned int offset, int value)
174 {
175 	unsigned long     flag;
176 	struct egpio_chip *egpio;
177 	struct egpio_info *ei;
178 	int               pos;
179 	int               reg;
180 	int               shift;
181 
182 	pr_debug("egpio_set(%s, %d(%d), %d)\n",
183 			chip->label, offset, offset+chip->base, value);
184 
185 	egpio = gpiochip_get_data(chip);
186 	ei    = dev_get_drvdata(egpio->dev);
187 	pos   = egpio_pos(ei, offset);
188 	reg   = egpio->reg_start + pos;
189 	shift = pos << ei->reg_shift;
190 
191 	pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
192 			reg, (egpio->cached_values >> shift) & ei->reg_mask);
193 
194 	spin_lock_irqsave(&ei->lock, flag);
195 	if (value)
196 		egpio->cached_values |= (1 << offset);
197 	else
198 		egpio->cached_values &= ~(1 << offset);
199 	egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
200 	spin_unlock_irqrestore(&ei->lock, flag);
201 
202 	return 0;
203 }
204 
205 static int egpio_direction_output(struct gpio_chip *chip,
206 					unsigned offset, int value)
207 {
208 	struct egpio_chip *egpio;
209 
210 	egpio = gpiochip_get_data(chip);
211 	if (test_bit(offset, &egpio->is_out))
212 		return egpio_set(chip, offset, value);
213 
214 	return -EINVAL;
215 }
216 
217 static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
218 {
219 	struct egpio_chip *egpio;
220 
221 	egpio = gpiochip_get_data(chip);
222 
223 	if (test_bit(offset, &egpio->is_out))
224 		return GPIO_LINE_DIRECTION_OUT;
225 
226 	return GPIO_LINE_DIRECTION_IN;
227 }
228 
229 static void egpio_write_cache(struct egpio_info *ei)
230 {
231 	int               i;
232 	struct egpio_chip *egpio;
233 	int               shift;
234 
235 	for (i = 0; i < ei->nchips; i++) {
236 		egpio = &(ei->chip[i]);
237 		if (!egpio->is_out)
238 			continue;
239 
240 		for (shift = 0; shift < egpio->chip.ngpio;
241 				shift += (1<<ei->reg_shift)) {
242 
243 			int reg = egpio->reg_start + egpio_pos(ei, shift);
244 
245 			if (!((egpio->is_out >> shift) & ei->reg_mask))
246 				continue;
247 
248 			pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
249 				(egpio->cached_values >> shift) & ei->reg_mask,
250 				egpio_readw(ei, reg));
251 
252 			egpio_writew((egpio->cached_values >> shift)
253 					& ei->reg_mask, ei, reg);
254 		}
255 	}
256 }
257 
258 
259 /*
260  * Setup
261  */
262 
263 static int __init egpio_probe(struct platform_device *pdev)
264 {
265 	struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
266 	struct resource   *res;
267 	struct egpio_info *ei;
268 	struct gpio_chip  *chip;
269 	unsigned int      irq, irq_end;
270 	int               i;
271 
272 	/* Initialize ei data structure. */
273 	ei = devm_kzalloc(&pdev->dev, struct_size(ei, chip, pdata->num_chips), GFP_KERNEL);
274 	if (!ei)
275 		return -ENOMEM;
276 
277 	ei->nchips = pdata->num_chips;
278 
279 	spin_lock_init(&ei->lock);
280 
281 	/* Find chained irq */
282 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
283 	if (res)
284 		ei->chained_irq = res->start;
285 
286 	/* Map egpio chip into virtual address space. */
287 	ei->base_addr = devm_platform_ioremap_resource(pdev, 0);
288 	if (IS_ERR(ei->base_addr))
289 		return PTR_ERR(ei->base_addr);
290 
291 	if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
292 		return -EINVAL;
293 
294 	ei->bus_shift = fls(pdata->bus_width - 1) - 3;
295 	pr_debug("bus_shift = %d\n", ei->bus_shift);
296 
297 	if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
298 		return -EINVAL;
299 
300 	ei->reg_shift = fls(pdata->reg_width - 1);
301 	pr_debug("reg_shift = %d\n", ei->reg_shift);
302 
303 	ei->reg_mask = (1 << pdata->reg_width) - 1;
304 
305 	platform_set_drvdata(pdev, ei);
306 
307 	for (i = 0; i < ei->nchips; i++) {
308 		ei->chip[i].reg_start = pdata->chip[i].reg_start;
309 		ei->chip[i].cached_values = pdata->chip[i].initial_values;
310 		ei->chip[i].is_out = pdata->chip[i].direction;
311 		ei->chip[i].dev = &(pdev->dev);
312 		chip = &(ei->chip[i].chip);
313 		chip->label = devm_kasprintf(&pdev->dev, GFP_KERNEL,
314 					     "htc-egpio-%d",
315 					     i);
316 		if (!chip->label)
317 			return -ENOMEM;
318 
319 		chip->parent          = &pdev->dev;
320 		chip->owner           = THIS_MODULE;
321 		chip->get             = egpio_get;
322 		chip->set             = egpio_set;
323 		chip->direction_input = egpio_direction_input;
324 		chip->direction_output = egpio_direction_output;
325 		chip->get_direction   = egpio_get_direction;
326 		chip->base            = pdata->chip[i].gpio_base;
327 		chip->ngpio           = pdata->chip[i].num_gpios;
328 
329 		gpiochip_add_data(chip, &ei->chip[i]);
330 	}
331 
332 	/* Set initial pin values */
333 	egpio_write_cache(ei);
334 
335 	ei->irq_start = pdata->irq_base;
336 	ei->nirqs = pdata->num_irqs;
337 	ei->ack_register = pdata->ack_register;
338 
339 	if (ei->chained_irq) {
340 		/* Setup irq handlers */
341 		ei->ack_write = 0xFFFF;
342 		if (pdata->invert_acks)
343 			ei->ack_write = 0;
344 		irq_end = ei->irq_start + ei->nirqs;
345 		for (irq = ei->irq_start; irq < irq_end; irq++) {
346 			irq_set_chip_and_handler(irq, &egpio_muxed_chip,
347 						 handle_simple_irq);
348 			irq_set_chip_data(irq, ei);
349 			irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
350 		}
351 		irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
352 		irq_set_chained_handler_and_data(ei->chained_irq,
353 						 egpio_handler, ei);
354 		ack_irqs(ei);
355 
356 		device_init_wakeup(&pdev->dev, 1);
357 	}
358 
359 	return 0;
360 }
361 
362 static int egpio_suspend(struct device *dev)
363 {
364 	struct egpio_info *ei = dev_get_drvdata(dev);
365 
366 	if (ei->chained_irq && device_may_wakeup(dev))
367 		enable_irq_wake(ei->chained_irq);
368 	return 0;
369 }
370 
371 static int egpio_resume(struct device *dev)
372 {
373 	struct egpio_info *ei = dev_get_drvdata(dev);
374 
375 	if (ei->chained_irq && device_may_wakeup(dev))
376 		disable_irq_wake(ei->chained_irq);
377 
378 	/* Update registers from the cache, in case
379 	   the CPLD was powered off during suspend */
380 	egpio_write_cache(ei);
381 	return 0;
382 }
383 
384 static DEFINE_SIMPLE_DEV_PM_OPS(egpio_pm_ops, egpio_suspend, egpio_resume);
385 
386 static struct platform_driver egpio_driver = {
387 	.driver = {
388 		.name = "htc-egpio",
389 		.suppress_bind_attrs = true,
390 		.pm = pm_sleep_ptr(&egpio_pm_ops),
391 	},
392 };
393 
394 static int __init egpio_init(void)
395 {
396 	return platform_driver_probe(&egpio_driver, egpio_probe);
397 }
398 /* start early for dependencies */
399 subsys_initcall(egpio_init);
400