1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2019 VeriSilicon Limited. 4 * Copyright (C) 2025 Blaize, Inc. 5 */ 6 7 #include <linux/errno.h> 8 #include <linux/gpio/driver.h> 9 #include <linux/gpio/generic.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/io.h> 13 #include <linux/module.h> 14 #include <linux/platform_device.h> 15 #include <linux/property.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 19 #define GPIO_DIR_REG 0x00 20 #define GPIO_CTRL_REG 0x04 21 #define GPIO_SET_REG 0x08 22 #define GPIO_CLR_REG 0x0C 23 #define GPIO_ODATA_REG 0x10 24 #define GPIO_IDATA_REG 0x14 25 #define GPIO_IEN_REG 0x18 26 #define GPIO_IS_REG 0x1C 27 #define GPIO_IBE_REG 0x20 28 #define GPIO_IEV_REG 0x24 29 #define GPIO_RIS_REG 0x28 30 #define GPIO_IM_REG 0x2C 31 #define GPIO_MIS_REG 0x30 32 #define GPIO_IC_REG 0x34 33 #define GPIO_DB_REG 0x38 34 #define GPIO_DFG_REG 0x3C 35 36 #define DRIVER_NAME "blzp1600-gpio" 37 38 struct blzp1600_gpio { 39 void __iomem *base; 40 struct gpio_generic_chip gen_gc; 41 int irq; 42 }; 43 44 static inline struct blzp1600_gpio *get_blzp1600_gpio_from_irq_data(struct irq_data *d) 45 { 46 return gpiochip_get_data(irq_data_get_irq_chip_data(d)); 47 } 48 49 static inline struct blzp1600_gpio *get_blzp1600_gpio_from_irq_desc(struct irq_desc *d) 50 { 51 return gpiochip_get_data(irq_desc_get_handler_data(d)); 52 } 53 54 static inline u32 blzp1600_gpio_read(struct blzp1600_gpio *chip, unsigned int offset) 55 { 56 return readl_relaxed(chip->base + offset); 57 } 58 59 static inline void blzp1600_gpio_write(struct blzp1600_gpio *chip, unsigned int offset, u32 val) 60 { 61 writel_relaxed(val, chip->base + offset); 62 } 63 64 static inline void blzp1600_gpio_rmw(void __iomem *reg, u32 mask, bool set) 65 { 66 u32 val = readl_relaxed(reg); 67 68 if (set) 69 val |= mask; 70 else 71 val &= ~mask; 72 73 writel_relaxed(val, reg); 74 } 75 76 static void blzp1600_gpio_irq_mask(struct irq_data *d) 77 { 78 struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d); 79 80 guard(gpio_generic_lock_irqsave)(&chip->gen_gc); 81 blzp1600_gpio_rmw(chip->base + GPIO_IM_REG, BIT(d->hwirq), 1); 82 } 83 84 static void blzp1600_gpio_irq_unmask(struct irq_data *d) 85 { 86 struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d); 87 88 guard(gpio_generic_lock_irqsave)(&chip->gen_gc); 89 blzp1600_gpio_rmw(chip->base + GPIO_IM_REG, BIT(d->hwirq), 0); 90 } 91 92 static void blzp1600_gpio_irq_ack(struct irq_data *d) 93 { 94 struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d); 95 96 blzp1600_gpio_write(chip, GPIO_IC_REG, BIT(d->hwirq)); 97 } 98 99 static void blzp1600_gpio_irq_enable(struct irq_data *d) 100 { 101 struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d); 102 103 gpiochip_enable_irq(&chip->gen_gc.gc, irqd_to_hwirq(d)); 104 105 guard(gpio_generic_lock_irqsave)(&chip->gen_gc); 106 blzp1600_gpio_rmw(chip->base + GPIO_DIR_REG, BIT(d->hwirq), 0); 107 blzp1600_gpio_rmw(chip->base + GPIO_IEN_REG, BIT(d->hwirq), 1); 108 } 109 110 static void blzp1600_gpio_irq_disable(struct irq_data *d) 111 { 112 struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d); 113 114 guard(gpio_generic_lock_irqsave)(&chip->gen_gc); 115 blzp1600_gpio_rmw(chip->base + GPIO_IEN_REG, BIT(d->hwirq), 0); 116 gpiochip_disable_irq(&chip->gen_gc.gc, irqd_to_hwirq(d)); 117 } 118 119 static int blzp1600_gpio_irq_set_type(struct irq_data *d, u32 type) 120 { 121 struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d); 122 u32 edge_level, single_both, fall_rise; 123 int mask = BIT(d->hwirq); 124 125 guard(gpio_generic_lock_irqsave)(&chip->gen_gc); 126 edge_level = blzp1600_gpio_read(chip, GPIO_IS_REG); 127 single_both = blzp1600_gpio_read(chip, GPIO_IBE_REG); 128 fall_rise = blzp1600_gpio_read(chip, GPIO_IEV_REG); 129 130 switch (type) { 131 case IRQ_TYPE_EDGE_BOTH: 132 edge_level &= ~mask; 133 single_both |= mask; 134 break; 135 case IRQ_TYPE_EDGE_RISING: 136 edge_level &= ~mask; 137 single_both &= ~mask; 138 fall_rise |= mask; 139 break; 140 case IRQ_TYPE_EDGE_FALLING: 141 edge_level &= ~mask; 142 single_both &= ~mask; 143 fall_rise &= ~mask; 144 break; 145 case IRQ_TYPE_LEVEL_HIGH: 146 edge_level |= mask; 147 fall_rise |= mask; 148 break; 149 case IRQ_TYPE_LEVEL_LOW: 150 edge_level |= mask; 151 fall_rise &= ~mask; 152 break; 153 default: 154 return -EINVAL; 155 } 156 157 blzp1600_gpio_write(chip, GPIO_IS_REG, edge_level); 158 blzp1600_gpio_write(chip, GPIO_IBE_REG, single_both); 159 blzp1600_gpio_write(chip, GPIO_IEV_REG, fall_rise); 160 161 if (type & IRQ_TYPE_LEVEL_MASK) 162 irq_set_handler_locked(d, handle_level_irq); 163 else 164 irq_set_handler_locked(d, handle_edge_irq); 165 166 return 0; 167 } 168 169 static const struct irq_chip blzp1600_gpio_irqchip = { 170 .name = DRIVER_NAME, 171 .irq_ack = blzp1600_gpio_irq_ack, 172 .irq_mask = blzp1600_gpio_irq_mask, 173 .irq_unmask = blzp1600_gpio_irq_unmask, 174 .irq_set_type = blzp1600_gpio_irq_set_type, 175 .irq_enable = blzp1600_gpio_irq_enable, 176 .irq_disable = blzp1600_gpio_irq_disable, 177 .flags = IRQCHIP_IMMUTABLE | IRQCHIP_MASK_ON_SUSPEND, 178 GPIOCHIP_IRQ_RESOURCE_HELPERS, 179 }; 180 181 static void blzp1600_gpio_irqhandler(struct irq_desc *desc) 182 { 183 struct blzp1600_gpio *gpio = get_blzp1600_gpio_from_irq_desc(desc); 184 struct irq_chip *irqchip = irq_desc_get_chip(desc); 185 unsigned long irq_status; 186 int hwirq = 0; 187 188 chained_irq_enter(irqchip, desc); 189 irq_status = blzp1600_gpio_read(gpio, GPIO_RIS_REG); 190 for_each_set_bit(hwirq, &irq_status, gpio->gen_gc.gc.ngpio) 191 generic_handle_domain_irq(gpio->gen_gc.gc.irq.domain, hwirq); 192 193 chained_irq_exit(irqchip, desc); 194 } 195 196 static int blzp1600_gpio_set_debounce(struct gpio_chip *gc, unsigned int offset, 197 unsigned int debounce) 198 { 199 struct blzp1600_gpio *chip = gpiochip_get_data(gc); 200 201 guard(gpio_generic_lock_irqsave)(&chip->gen_gc); 202 blzp1600_gpio_rmw(chip->base + GPIO_DB_REG, BIT(offset), debounce); 203 204 return 0; 205 } 206 207 static int blzp1600_gpio_set_config(struct gpio_chip *gc, unsigned int offset, unsigned long config) 208 { 209 u32 debounce; 210 211 if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) 212 return -ENOTSUPP; 213 214 debounce = pinconf_to_config_argument(config); 215 return blzp1600_gpio_set_debounce(gc, offset, debounce); 216 } 217 218 static int blzp1600_gpio_probe(struct platform_device *pdev) 219 { 220 struct gpio_generic_chip_config config; 221 struct blzp1600_gpio *chip; 222 struct gpio_chip *gc; 223 int ret; 224 225 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 226 if (!chip) 227 return -ENOMEM; 228 229 chip->base = devm_platform_ioremap_resource(pdev, 0); 230 if (IS_ERR(chip->base)) 231 return PTR_ERR(chip->base); 232 233 config = (struct gpio_generic_chip_config) { 234 .dev = &pdev->dev, 235 .sz = 4, 236 .dat = chip->base + GPIO_IDATA_REG, 237 .set = chip->base + GPIO_SET_REG, 238 .clr = chip->base + GPIO_CLR_REG, 239 .dirout = chip->base + GPIO_DIR_REG, 240 }; 241 242 ret = gpio_generic_chip_init(&chip->gen_gc, &config); 243 if (ret) 244 return dev_err_probe(&pdev->dev, ret, "Failed to register generic gpio\n"); 245 246 /* configure the gpio chip */ 247 gc = &chip->gen_gc.gc; 248 gc->set_config = blzp1600_gpio_set_config; 249 250 if (device_property_present(&pdev->dev, "interrupt-controller")) { 251 struct gpio_irq_chip *girq; 252 253 chip->irq = platform_get_irq(pdev, 0); 254 if (chip->irq < 0) 255 return chip->irq; 256 257 girq = &gc->irq; 258 gpio_irq_chip_set_chip(girq, &blzp1600_gpio_irqchip); 259 girq->parent_handler = blzp1600_gpio_irqhandler; 260 girq->num_parents = 1; 261 girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents), GFP_KERNEL); 262 if (!girq->parents) 263 return -ENOMEM; 264 265 girq->parents[0] = chip->irq; 266 girq->default_type = IRQ_TYPE_NONE; 267 } 268 269 return devm_gpiochip_add_data(&pdev->dev, gc, chip); 270 } 271 272 static const struct of_device_id blzp1600_gpio_of_match[] = { 273 { .compatible = "blaize,blzp1600-gpio", }, 274 { /* Sentinel */ }, 275 }; 276 MODULE_DEVICE_TABLE(of, blzp1600_gpio_of_match); 277 278 static struct platform_driver blzp1600_gpio_driver = { 279 .driver = { 280 .name = DRIVER_NAME, 281 .of_match_table = blzp1600_gpio_of_match, 282 }, 283 .probe = blzp1600_gpio_probe, 284 }; 285 286 module_platform_driver(blzp1600_gpio_driver); 287 288 MODULE_AUTHOR("Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>"); 289 MODULE_DESCRIPTION("Blaize BLZP1600 GPIO driver"); 290 MODULE_LICENSE("GPL"); 291