1 /* 2 * A FSI master controller, using a simple GPIO bit-banging interface 3 */ 4 5 #include <linux/crc4.h> 6 #include <linux/delay.h> 7 #include <linux/device.h> 8 #include <linux/fsi.h> 9 #include <linux/gpio/consumer.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/platform_device.h> 13 #include <linux/slab.h> 14 #include <linux/spinlock.h> 15 16 #include "fsi-master.h" 17 18 #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */ 19 #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ 20 #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */ 21 #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */ 22 #define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */ 23 #define FSI_INIT_CLOCKS 5000 /* Clock out any old data */ 24 #define FSI_GPIO_STD_DELAY 10 /* Standard GPIO delay in nS */ 25 /* todo: adjust down as low as */ 26 /* possible or eliminate */ 27 #define FSI_GPIO_CMD_DPOLL 0x2 28 #define FSI_GPIO_CMD_TERM 0x3f 29 #define FSI_GPIO_CMD_ABS_AR 0x4 30 31 #define FSI_GPIO_DPOLL_CLOCKS 100 /* < 21 will cause slave to hang */ 32 33 /* Bus errors */ 34 #define FSI_GPIO_ERR_BUSY 1 /* Slave stuck in busy state */ 35 #define FSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */ 36 #define FSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC error */ 37 #define FSI_GPIO_MTOE 4 /* Master time out error */ 38 #define FSI_GPIO_CRC_INVAL 5 /* Master reports slave CRC error */ 39 40 /* Normal slave responses */ 41 #define FSI_GPIO_RESP_BUSY 1 42 #define FSI_GPIO_RESP_ACK 0 43 #define FSI_GPIO_RESP_ACKD 4 44 45 #define FSI_GPIO_MAX_BUSY 100 46 #define FSI_GPIO_MTOE_COUNT 1000 47 #define FSI_GPIO_DRAIN_BITS 20 48 #define FSI_GPIO_CRC_SIZE 4 49 #define FSI_GPIO_MSG_ID_SIZE 2 50 #define FSI_GPIO_MSG_RESPID_SIZE 2 51 #define FSI_GPIO_PRIME_SLAVE_CLOCKS 100 52 53 struct fsi_master_gpio { 54 struct fsi_master master; 55 struct device *dev; 56 spinlock_t cmd_lock; /* Lock for commands */ 57 struct gpio_desc *gpio_clk; 58 struct gpio_desc *gpio_data; 59 struct gpio_desc *gpio_trans; /* Voltage translator */ 60 struct gpio_desc *gpio_enable; /* FSI enable */ 61 struct gpio_desc *gpio_mux; /* Mux control */ 62 }; 63 64 #define CREATE_TRACE_POINTS 65 #include <trace/events/fsi_master_gpio.h> 66 67 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master) 68 69 struct fsi_gpio_msg { 70 uint64_t msg; 71 uint8_t bits; 72 }; 73 74 static void clock_toggle(struct fsi_master_gpio *master, int count) 75 { 76 int i; 77 78 for (i = 0; i < count; i++) { 79 ndelay(FSI_GPIO_STD_DLY); 80 gpiod_set_value(master->gpio_clk, 0); 81 ndelay(FSI_GPIO_STD_DLY); 82 gpiod_set_value(master->gpio_clk, 1); 83 } 84 } 85 86 static int sda_in(struct fsi_master_gpio *master) 87 { 88 int in; 89 90 ndelay(FSI_GPIO_STD_DLY); 91 in = gpiod_get_value(master->gpio_data); 92 return in ? 1 : 0; 93 } 94 95 static void sda_out(struct fsi_master_gpio *master, int value) 96 { 97 gpiod_set_value(master->gpio_data, value); 98 } 99 100 static void set_sda_input(struct fsi_master_gpio *master) 101 { 102 gpiod_direction_input(master->gpio_data); 103 gpiod_set_value(master->gpio_trans, 0); 104 } 105 106 static void set_sda_output(struct fsi_master_gpio *master, int value) 107 { 108 gpiod_set_value(master->gpio_trans, 1); 109 gpiod_direction_output(master->gpio_data, value); 110 } 111 112 static void clock_zeros(struct fsi_master_gpio *master, int count) 113 { 114 set_sda_output(master, 1); 115 clock_toggle(master, count); 116 } 117 118 static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg, 119 uint8_t num_bits) 120 { 121 uint8_t bit, in_bit; 122 123 set_sda_input(master); 124 125 for (bit = 0; bit < num_bits; bit++) { 126 clock_toggle(master, 1); 127 in_bit = sda_in(master); 128 msg->msg <<= 1; 129 msg->msg |= ~in_bit & 0x1; /* Data is active low */ 130 } 131 msg->bits += num_bits; 132 133 trace_fsi_master_gpio_in(master, num_bits, msg->msg); 134 } 135 136 static void serial_out(struct fsi_master_gpio *master, 137 const struct fsi_gpio_msg *cmd) 138 { 139 uint8_t bit; 140 uint64_t msg = ~cmd->msg; /* Data is active low */ 141 uint64_t sda_mask = 0x1ULL << (cmd->bits - 1); 142 uint64_t last_bit = ~0; 143 int next_bit; 144 145 trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg); 146 147 if (!cmd->bits) { 148 dev_warn(master->dev, "trying to output 0 bits\n"); 149 return; 150 } 151 set_sda_output(master, 0); 152 153 /* Send the start bit */ 154 sda_out(master, 0); 155 clock_toggle(master, 1); 156 157 /* Send the message */ 158 for (bit = 0; bit < cmd->bits; bit++) { 159 next_bit = (msg & sda_mask) >> (cmd->bits - 1); 160 if (last_bit ^ next_bit) { 161 sda_out(master, next_bit); 162 last_bit = next_bit; 163 } 164 clock_toggle(master, 1); 165 msg <<= 1; 166 } 167 } 168 169 static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits) 170 { 171 msg->msg <<= bits; 172 msg->msg |= data & ((1ull << bits) - 1); 173 msg->bits += bits; 174 } 175 176 static void msg_push_crc(struct fsi_gpio_msg *msg) 177 { 178 uint8_t crc; 179 int top; 180 181 top = msg->bits & 0x3; 182 183 /* start bit, and any non-aligned top bits */ 184 crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1); 185 186 /* aligned bits */ 187 crc = crc4(crc, msg->msg, msg->bits - top); 188 189 msg_push_bits(msg, crc, 4); 190 } 191 192 /* 193 * Encode an Absolute Address command 194 */ 195 static void build_abs_ar_command(struct fsi_gpio_msg *cmd, 196 uint8_t id, uint32_t addr, size_t size, const void *data) 197 { 198 bool write = !!data; 199 uint8_t ds; 200 int i; 201 202 cmd->bits = 0; 203 cmd->msg = 0; 204 205 msg_push_bits(cmd, id, 2); 206 msg_push_bits(cmd, FSI_GPIO_CMD_ABS_AR, 3); 207 msg_push_bits(cmd, write ? 0 : 1, 1); 208 209 /* 210 * The read/write size is encoded in the lower bits of the address 211 * (as it must be naturally-aligned), and the following ds bit. 212 * 213 * size addr:1 addr:0 ds 214 * 1 x x 0 215 * 2 x 0 1 216 * 4 0 1 1 217 * 218 */ 219 ds = size > 1 ? 1 : 0; 220 addr &= ~(size - 1); 221 if (size == 4) 222 addr |= 1; 223 224 msg_push_bits(cmd, addr & ((1 << 21) - 1), 21); 225 msg_push_bits(cmd, ds, 1); 226 for (i = 0; write && i < size; i++) 227 msg_push_bits(cmd, ((uint8_t *)data)[i], 8); 228 229 msg_push_crc(cmd); 230 } 231 232 static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id) 233 { 234 cmd->bits = 0; 235 cmd->msg = 0; 236 237 msg_push_bits(cmd, slave_id, 2); 238 msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3); 239 msg_push_crc(cmd); 240 } 241 242 static void echo_delay(struct fsi_master_gpio *master) 243 { 244 set_sda_output(master, 1); 245 clock_toggle(master, FSI_ECHO_DELAY_CLOCKS); 246 } 247 248 static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id) 249 { 250 cmd->bits = 0; 251 cmd->msg = 0; 252 253 msg_push_bits(cmd, slave_id, 2); 254 msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6); 255 msg_push_crc(cmd); 256 } 257 258 /* 259 * Store information on master errors so handler can detect and clean 260 * up the bus 261 */ 262 static void fsi_master_gpio_error(struct fsi_master_gpio *master, int error) 263 { 264 265 } 266 267 static int read_one_response(struct fsi_master_gpio *master, 268 uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp) 269 { 270 struct fsi_gpio_msg msg; 271 uint8_t id, tag; 272 uint32_t crc; 273 int i; 274 275 /* wait for the start bit */ 276 for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) { 277 msg.bits = 0; 278 msg.msg = 0; 279 serial_in(master, &msg, 1); 280 if (msg.msg) 281 break; 282 } 283 if (i == FSI_GPIO_MTOE_COUNT) { 284 dev_dbg(master->dev, 285 "Master time out waiting for response\n"); 286 fsi_master_gpio_error(master, FSI_GPIO_MTOE); 287 return -EIO; 288 } 289 290 msg.bits = 0; 291 msg.msg = 0; 292 293 /* Read slave ID & response tag */ 294 serial_in(master, &msg, 4); 295 296 id = (msg.msg >> FSI_GPIO_MSG_RESPID_SIZE) & 0x3; 297 tag = msg.msg & 0x3; 298 299 /* If we have an ACK and we're expecting data, clock the data in too */ 300 if (tag == FSI_GPIO_RESP_ACK && data_size) 301 serial_in(master, &msg, data_size * 8); 302 303 /* read CRC */ 304 serial_in(master, &msg, FSI_GPIO_CRC_SIZE); 305 306 /* we have a whole message now; check CRC */ 307 crc = crc4(0, 1, 1); 308 crc = crc4(crc, msg.msg, msg.bits); 309 if (crc) { 310 dev_dbg(master->dev, "ERR response CRC\n"); 311 fsi_master_gpio_error(master, FSI_GPIO_CRC_INVAL); 312 return -EIO; 313 } 314 315 if (msgp) 316 *msgp = msg; 317 if (tagp) 318 *tagp = tag; 319 320 return 0; 321 } 322 323 static int issue_term(struct fsi_master_gpio *master, uint8_t slave) 324 { 325 struct fsi_gpio_msg cmd; 326 uint8_t tag; 327 int rc; 328 329 build_term_command(&cmd, slave); 330 serial_out(master, &cmd); 331 echo_delay(master); 332 333 rc = read_one_response(master, 0, NULL, &tag); 334 if (rc < 0) { 335 dev_err(master->dev, 336 "TERM failed; lost communication with slave\n"); 337 return -EIO; 338 } else if (tag != FSI_GPIO_RESP_ACK) { 339 dev_err(master->dev, "TERM failed; response %d\n", tag); 340 return -EIO; 341 } 342 343 return 0; 344 } 345 346 static int poll_for_response(struct fsi_master_gpio *master, 347 uint8_t slave, uint8_t size, void *data) 348 { 349 struct fsi_gpio_msg response, cmd; 350 int busy_count = 0, rc, i; 351 uint8_t tag; 352 uint8_t *data_byte = data; 353 354 retry: 355 rc = read_one_response(master, size, &response, &tag); 356 if (rc) 357 return rc; 358 359 switch (tag) { 360 case FSI_GPIO_RESP_ACK: 361 if (size && data) { 362 uint64_t val = response.msg; 363 /* clear crc & mask */ 364 val >>= 4; 365 val &= (1ull << (size * 8)) - 1; 366 367 for (i = 0; i < size; i++) { 368 data_byte[size-i-1] = val; 369 val >>= 8; 370 } 371 } 372 break; 373 case FSI_GPIO_RESP_BUSY: 374 /* 375 * Its necessary to clock slave before issuing 376 * d-poll, not indicated in the hardware protocol 377 * spec. < 20 clocks causes slave to hang, 21 ok. 378 */ 379 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS); 380 if (busy_count++ < FSI_GPIO_MAX_BUSY) { 381 build_dpoll_command(&cmd, slave); 382 serial_out(master, &cmd); 383 echo_delay(master); 384 goto retry; 385 } 386 dev_warn(master->dev, 387 "ERR slave is stuck in busy state, issuing TERM\n"); 388 issue_term(master, slave); 389 rc = -EIO; 390 break; 391 392 case FSI_GPIO_RESP_ERRA: 393 case FSI_GPIO_RESP_ERRC: 394 dev_dbg(master->dev, "ERR%c received: 0x%x\n", 395 tag == FSI_GPIO_RESP_ERRA ? 'A' : 'C', 396 (int)response.msg); 397 fsi_master_gpio_error(master, response.msg); 398 rc = -EIO; 399 break; 400 } 401 402 /* Clock the slave enough to be ready for next operation */ 403 clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS); 404 return rc; 405 } 406 407 static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave, 408 struct fsi_gpio_msg *cmd, size_t resp_len, void *resp) 409 { 410 unsigned long flags; 411 int rc; 412 413 spin_lock_irqsave(&master->cmd_lock, flags); 414 serial_out(master, cmd); 415 echo_delay(master); 416 rc = poll_for_response(master, slave, resp_len, resp); 417 spin_unlock_irqrestore(&master->cmd_lock, flags); 418 419 return rc; 420 } 421 422 static int fsi_master_gpio_read(struct fsi_master *_master, int link, 423 uint8_t id, uint32_t addr, void *val, size_t size) 424 { 425 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 426 struct fsi_gpio_msg cmd; 427 428 if (link != 0) 429 return -ENODEV; 430 431 build_abs_ar_command(&cmd, id, addr, size, NULL); 432 return fsi_master_gpio_xfer(master, id, &cmd, size, val); 433 } 434 435 static int fsi_master_gpio_write(struct fsi_master *_master, int link, 436 uint8_t id, uint32_t addr, const void *val, size_t size) 437 { 438 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 439 struct fsi_gpio_msg cmd; 440 441 if (link != 0) 442 return -ENODEV; 443 444 build_abs_ar_command(&cmd, id, addr, size, val); 445 return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL); 446 } 447 448 static int fsi_master_gpio_term(struct fsi_master *_master, 449 int link, uint8_t id) 450 { 451 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 452 struct fsi_gpio_msg cmd; 453 454 if (link != 0) 455 return -ENODEV; 456 457 build_term_command(&cmd, id); 458 return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL); 459 } 460 461 static int fsi_master_gpio_break(struct fsi_master *_master, int link) 462 { 463 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 464 465 if (link != 0) 466 return -ENODEV; 467 468 trace_fsi_master_gpio_break(master); 469 470 set_sda_output(master, 1); 471 sda_out(master, 1); 472 clock_toggle(master, FSI_PRE_BREAK_CLOCKS); 473 sda_out(master, 0); 474 clock_toggle(master, FSI_BREAK_CLOCKS); 475 echo_delay(master); 476 sda_out(master, 1); 477 clock_toggle(master, FSI_POST_BREAK_CLOCKS); 478 479 /* Wait for logic reset to take effect */ 480 udelay(200); 481 482 return 0; 483 } 484 485 static void fsi_master_gpio_init(struct fsi_master_gpio *master) 486 { 487 gpiod_direction_output(master->gpio_mux, 1); 488 gpiod_direction_output(master->gpio_trans, 1); 489 gpiod_direction_output(master->gpio_enable, 1); 490 gpiod_direction_output(master->gpio_clk, 1); 491 gpiod_direction_output(master->gpio_data, 1); 492 493 /* todo: evaluate if clocks can be reduced */ 494 clock_zeros(master, FSI_INIT_CLOCKS); 495 } 496 497 static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link) 498 { 499 struct fsi_master_gpio *master = to_fsi_master_gpio(_master); 500 501 if (link != 0) 502 return -ENODEV; 503 gpiod_set_value(master->gpio_enable, 1); 504 505 return 0; 506 } 507 508 static int fsi_master_gpio_probe(struct platform_device *pdev) 509 { 510 struct fsi_master_gpio *master; 511 struct gpio_desc *gpio; 512 513 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL); 514 if (!master) 515 return -ENOMEM; 516 517 master->dev = &pdev->dev; 518 master->master.dev.parent = master->dev; 519 520 gpio = devm_gpiod_get(&pdev->dev, "clock", 0); 521 if (IS_ERR(gpio)) { 522 dev_err(&pdev->dev, "failed to get clock gpio\n"); 523 return PTR_ERR(gpio); 524 } 525 master->gpio_clk = gpio; 526 527 gpio = devm_gpiod_get(&pdev->dev, "data", 0); 528 if (IS_ERR(gpio)) { 529 dev_err(&pdev->dev, "failed to get data gpio\n"); 530 return PTR_ERR(gpio); 531 } 532 master->gpio_data = gpio; 533 534 /* Optional GPIOs */ 535 gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0); 536 if (IS_ERR(gpio)) { 537 dev_err(&pdev->dev, "failed to get trans gpio\n"); 538 return PTR_ERR(gpio); 539 } 540 master->gpio_trans = gpio; 541 542 gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0); 543 if (IS_ERR(gpio)) { 544 dev_err(&pdev->dev, "failed to get enable gpio\n"); 545 return PTR_ERR(gpio); 546 } 547 master->gpio_enable = gpio; 548 549 gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0); 550 if (IS_ERR(gpio)) { 551 dev_err(&pdev->dev, "failed to get mux gpio\n"); 552 return PTR_ERR(gpio); 553 } 554 master->gpio_mux = gpio; 555 556 master->master.n_links = 1; 557 master->master.flags = FSI_MASTER_FLAG_SWCLOCK; 558 master->master.read = fsi_master_gpio_read; 559 master->master.write = fsi_master_gpio_write; 560 master->master.term = fsi_master_gpio_term; 561 master->master.send_break = fsi_master_gpio_break; 562 master->master.link_enable = fsi_master_gpio_link_enable; 563 platform_set_drvdata(pdev, master); 564 spin_lock_init(&master->cmd_lock); 565 566 fsi_master_gpio_init(master); 567 568 return fsi_master_register(&master->master); 569 } 570 571 572 static int fsi_master_gpio_remove(struct platform_device *pdev) 573 { 574 struct fsi_master_gpio *master = platform_get_drvdata(pdev); 575 576 devm_gpiod_put(&pdev->dev, master->gpio_clk); 577 devm_gpiod_put(&pdev->dev, master->gpio_data); 578 if (master->gpio_trans) 579 devm_gpiod_put(&pdev->dev, master->gpio_trans); 580 if (master->gpio_enable) 581 devm_gpiod_put(&pdev->dev, master->gpio_enable); 582 if (master->gpio_mux) 583 devm_gpiod_put(&pdev->dev, master->gpio_mux); 584 fsi_master_unregister(&master->master); 585 586 return 0; 587 } 588 589 static const struct of_device_id fsi_master_gpio_match[] = { 590 { .compatible = "fsi-master-gpio" }, 591 { }, 592 }; 593 594 static struct platform_driver fsi_master_gpio_driver = { 595 .driver = { 596 .name = "fsi-master-gpio", 597 .of_match_table = fsi_master_gpio_match, 598 }, 599 .probe = fsi_master_gpio_probe, 600 .remove = fsi_master_gpio_remove, 601 }; 602 603 module_platform_driver(fsi_master_gpio_driver); 604 MODULE_LICENSE("GPL"); 605