xref: /linux/drivers/firmware/xilinx/zynqmp.c (revision c27dfca4555bf74dd7dd7161d8ef2790ec1c7283)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Xilinx Zynq MPSoC Firmware layer
4  *
5  *  Copyright (C) 2014-2022 Xilinx, Inc.
6  *
7  *  Michal Simek <michal.simek@amd.com>
8  *  Davorin Mista <davorin.mista@aggios.com>
9  *  Jolly Shah <jollys@xilinx.com>
10  *  Rajan Vaja <rajanv@xilinx.com>
11  */
12 
13 #include <linux/arm-smccc.h>
14 #include <linux/compiler.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_platform.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/uaccess.h>
24 #include <linux/hashtable.h>
25 
26 #include <linux/firmware/xlnx-zynqmp.h>
27 #include <linux/firmware/xlnx-event-manager.h>
28 #include "zynqmp-debug.h"
29 
30 /* Max HashMap Order for PM API feature check (1<<7 = 128) */
31 #define PM_API_FEATURE_CHECK_MAX_ORDER  7
32 
33 /* CRL registers and bitfields */
34 #define CRL_APB_BASE			0xFF5E0000U
35 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
36 #define CRL_APB_BOOT_PIN_CTRL		(CRL_APB_BASE + (0x250U))
37 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
38 #define CRL_APB_BOOTPIN_CTRL_MASK	0xF0FU
39 
40 /* IOCTL/QUERY feature payload size */
41 #define FEATURE_PAYLOAD_SIZE		2
42 
43 /* Firmware feature check version mask */
44 #define FIRMWARE_VERSION_MASK		GENMASK(15, 0)
45 
46 static bool feature_check_enabled;
47 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
48 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
49 static u32 query_features[FEATURE_PAYLOAD_SIZE];
50 
51 static struct platform_device *em_dev;
52 
53 /**
54  * struct zynqmp_devinfo - Structure for Zynqmp device instance
55  * @dev:		Device Pointer
56  * @feature_conf_id:	Feature conf id
57  */
58 struct zynqmp_devinfo {
59 	struct device *dev;
60 	u32 feature_conf_id;
61 };
62 
63 /**
64  * struct pm_api_feature_data - PM API Feature data
65  * @pm_api_id:		PM API Id, used as key to index into hashmap
66  * @feature_status:	status of PM API feature: valid, invalid
67  * @hentry:		hlist_node that hooks this entry into hashtable
68  */
69 struct pm_api_feature_data {
70 	u32 pm_api_id;
71 	int feature_status;
72 	struct hlist_node hentry;
73 };
74 
75 static const struct mfd_cell firmware_devs[] = {
76 	{
77 		.name = "zynqmp_power_controller",
78 	},
79 };
80 
81 /**
82  * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
83  * @ret_status:		PMUFW return code
84  *
85  * Return: corresponding Linux error code
86  */
87 static int zynqmp_pm_ret_code(u32 ret_status)
88 {
89 	switch (ret_status) {
90 	case XST_PM_SUCCESS:
91 	case XST_PM_DOUBLE_REQ:
92 		return 0;
93 	case XST_PM_NO_FEATURE:
94 		return -ENOTSUPP;
95 	case XST_PM_INVALID_VERSION:
96 		return -EOPNOTSUPP;
97 	case XST_PM_NO_ACCESS:
98 		return -EACCES;
99 	case XST_PM_ABORT_SUSPEND:
100 		return -ECANCELED;
101 	case XST_PM_MULT_USER:
102 		return -EUSERS;
103 	case XST_PM_INTERNAL:
104 	case XST_PM_CONFLICT:
105 	case XST_PM_INVALID_NODE:
106 	case XST_PM_INVALID_CRC:
107 	default:
108 		return -EINVAL;
109 	}
110 }
111 
112 static noinline int do_fw_call_fail(u32 *ret_payload, u32 num_args, ...)
113 {
114 	return -ENODEV;
115 }
116 
117 /*
118  * PM function call wrapper
119  * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
120  */
121 static int (*do_fw_call)(u32 *ret_payload, u32, ...) = do_fw_call_fail;
122 
123 /**
124  * do_fw_call_smc() - Call system-level platform management layer (SMC)
125  * @num_args:		Number of variable arguments should be <= 8
126  * @ret_payload:	Returned value array
127  *
128  * Invoke platform management function via SMC call (no hypervisor present).
129  *
130  * Return: Returns status, either success or error+reason
131  */
132 static noinline int do_fw_call_smc(u32 *ret_payload, u32 num_args, ...)
133 {
134 	struct arm_smccc_res res;
135 	u64 args[8] = {0};
136 	va_list arg_list;
137 	u8 i;
138 
139 	if (num_args > 8)
140 		return -EINVAL;
141 
142 	va_start(arg_list, num_args);
143 
144 	for (i = 0; i < num_args; i++)
145 		args[i] = va_arg(arg_list, u64);
146 
147 	va_end(arg_list);
148 
149 	arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
150 
151 	if (ret_payload) {
152 		ret_payload[0] = lower_32_bits(res.a0);
153 		ret_payload[1] = upper_32_bits(res.a0);
154 		ret_payload[2] = lower_32_bits(res.a1);
155 		ret_payload[3] = upper_32_bits(res.a1);
156 	}
157 
158 	return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
159 }
160 
161 /**
162  * do_fw_call_hvc() - Call system-level platform management layer (HVC)
163  * @num_args:		Number of variable arguments should be <= 8
164  * @ret_payload:	Returned value array
165  *
166  * Invoke platform management function via HVC
167  * HVC-based for communication through hypervisor
168  * (no direct communication with ATF).
169  *
170  * Return: Returns status, either success or error+reason
171  */
172 static noinline int do_fw_call_hvc(u32 *ret_payload, u32 num_args, ...)
173 {
174 	struct arm_smccc_res res;
175 	u64 args[8] = {0};
176 	va_list arg_list;
177 	u8 i;
178 
179 	if (num_args > 8)
180 		return -EINVAL;
181 
182 	va_start(arg_list, num_args);
183 
184 	for (i = 0; i < num_args; i++)
185 		args[i] = va_arg(arg_list, u64);
186 
187 	va_end(arg_list);
188 
189 	arm_smccc_hvc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
190 
191 	if (ret_payload) {
192 		ret_payload[0] = lower_32_bits(res.a0);
193 		ret_payload[1] = upper_32_bits(res.a0);
194 		ret_payload[2] = lower_32_bits(res.a1);
195 		ret_payload[3] = upper_32_bits(res.a1);
196 	}
197 
198 	return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
199 }
200 
201 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
202 {
203 	int ret;
204 	u64 smc_arg[2];
205 	u32 module_id;
206 	u32 feature_check_api_id;
207 
208 	module_id = FIELD_GET(MODULE_ID_MASK, api_id);
209 
210 	/*
211 	 * Feature check of APIs belonging to PM, XSEM, and TF-A are handled by calling
212 	 * PM_FEATURE_CHECK API. For other modules, call PM_API_FEATURES API.
213 	 */
214 	if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID || module_id == TF_A_MODULE_ID)
215 		feature_check_api_id = PM_FEATURE_CHECK;
216 	else
217 		feature_check_api_id = PM_API_FEATURES;
218 
219 	/*
220 	 * Feature check of TF-A APIs is done in the TF-A layer and it expects for
221 	 * MODULE_ID_MASK bits of SMC's arg[0] to be the same as PM_MODULE_ID.
222 	 */
223 	if (module_id == TF_A_MODULE_ID)
224 		module_id = PM_MODULE_ID;
225 
226 	smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id;
227 	smc_arg[1] = (api_id & API_ID_MASK);
228 
229 	ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]);
230 	if (ret)
231 		ret = -EOPNOTSUPP;
232 	else
233 		ret = ret_payload[1];
234 
235 	return ret;
236 }
237 
238 static int do_feature_check_call(const u32 api_id)
239 {
240 	int ret;
241 	u32 ret_payload[PAYLOAD_ARG_CNT];
242 	struct pm_api_feature_data *feature_data;
243 
244 	/* Check for existing entry in hash table for given api */
245 	hash_for_each_possible(pm_api_features_map, feature_data, hentry,
246 			       api_id) {
247 		if (feature_data->pm_api_id == api_id)
248 			return feature_data->feature_status;
249 	}
250 
251 	/* Add new entry if not present */
252 	feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC);
253 	if (!feature_data)
254 		return -ENOMEM;
255 
256 	feature_data->pm_api_id = api_id;
257 	ret = __do_feature_check_call(api_id, ret_payload);
258 
259 	feature_data->feature_status = ret;
260 	hash_add(pm_api_features_map, &feature_data->hentry, api_id);
261 
262 	if (api_id == PM_IOCTL)
263 		/* Store supported IOCTL IDs mask */
264 		memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
265 	else if (api_id == PM_QUERY_DATA)
266 		/* Store supported QUERY IDs mask */
267 		memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
268 
269 	return ret;
270 }
271 
272 /**
273  * zynqmp_pm_feature() - Check whether given feature is supported or not and
274  *			 store supported IOCTL/QUERY ID mask
275  * @api_id:		API ID to check
276  *
277  * Return: Returns status, either success or error+reason
278  */
279 int zynqmp_pm_feature(const u32 api_id)
280 {
281 	int ret;
282 
283 	if (!feature_check_enabled)
284 		return 0;
285 
286 	ret = do_feature_check_call(api_id);
287 
288 	return ret;
289 }
290 EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
291 
292 /**
293  * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
294  *				       is supported or not
295  * @api_id:		PM_IOCTL or PM_QUERY_DATA
296  * @id:			IOCTL or QUERY function IDs
297  *
298  * Return: Returns status, either success or error+reason
299  */
300 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
301 {
302 	int ret;
303 	u32 *bit_mask;
304 
305 	/* Input arguments validation */
306 	if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
307 		return -EINVAL;
308 
309 	/* Check feature check API version */
310 	ret = do_feature_check_call(PM_FEATURE_CHECK);
311 	if (ret < 0)
312 		return ret;
313 
314 	/* Check if feature check version 2 is supported or not */
315 	if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
316 		/*
317 		 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
318 		 * QUERY ID feature status.
319 		 */
320 		ret = do_feature_check_call(api_id);
321 		if (ret < 0)
322 			return ret;
323 
324 		bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
325 
326 		if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
327 			return -EOPNOTSUPP;
328 	} else {
329 		return -ENODATA;
330 	}
331 
332 	return 0;
333 }
334 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
335 
336 /**
337  * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
338  *			   caller function depending on the configuration
339  * @pm_api_id:		Requested PM-API call
340  * @ret_payload:	Returned value array
341  * @num_args:		Number of arguments to requested PM-API call
342  *
343  * Invoke platform management function for SMC or HVC call, depending on
344  * configuration.
345  * Following SMC Calling Convention (SMCCC) for SMC64:
346  * Pm Function Identifier,
347  * PM_SIP_SVC + PM_API_ID =
348  *	((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
349  *	((SMC_64) << FUNCID_CC_SHIFT)
350  *	((SIP_START) << FUNCID_OEN_SHIFT)
351  *	((PM_API_ID) & FUNCID_NUM_MASK))
352  *
353  * PM_SIP_SVC	- Registered ZynqMP SIP Service Call.
354  * PM_API_ID	- Platform Management API ID.
355  *
356  * Return: Returns status, either success or error+reason
357  */
358 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...)
359 {
360 	/*
361 	 * Added SIP service call Function Identifier
362 	 * Make sure to stay in x0 register
363 	 */
364 	u64 smc_arg[8];
365 	int ret, i;
366 	va_list arg_list;
367 	u32 args[14] = {0};
368 
369 	if (num_args > 14)
370 		return -EINVAL;
371 
372 	va_start(arg_list, num_args);
373 
374 	/* Check if feature is supported or not */
375 	ret = zynqmp_pm_feature(pm_api_id);
376 	if (ret < 0)
377 		return ret;
378 
379 	for (i = 0; i < num_args; i++)
380 		args[i] = va_arg(arg_list, u32);
381 
382 	va_end(arg_list);
383 
384 	smc_arg[0] = PM_SIP_SVC | pm_api_id;
385 	for (i = 0; i < 7; i++)
386 		smc_arg[i + 1] = ((u64)args[(i * 2) + 1] << 32) | args[i * 2];
387 
388 	return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3],
389 			  smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]);
390 }
391 
392 static u32 pm_api_version;
393 static u32 pm_tz_version;
394 static u32 pm_family_code;
395 static u32 pm_sub_family_code;
396 
397 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
398 {
399 	int ret;
400 
401 	ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, NULL, 2, sgi_num, reset);
402 	if (ret != -EOPNOTSUPP && !ret)
403 		return ret;
404 
405 	/* try old implementation as fallback strategy if above fails */
406 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, IOCTL_REGISTER_SGI, sgi_num, reset);
407 }
408 
409 /**
410  * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
411  * @version:	Returned version value
412  *
413  * Return: Returns status, either success or error+reason
414  */
415 int zynqmp_pm_get_api_version(u32 *version)
416 {
417 	u32 ret_payload[PAYLOAD_ARG_CNT];
418 	int ret;
419 
420 	if (!version)
421 		return -EINVAL;
422 
423 	/* Check is PM API version already verified */
424 	if (pm_api_version > 0) {
425 		*version = pm_api_version;
426 		return 0;
427 	}
428 	ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, ret_payload, 0);
429 	*version = ret_payload[1];
430 
431 	return ret;
432 }
433 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
434 
435 /**
436  * zynqmp_pm_get_chipid - Get silicon ID registers
437  * @idcode:     IDCODE register
438  * @version:    version register
439  *
440  * Return:      Returns the status of the operation and the idcode and version
441  *              registers in @idcode and @version.
442  */
443 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
444 {
445 	u32 ret_payload[PAYLOAD_ARG_CNT];
446 	int ret;
447 
448 	if (!idcode || !version)
449 		return -EINVAL;
450 
451 	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0);
452 	*idcode = ret_payload[1];
453 	*version = ret_payload[2];
454 
455 	return ret;
456 }
457 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
458 
459 /**
460  * zynqmp_pm_get_family_info() - Get family info of platform
461  * @family:	Returned family code value
462  * @subfamily:	Returned sub-family code value
463  *
464  * Return: Returns status, either success or error+reason
465  */
466 static int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily)
467 {
468 	u32 ret_payload[PAYLOAD_ARG_CNT];
469 	u32 idcode;
470 	int ret;
471 
472 	/* Check is family or sub-family code already received */
473 	if (pm_family_code && pm_sub_family_code) {
474 		*family = pm_family_code;
475 		*subfamily = pm_sub_family_code;
476 		return 0;
477 	}
478 
479 	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0);
480 	if (ret < 0)
481 		return ret;
482 
483 	idcode = ret_payload[1];
484 	pm_family_code = FIELD_GET(FAMILY_CODE_MASK, idcode);
485 	pm_sub_family_code = FIELD_GET(SUB_FAMILY_CODE_MASK, idcode);
486 	*family = pm_family_code;
487 	*subfamily = pm_sub_family_code;
488 
489 	return 0;
490 }
491 
492 /**
493  * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
494  * @version:	Returned version value
495  *
496  * Return: Returns status, either success or error+reason
497  */
498 static int zynqmp_pm_get_trustzone_version(u32 *version)
499 {
500 	u32 ret_payload[PAYLOAD_ARG_CNT];
501 	int ret;
502 
503 	if (!version)
504 		return -EINVAL;
505 
506 	/* Check is PM trustzone version already verified */
507 	if (pm_tz_version > 0) {
508 		*version = pm_tz_version;
509 		return 0;
510 	}
511 	ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, ret_payload, 0);
512 	*version = ret_payload[1];
513 
514 	return ret;
515 }
516 
517 /**
518  * get_set_conduit_method() - Choose SMC or HVC based communication
519  * @np:		Pointer to the device_node structure
520  *
521  * Use SMC or HVC-based functions to communicate with EL2/EL3.
522  *
523  * Return: Returns 0 on success or error code
524  */
525 static int get_set_conduit_method(struct device_node *np)
526 {
527 	const char *method;
528 
529 	if (of_property_read_string(np, "method", &method)) {
530 		pr_warn("%s missing \"method\" property\n", __func__);
531 		return -ENXIO;
532 	}
533 
534 	if (!strcmp("hvc", method)) {
535 		do_fw_call = do_fw_call_hvc;
536 	} else if (!strcmp("smc", method)) {
537 		do_fw_call = do_fw_call_smc;
538 	} else {
539 		pr_warn("%s Invalid \"method\" property: %s\n",
540 			__func__, method);
541 		return -EINVAL;
542 	}
543 
544 	return 0;
545 }
546 
547 /**
548  * zynqmp_pm_query_data() - Get query data from firmware
549  * @qdata:	Variable to the zynqmp_pm_query_data structure
550  * @out:	Returned output value
551  *
552  * Return: Returns status, either success or error+reason
553  */
554 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
555 {
556 	int ret;
557 
558 	ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid, qdata.arg1, qdata.arg2,
559 				  qdata.arg3);
560 
561 	/*
562 	 * For clock name query, all bytes in SMC response are clock name
563 	 * characters and return code is always success. For invalid clocks,
564 	 * clock name bytes would be zeros.
565 	 */
566 	return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
567 }
568 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
569 
570 /**
571  * zynqmp_pm_clock_enable() - Enable the clock for given id
572  * @clock_id:	ID of the clock to be enabled
573  *
574  * This function is used by master to enable the clock
575  * including peripherals and PLL clocks.
576  *
577  * Return: Returns status, either success or error+reason
578  */
579 int zynqmp_pm_clock_enable(u32 clock_id)
580 {
581 	return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, NULL, 1, clock_id);
582 }
583 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
584 
585 /**
586  * zynqmp_pm_clock_disable() - Disable the clock for given id
587  * @clock_id:	ID of the clock to be disable
588  *
589  * This function is used by master to disable the clock
590  * including peripherals and PLL clocks.
591  *
592  * Return: Returns status, either success or error+reason
593  */
594 int zynqmp_pm_clock_disable(u32 clock_id)
595 {
596 	return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, NULL, 1, clock_id);
597 }
598 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
599 
600 /**
601  * zynqmp_pm_clock_getstate() - Get the clock state for given id
602  * @clock_id:	ID of the clock to be queried
603  * @state:	1/0 (Enabled/Disabled)
604  *
605  * This function is used by master to get the state of clock
606  * including peripherals and PLL clocks.
607  *
608  * Return: Returns status, either success or error+reason
609  */
610 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
611 {
612 	u32 ret_payload[PAYLOAD_ARG_CNT];
613 	int ret;
614 
615 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, ret_payload, 1, clock_id);
616 	*state = ret_payload[1];
617 
618 	return ret;
619 }
620 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
621 
622 /**
623  * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
624  * @clock_id:	ID of the clock
625  * @divider:	divider value
626  *
627  * This function is used by master to set divider for any clock
628  * to achieve desired rate.
629  *
630  * Return: Returns status, either success or error+reason
631  */
632 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
633 {
634 	return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, NULL, 2, clock_id, divider);
635 }
636 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
637 
638 /**
639  * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
640  * @clock_id:	ID of the clock
641  * @divider:	divider value
642  *
643  * This function is used by master to get divider values
644  * for any clock.
645  *
646  * Return: Returns status, either success or error+reason
647  */
648 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
649 {
650 	u32 ret_payload[PAYLOAD_ARG_CNT];
651 	int ret;
652 
653 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, ret_payload, 1, clock_id);
654 	*divider = ret_payload[1];
655 
656 	return ret;
657 }
658 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
659 
660 /**
661  * zynqmp_pm_clock_setrate() - Set the clock rate for given id
662  * @clock_id:	ID of the clock
663  * @rate:	rate value in hz
664  *
665  * This function is used by master to set rate for any clock.
666  *
667  * Return: Returns status, either success or error+reason
668  */
669 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
670 {
671 	return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, NULL, 3, clock_id, lower_32_bits(rate),
672 				   upper_32_bits(rate));
673 }
674 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
675 
676 /**
677  * zynqmp_pm_clock_getrate() - Get the clock rate for given id
678  * @clock_id:	ID of the clock
679  * @rate:	rate value in hz
680  *
681  * This function is used by master to get rate
682  * for any clock.
683  *
684  * Return: Returns status, either success or error+reason
685  */
686 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
687 {
688 	u32 ret_payload[PAYLOAD_ARG_CNT];
689 	int ret;
690 
691 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, ret_payload, 1, clock_id);
692 	*rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
693 
694 	return ret;
695 }
696 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
697 
698 /**
699  * zynqmp_pm_clock_setparent() - Set the clock parent for given id
700  * @clock_id:	ID of the clock
701  * @parent_id:	parent id
702  *
703  * This function is used by master to set parent for any clock.
704  *
705  * Return: Returns status, either success or error+reason
706  */
707 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
708 {
709 	return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, NULL, 2, clock_id, parent_id);
710 }
711 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
712 
713 /**
714  * zynqmp_pm_clock_getparent() - Get the clock parent for given id
715  * @clock_id:	ID of the clock
716  * @parent_id:	parent id
717  *
718  * This function is used by master to get parent index
719  * for any clock.
720  *
721  * Return: Returns status, either success or error+reason
722  */
723 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
724 {
725 	u32 ret_payload[PAYLOAD_ARG_CNT];
726 	int ret;
727 
728 	ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, ret_payload, 1, clock_id);
729 	*parent_id = ret_payload[1];
730 
731 	return ret;
732 }
733 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
734 
735 /**
736  * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
737  *
738  * @clk_id:	PLL clock ID
739  * @mode:	PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
740  *
741  * This function sets PLL mode
742  *
743  * Return: Returns status, either success or error+reason
744  */
745 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
746 {
747 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_MODE, clk_id, mode);
748 }
749 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
750 
751 /**
752  * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
753  *
754  * @clk_id:	PLL clock ID
755  * @mode:	PLL mode
756  *
757  * This function return current PLL mode
758  *
759  * Return: Returns status, either success or error+reason
760  */
761 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
762 {
763 	return zynqmp_pm_invoke_fn(PM_IOCTL, mode, 3, 0, IOCTL_GET_PLL_FRAC_MODE, clk_id);
764 }
765 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
766 
767 /**
768  * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
769  *
770  * @clk_id:	PLL clock ID
771  * @data:	fraction data
772  *
773  * This function sets fraction data.
774  * It is valid for fraction mode only.
775  *
776  * Return: Returns status, either success or error+reason
777  */
778 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
779 {
780 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_DATA, clk_id, data);
781 }
782 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
783 
784 /**
785  * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
786  *
787  * @clk_id:	PLL clock ID
788  * @data:	fraction data
789  *
790  * This function returns fraction data value.
791  *
792  * Return: Returns status, either success or error+reason
793  */
794 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
795 {
796 	return zynqmp_pm_invoke_fn(PM_IOCTL, data, 3, 0, IOCTL_GET_PLL_FRAC_DATA, clk_id);
797 }
798 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
799 
800 /**
801  * zynqmp_pm_set_sd_tapdelay() -  Set tap delay for the SD device
802  *
803  * @node_id:	Node ID of the device
804  * @type:	Type of tap delay to set (input/output)
805  * @value:	Value to set fot the tap delay
806  *
807  * This function sets input/output tap delay for the SD device.
808  *
809  * Return:	Returns status, either success or error+reason
810  */
811 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
812 {
813 	u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL;
814 	u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16);
815 
816 	if (value) {
817 		return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_SET_SD_TAPDELAY, type,
818 					   value);
819 	}
820 
821 	/*
822 	 * Work around completely misdesigned firmware API on Xilinx ZynqMP.
823 	 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only
824 	 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA
825 	 * bits, but there is no matching call to clear those bits. If those
826 	 * bits are not cleared, SDMMC tuning may fail.
827 	 *
828 	 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to
829 	 * allow complete unrestricted access to all address space, including
830 	 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access
831 	 * to which was supposed to be protected by the current firmware API.
832 	 *
833 	 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter
834 	 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits.
835 	 */
836 	return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 2, reg, mask);
837 }
838 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
839 
840 /**
841  * zynqmp_pm_sd_dll_reset() - Reset DLL logic
842  *
843  * @node_id:	Node ID of the device
844  * @type:	Reset type
845  *
846  * This function resets DLL logic for the SD device.
847  *
848  * Return:	Returns status, either success or error+reason
849  */
850 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
851 {
852 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SD_DLL_RESET, type);
853 }
854 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
855 
856 /**
857  * zynqmp_pm_ospi_mux_select() - OSPI Mux selection
858  *
859  * @dev_id:	Device Id of the OSPI device.
860  * @select:	OSPI Mux select value.
861  *
862  * This function select the OSPI Mux.
863  *
864  * Return:	Returns status, either success or error+reason
865  */
866 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
867 {
868 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, dev_id, IOCTL_OSPI_MUX_SELECT, select);
869 }
870 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
871 
872 /**
873  * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
874  * @index:	GGS register index
875  * @value:	Register value to be written
876  *
877  * This function writes value to GGS register.
878  *
879  * Return:      Returns status, either success or error+reason
880  */
881 int zynqmp_pm_write_ggs(u32 index, u32 value)
882 {
883 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_GGS, index, value);
884 }
885 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
886 
887 /**
888  * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
889  * @index:	GGS register index
890  * @value:	Register value to be written
891  *
892  * This function returns GGS register value.
893  *
894  * Return:	Returns status, either success or error+reason
895  */
896 int zynqmp_pm_read_ggs(u32 index, u32 *value)
897 {
898 	return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_GGS, index);
899 }
900 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
901 
902 /**
903  * zynqmp_pm_write_pggs() - PM API for writing persistent global general
904  *			     storage (pggs)
905  * @index:	PGGS register index
906  * @value:	Register value to be written
907  *
908  * This function writes value to PGGS register.
909  *
910  * Return:	Returns status, either success or error+reason
911  */
912 int zynqmp_pm_write_pggs(u32 index, u32 value)
913 {
914 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_PGGS, index, value);
915 }
916 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
917 
918 /**
919  * zynqmp_pm_read_pggs() - PM API for reading persistent global general
920  *			     storage (pggs)
921  * @index:	PGGS register index
922  * @value:	Register value to be written
923  *
924  * This function returns PGGS register value.
925  *
926  * Return:	Returns status, either success or error+reason
927  */
928 int zynqmp_pm_read_pggs(u32 index, u32 *value)
929 {
930 	return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_PGGS, index);
931 }
932 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
933 
934 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
935 {
936 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_TAPDELAY_BYPASS, index, value);
937 }
938 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
939 
940 /**
941  * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
942  * @value:	Status value to be written
943  *
944  * This function sets healthy bit value to indicate boot health status
945  * to firmware.
946  *
947  * Return:	Returns status, either success or error+reason
948  */
949 int zynqmp_pm_set_boot_health_status(u32 value)
950 {
951 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, 0, IOCTL_SET_BOOT_HEALTH_STATUS, value);
952 }
953 
954 /**
955  * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
956  * @reset:		Reset to be configured
957  * @assert_flag:	Flag stating should reset be asserted (1) or
958  *			released (0)
959  *
960  * Return: Returns status, either success or error+reason
961  */
962 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
963 			   const enum zynqmp_pm_reset_action assert_flag)
964 {
965 	return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, NULL, 2, reset, assert_flag);
966 }
967 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
968 
969 /**
970  * zynqmp_pm_reset_get_status - Get status of the reset
971  * @reset:      Reset whose status should be returned
972  * @status:     Returned status
973  *
974  * Return: Returns status, either success or error+reason
975  */
976 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
977 {
978 	u32 ret_payload[PAYLOAD_ARG_CNT];
979 	int ret;
980 
981 	if (!status)
982 		return -EINVAL;
983 
984 	ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, ret_payload, 1, reset);
985 	*status = ret_payload[1];
986 
987 	return ret;
988 }
989 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
990 
991 /**
992  * zynqmp_pm_fpga_load - Perform the fpga load
993  * @address:	Address to write to
994  * @size:	pl bitstream size
995  * @flags:	Bitstream type
996  *	-XILINX_ZYNQMP_PM_FPGA_FULL:  FPGA full reconfiguration
997  *	-XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
998  *
999  * This function provides access to pmufw. To transfer
1000  * the required bitstream into PL.
1001  *
1002  * Return: Returns status, either success or error+reason
1003  */
1004 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
1005 {
1006 	u32 ret_payload[PAYLOAD_ARG_CNT];
1007 	int ret;
1008 
1009 	ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, ret_payload, 4, lower_32_bits(address),
1010 				  upper_32_bits(address), size, flags);
1011 	if (ret_payload[0])
1012 		return -ret_payload[0];
1013 
1014 	return ret;
1015 }
1016 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
1017 
1018 /**
1019  * zynqmp_pm_fpga_get_status - Read value from PCAP status register
1020  * @value: Value to read
1021  *
1022  * This function provides access to the pmufw to get the PCAP
1023  * status
1024  *
1025  * Return: Returns status, either success or error+reason
1026  */
1027 int zynqmp_pm_fpga_get_status(u32 *value)
1028 {
1029 	u32 ret_payload[PAYLOAD_ARG_CNT];
1030 	int ret;
1031 
1032 	if (!value)
1033 		return -EINVAL;
1034 
1035 	ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, ret_payload, 0);
1036 	*value = ret_payload[1];
1037 
1038 	return ret;
1039 }
1040 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
1041 
1042 /**
1043  * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status.
1044  * @value: Buffer to store FPGA configuration status.
1045  *
1046  * This function provides access to the pmufw to get the FPGA configuration
1047  * status
1048  *
1049  * Return: 0 on success, a negative value on error
1050  */
1051 int zynqmp_pm_fpga_get_config_status(u32 *value)
1052 {
1053 	u32 ret_payload[PAYLOAD_ARG_CNT];
1054 	u32 buf, lower_addr, upper_addr;
1055 	int ret;
1056 
1057 	if (!value)
1058 		return -EINVAL;
1059 
1060 	lower_addr = lower_32_bits((u64)&buf);
1061 	upper_addr = upper_32_bits((u64)&buf);
1062 
1063 	ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4,
1064 				  XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, lower_addr, upper_addr,
1065 				  XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG);
1066 
1067 	*value = ret_payload[1];
1068 
1069 	return ret;
1070 }
1071 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
1072 
1073 /**
1074  * zynqmp_pm_pinctrl_request - Request Pin from firmware
1075  * @pin: Pin number to request
1076  *
1077  * This function requests pin from firmware.
1078  *
1079  * Return: Returns status, either success or error+reason.
1080  */
1081 int zynqmp_pm_pinctrl_request(const u32 pin)
1082 {
1083 	return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, NULL, 1, pin);
1084 }
1085 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
1086 
1087 /**
1088  * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
1089  * @pin: Pin number to release
1090  *
1091  * This function release pin from firmware.
1092  *
1093  * Return: Returns status, either success or error+reason.
1094  */
1095 int zynqmp_pm_pinctrl_release(const u32 pin)
1096 {
1097 	return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, NULL, 1, pin);
1098 }
1099 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
1100 
1101 /**
1102  * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin
1103  * @pin: Pin number
1104  * @id: Buffer to store function ID
1105  *
1106  * This function provides the function currently set for the given pin.
1107  *
1108  * Return: Returns status, either success or error+reason
1109  */
1110 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
1111 {
1112 	u32 ret_payload[PAYLOAD_ARG_CNT];
1113 	int ret;
1114 
1115 	if (!id)
1116 		return -EINVAL;
1117 
1118 	ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, ret_payload, 1, pin);
1119 	*id = ret_payload[1];
1120 
1121 	return ret;
1122 }
1123 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
1124 
1125 /**
1126  * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1127  * @pin: Pin number
1128  * @id: Function ID to set
1129  *
1130  * This function sets requested function for the given pin.
1131  *
1132  * Return: Returns status, either success or error+reason.
1133  */
1134 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1135 {
1136 	return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, NULL, 2, pin, id);
1137 }
1138 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1139 
1140 /**
1141  * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1142  * @pin: Pin number
1143  * @param: Parameter to get
1144  * @value: Buffer to store parameter value
1145  *
1146  * This function gets requested configuration parameter for the given pin.
1147  *
1148  * Return: Returns status, either success or error+reason.
1149  */
1150 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1151 				 u32 *value)
1152 {
1153 	u32 ret_payload[PAYLOAD_ARG_CNT];
1154 	int ret;
1155 
1156 	if (!value)
1157 		return -EINVAL;
1158 
1159 	ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, ret_payload, 2, pin, param);
1160 	*value = ret_payload[1];
1161 
1162 	return ret;
1163 }
1164 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1165 
1166 /**
1167  * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1168  * @pin: Pin number
1169  * @param: Parameter to set
1170  * @value: Parameter value to set
1171  *
1172  * This function sets requested configuration parameter for the given pin.
1173  *
1174  * Return: Returns status, either success or error+reason.
1175  */
1176 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1177 				 u32 value)
1178 {
1179 	int ret;
1180 
1181 	if (pm_family_code == ZYNQMP_FAMILY_CODE &&
1182 	    param == PM_PINCTRL_CONFIG_TRI_STATE) {
1183 		ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET);
1184 		if (ret < PM_PINCTRL_PARAM_SET_VERSION)
1185 			return -EOPNOTSUPP;
1186 	}
1187 
1188 	return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, NULL, 3, pin, param, value);
1189 }
1190 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1191 
1192 /**
1193  * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1194  * @ps_mode: Returned output value of ps_mode
1195  *
1196  * This API function is to be used for notify the power management controller
1197  * to read bootpin status.
1198  *
1199  * Return: status, either success or error+reason
1200  */
1201 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1202 {
1203 	unsigned int ret;
1204 	u32 ret_payload[PAYLOAD_ARG_CNT];
1205 
1206 	ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, ret_payload, 1, CRL_APB_BOOT_PIN_CTRL);
1207 
1208 	*ps_mode = ret_payload[1];
1209 
1210 	return ret;
1211 }
1212 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1213 
1214 /**
1215  * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1216  * @ps_mode: Value to be written to the bootpin ctrl register
1217  *
1218  * This API function is to be used for notify the power management controller
1219  * to configure bootpin.
1220  *
1221  * Return: Returns status, either success or error+reason
1222  */
1223 int zynqmp_pm_bootmode_write(u32 ps_mode)
1224 {
1225 	return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 3, CRL_APB_BOOT_PIN_CTRL,
1226 				   CRL_APB_BOOTPIN_CTRL_MASK, ps_mode);
1227 }
1228 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1229 
1230 /**
1231  * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1232  *			       master has initialized its own power management
1233  *
1234  * Return: Returns status, either success or error+reason
1235  *
1236  * This API function is to be used for notify the power management controller
1237  * about the completed power management initialization.
1238  */
1239 int zynqmp_pm_init_finalize(void)
1240 {
1241 	return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, NULL, 0);
1242 }
1243 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
1244 
1245 /**
1246  * zynqmp_pm_set_suspend_mode()	- Set system suspend mode
1247  * @mode:	Mode to set for system suspend
1248  *
1249  * This API function is used to set mode of system suspend.
1250  *
1251  * Return: Returns status, either success or error+reason
1252  */
1253 int zynqmp_pm_set_suspend_mode(u32 mode)
1254 {
1255 	return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, NULL, 1, mode);
1256 }
1257 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1258 
1259 /**
1260  * zynqmp_pm_request_node() - Request a node with specific capabilities
1261  * @node:		Node ID of the slave
1262  * @capabilities:	Requested capabilities of the slave
1263  * @qos:		Quality of service (not supported)
1264  * @ack:		Flag to specify whether acknowledge is requested
1265  *
1266  * This function is used by master to request particular node from firmware.
1267  * Every master must request node before using it.
1268  *
1269  * Return: Returns status, either success or error+reason
1270  */
1271 int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1272 			   const u32 qos, const enum zynqmp_pm_request_ack ack)
1273 {
1274 	return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, NULL, 4, node, capabilities, qos, ack);
1275 }
1276 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1277 
1278 /**
1279  * zynqmp_pm_release_node() - Release a node
1280  * @node:	Node ID of the slave
1281  *
1282  * This function is used by master to inform firmware that master
1283  * has released node. Once released, master must not use that node
1284  * without re-request.
1285  *
1286  * Return: Returns status, either success or error+reason
1287  */
1288 int zynqmp_pm_release_node(const u32 node)
1289 {
1290 	return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, NULL, 1, node);
1291 }
1292 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1293 
1294 /**
1295  * zynqmp_pm_get_rpu_mode() - Get RPU mode
1296  * @node_id:	Node ID of the device
1297  * @rpu_mode:	return by reference value
1298  *		either split or lockstep
1299  *
1300  * Return:	return 0 on success or error+reason.
1301  *		if success, then  rpu_mode will be set
1302  *		to current rpu mode.
1303  */
1304 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
1305 {
1306 	u32 ret_payload[PAYLOAD_ARG_CNT];
1307 	int ret;
1308 
1309 	ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_GET_RPU_OPER_MODE);
1310 
1311 	/* only set rpu_mode if no error */
1312 	if (ret == XST_PM_SUCCESS)
1313 		*rpu_mode = ret_payload[0];
1314 
1315 	return ret;
1316 }
1317 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode);
1318 
1319 /**
1320  * zynqmp_pm_set_rpu_mode() - Set RPU mode
1321  * @node_id:	Node ID of the device
1322  * @rpu_mode:	Argument 1 to requested IOCTL call. either split or lockstep
1323  *
1324  *		This function is used to set RPU mode to split or
1325  *		lockstep
1326  *
1327  * Return:	Returns status, either success or error+reason
1328  */
1329 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
1330 {
1331 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SET_RPU_OPER_MODE,
1332 				   (u32)rpu_mode);
1333 }
1334 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
1335 
1336 /**
1337  * zynqmp_pm_set_tcm_config - configure TCM
1338  * @node_id:	Firmware specific TCM subsystem ID
1339  * @tcm_mode:	Argument 1 to requested IOCTL call
1340  *              either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT
1341  *
1342  * This function is used to set RPU mode to split or combined
1343  *
1344  * Return: status: 0 for success, else failure
1345  */
1346 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
1347 {
1348 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_TCM_COMB_CONFIG,
1349 				   (u32)tcm_mode);
1350 }
1351 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
1352 
1353 /**
1354  * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to
1355  *             be powered down forcefully
1356  * @node:  Node ID of the targeted PU or subsystem
1357  * @ack:   Flag to specify whether acknowledge is requested
1358  *
1359  * Return: status, either success or error+reason
1360  */
1361 int zynqmp_pm_force_pwrdwn(const u32 node,
1362 			   const enum zynqmp_pm_request_ack ack)
1363 {
1364 	return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, NULL, 2, node, ack);
1365 }
1366 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
1367 
1368 /**
1369  * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem
1370  * @node:  Node ID of the master or subsystem
1371  * @set_addr:  Specifies whether the address argument is relevant
1372  * @address:   Address from which to resume when woken up
1373  * @ack:   Flag to specify whether acknowledge requested
1374  *
1375  * Return: status, either success or error+reason
1376  */
1377 int zynqmp_pm_request_wake(const u32 node,
1378 			   const bool set_addr,
1379 			   const u64 address,
1380 			   const enum zynqmp_pm_request_ack ack)
1381 {
1382 	/* set_addr flag is encoded into 1st bit of address */
1383 	return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, NULL, 4, node, address | set_addr,
1384 				   address >> 32, ack);
1385 }
1386 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
1387 
1388 /**
1389  * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1390  * @node:		Node ID of the slave
1391  * @capabilities:	Requested capabilities of the slave
1392  * @qos:		Quality of service (not supported)
1393  * @ack:		Flag to specify whether acknowledge is requested
1394  *
1395  * This API function is to be used for slaves a PU already has requested
1396  * to change its capabilities.
1397  *
1398  * Return: Returns status, either success or error+reason
1399  */
1400 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1401 			      const u32 qos,
1402 			      const enum zynqmp_pm_request_ack ack)
1403 {
1404 	return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, NULL, 4, node, capabilities, qos, ack);
1405 }
1406 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1407 
1408 /**
1409  * zynqmp_pm_load_pdi - Load and process PDI
1410  * @src:	Source device where PDI is located
1411  * @address:	PDI src address
1412  *
1413  * This function provides support to load PDI from linux
1414  *
1415  * Return: Returns status, either success or error+reason
1416  */
1417 int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1418 {
1419 	return zynqmp_pm_invoke_fn(PM_LOAD_PDI, NULL, 3, src, lower_32_bits(address),
1420 				   upper_32_bits(address));
1421 }
1422 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1423 
1424 /**
1425  * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1426  * AES-GCM core.
1427  * @address:	Address of the AesParams structure.
1428  * @out:	Returned output value
1429  *
1430  * Return:	Returns status, either success or error code.
1431  */
1432 int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1433 {
1434 	u32 ret_payload[PAYLOAD_ARG_CNT];
1435 	int ret;
1436 
1437 	if (!out)
1438 		return -EINVAL;
1439 
1440 	ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, ret_payload, 2, upper_32_bits(address),
1441 				  lower_32_bits(address));
1442 	*out = ret_payload[1];
1443 
1444 	return ret;
1445 }
1446 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1447 
1448 /**
1449  * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
1450  * @address:	Address of the data/ Address of output buffer where
1451  *		hash should be stored.
1452  * @size:	Size of the data.
1453  * @flags:
1454  *	BIT(0) - for initializing csudma driver and SHA3(Here address
1455  *		 and size inputs can be NULL).
1456  *	BIT(1) - to call Sha3_Update API which can be called multiple
1457  *		 times when data is not contiguous.
1458  *	BIT(2) - to get final hash of the whole updated data.
1459  *		 Hash will be overwritten at provided address with
1460  *		 48 bytes.
1461  *
1462  * Return:	Returns status, either success or error code.
1463  */
1464 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
1465 {
1466 	u32 lower_addr = lower_32_bits(address);
1467 	u32 upper_addr = upper_32_bits(address);
1468 
1469 	return zynqmp_pm_invoke_fn(PM_SECURE_SHA, NULL, 4, upper_addr, lower_addr, size, flags);
1470 }
1471 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
1472 
1473 /**
1474  * zynqmp_pm_register_notifier() - PM API for register a subsystem
1475  *                                to be notified about specific
1476  *                                event/error.
1477  * @node:	Node ID to which the event is related.
1478  * @event:	Event Mask of Error events for which wants to get notified.
1479  * @wake:	Wake subsystem upon capturing the event if value 1
1480  * @enable:	Enable the registration for value 1, disable for value 0
1481  *
1482  * This function is used to register/un-register for particular node-event
1483  * combination in firmware.
1484  *
1485  * Return: Returns status, either success or error+reason
1486  */
1487 
1488 int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1489 				const u32 wake, const u32 enable)
1490 {
1491 	return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, NULL, 4, node, event, wake, enable);
1492 }
1493 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1494 
1495 /**
1496  * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1497  * @type:	Shutdown or restart? 0 for shutdown, 1 for restart
1498  * @subtype:	Specifies which system should be restarted or shut down
1499  *
1500  * Return:	Returns status, either success or error+reason
1501  */
1502 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1503 {
1504 	return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, NULL, 2, type, subtype);
1505 }
1506 
1507 /**
1508  * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1509  * @id:         The config ID of the feature to be configured
1510  * @value:      The config value of the feature to be configured
1511  *
1512  * Return:      Returns 0 on success or error value on failure.
1513  */
1514 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1515 {
1516 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_FEATURE_CONFIG, id, value);
1517 }
1518 
1519 /**
1520  * zynqmp_pm_get_feature_config - PM call to get value of configured feature
1521  * @id:         The config id of the feature to be queried
1522  * @payload:    Returned value array
1523  *
1524  * Return:      Returns 0 on success or error value on failure.
1525  */
1526 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1527 				 u32 *payload)
1528 {
1529 	return zynqmp_pm_invoke_fn(PM_IOCTL, payload, 3, 0, IOCTL_GET_FEATURE_CONFIG, id);
1530 }
1531 
1532 /**
1533  * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1534  * @node:	SD node ID
1535  * @config:	The config type of SD registers
1536  * @value:	Value to be set
1537  *
1538  * Return:	Returns 0 on success or error value on failure.
1539  */
1540 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1541 {
1542 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_SD_CONFIG, config, value);
1543 }
1544 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1545 
1546 /**
1547  * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1548  * @node:	GEM node ID
1549  * @config:	The config type of GEM registers
1550  * @value:	Value to be set
1551  *
1552  * Return:	Returns 0 on success or error value on failure.
1553  */
1554 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1555 			     u32 value)
1556 {
1557 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_GEM_CONFIG, config, value);
1558 }
1559 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1560 
1561 /**
1562  * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1563  * @subtype:	Shutdown subtype
1564  * @name:	Matching string for scope argument
1565  *
1566  * This struct encapsulates mapping between shutdown scope ID and string.
1567  */
1568 struct zynqmp_pm_shutdown_scope {
1569 	const enum zynqmp_pm_shutdown_subtype subtype;
1570 	const char *name;
1571 };
1572 
1573 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1574 	[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1575 		.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1576 		.name = "subsystem",
1577 	},
1578 	[ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1579 		.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1580 		.name = "ps_only",
1581 	},
1582 	[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1583 		.subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1584 		.name = "system",
1585 	},
1586 };
1587 
1588 static struct zynqmp_pm_shutdown_scope *selected_scope =
1589 		&shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1590 
1591 /**
1592  * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1593  * @scope_string:	Shutdown scope string
1594  *
1595  * Return:		Return pointer to matching shutdown scope struct from
1596  *			array of available options in system if string is valid,
1597  *			otherwise returns NULL.
1598  */
1599 static struct zynqmp_pm_shutdown_scope*
1600 		zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1601 {
1602 	int count;
1603 
1604 	for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1605 		if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1606 			return &shutdown_scopes[count];
1607 
1608 	return NULL;
1609 }
1610 
1611 static ssize_t shutdown_scope_show(struct device *device,
1612 				   struct device_attribute *attr,
1613 				   char *buf)
1614 {
1615 	int i;
1616 
1617 	for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1618 		if (&shutdown_scopes[i] == selected_scope) {
1619 			strcat(buf, "[");
1620 			strcat(buf, shutdown_scopes[i].name);
1621 			strcat(buf, "]");
1622 		} else {
1623 			strcat(buf, shutdown_scopes[i].name);
1624 		}
1625 		strcat(buf, " ");
1626 	}
1627 	strcat(buf, "\n");
1628 
1629 	return strlen(buf);
1630 }
1631 
1632 static ssize_t shutdown_scope_store(struct device *device,
1633 				    struct device_attribute *attr,
1634 				    const char *buf, size_t count)
1635 {
1636 	int ret;
1637 	struct zynqmp_pm_shutdown_scope *scope;
1638 
1639 	scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1640 	if (!scope)
1641 		return -EINVAL;
1642 
1643 	ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1644 					scope->subtype);
1645 	if (ret) {
1646 		pr_err("unable to set shutdown scope %s\n", buf);
1647 		return ret;
1648 	}
1649 
1650 	selected_scope = scope;
1651 
1652 	return count;
1653 }
1654 
1655 static DEVICE_ATTR_RW(shutdown_scope);
1656 
1657 static ssize_t health_status_store(struct device *device,
1658 				   struct device_attribute *attr,
1659 				   const char *buf, size_t count)
1660 {
1661 	int ret;
1662 	unsigned int value;
1663 
1664 	ret = kstrtouint(buf, 10, &value);
1665 	if (ret)
1666 		return ret;
1667 
1668 	ret = zynqmp_pm_set_boot_health_status(value);
1669 	if (ret) {
1670 		dev_err(device, "unable to set healthy bit value to %u\n",
1671 			value);
1672 		return ret;
1673 	}
1674 
1675 	return count;
1676 }
1677 
1678 static DEVICE_ATTR_WO(health_status);
1679 
1680 static ssize_t ggs_show(struct device *device,
1681 			struct device_attribute *attr,
1682 			char *buf,
1683 			u32 reg)
1684 {
1685 	int ret;
1686 	u32 ret_payload[PAYLOAD_ARG_CNT];
1687 
1688 	ret = zynqmp_pm_read_ggs(reg, ret_payload);
1689 	if (ret)
1690 		return ret;
1691 
1692 	return sprintf(buf, "0x%x\n", ret_payload[1]);
1693 }
1694 
1695 static ssize_t ggs_store(struct device *device,
1696 			 struct device_attribute *attr,
1697 			 const char *buf, size_t count,
1698 			 u32 reg)
1699 {
1700 	long value;
1701 	int ret;
1702 
1703 	if (reg >= GSS_NUM_REGS)
1704 		return -EINVAL;
1705 
1706 	ret = kstrtol(buf, 16, &value);
1707 	if (ret) {
1708 		count = -EFAULT;
1709 		goto err;
1710 	}
1711 
1712 	ret = zynqmp_pm_write_ggs(reg, value);
1713 	if (ret)
1714 		count = -EFAULT;
1715 err:
1716 	return count;
1717 }
1718 
1719 /* GGS register show functions */
1720 #define GGS0_SHOW(N)						\
1721 	ssize_t ggs##N##_show(struct device *device,		\
1722 			      struct device_attribute *attr,	\
1723 			      char *buf)			\
1724 	{							\
1725 		return ggs_show(device, attr, buf, N);		\
1726 	}
1727 
1728 static GGS0_SHOW(0);
1729 static GGS0_SHOW(1);
1730 static GGS0_SHOW(2);
1731 static GGS0_SHOW(3);
1732 
1733 /* GGS register store function */
1734 #define GGS0_STORE(N)						\
1735 	ssize_t ggs##N##_store(struct device *device,		\
1736 			       struct device_attribute *attr,	\
1737 			       const char *buf,			\
1738 			       size_t count)			\
1739 	{							\
1740 		return ggs_store(device, attr, buf, count, N);	\
1741 	}
1742 
1743 static GGS0_STORE(0);
1744 static GGS0_STORE(1);
1745 static GGS0_STORE(2);
1746 static GGS0_STORE(3);
1747 
1748 static ssize_t pggs_show(struct device *device,
1749 			 struct device_attribute *attr,
1750 			 char *buf,
1751 			 u32 reg)
1752 {
1753 	int ret;
1754 	u32 ret_payload[PAYLOAD_ARG_CNT];
1755 
1756 	ret = zynqmp_pm_read_pggs(reg, ret_payload);
1757 	if (ret)
1758 		return ret;
1759 
1760 	return sprintf(buf, "0x%x\n", ret_payload[1]);
1761 }
1762 
1763 static ssize_t pggs_store(struct device *device,
1764 			  struct device_attribute *attr,
1765 			  const char *buf, size_t count,
1766 			  u32 reg)
1767 {
1768 	long value;
1769 	int ret;
1770 
1771 	if (reg >= GSS_NUM_REGS)
1772 		return -EINVAL;
1773 
1774 	ret = kstrtol(buf, 16, &value);
1775 	if (ret) {
1776 		count = -EFAULT;
1777 		goto err;
1778 	}
1779 
1780 	ret = zynqmp_pm_write_pggs(reg, value);
1781 	if (ret)
1782 		count = -EFAULT;
1783 
1784 err:
1785 	return count;
1786 }
1787 
1788 #define PGGS0_SHOW(N)						\
1789 	ssize_t pggs##N##_show(struct device *device,		\
1790 			       struct device_attribute *attr,	\
1791 			       char *buf)			\
1792 	{							\
1793 		return pggs_show(device, attr, buf, N);		\
1794 	}
1795 
1796 #define PGGS0_STORE(N)						\
1797 	ssize_t pggs##N##_store(struct device *device,		\
1798 				struct device_attribute *attr,	\
1799 				const char *buf,		\
1800 				size_t count)			\
1801 	{							\
1802 		return pggs_store(device, attr, buf, count, N);	\
1803 	}
1804 
1805 /* PGGS register show functions */
1806 static PGGS0_SHOW(0);
1807 static PGGS0_SHOW(1);
1808 static PGGS0_SHOW(2);
1809 static PGGS0_SHOW(3);
1810 
1811 /* PGGS register store functions */
1812 static PGGS0_STORE(0);
1813 static PGGS0_STORE(1);
1814 static PGGS0_STORE(2);
1815 static PGGS0_STORE(3);
1816 
1817 /* GGS register attributes */
1818 static DEVICE_ATTR_RW(ggs0);
1819 static DEVICE_ATTR_RW(ggs1);
1820 static DEVICE_ATTR_RW(ggs2);
1821 static DEVICE_ATTR_RW(ggs3);
1822 
1823 /* PGGS register attributes */
1824 static DEVICE_ATTR_RW(pggs0);
1825 static DEVICE_ATTR_RW(pggs1);
1826 static DEVICE_ATTR_RW(pggs2);
1827 static DEVICE_ATTR_RW(pggs3);
1828 
1829 static ssize_t feature_config_id_show(struct device *device,
1830 				      struct device_attribute *attr,
1831 				      char *buf)
1832 {
1833 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1834 
1835 	return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1836 }
1837 
1838 static ssize_t feature_config_id_store(struct device *device,
1839 				       struct device_attribute *attr,
1840 				       const char *buf, size_t count)
1841 {
1842 	u32 config_id;
1843 	int ret;
1844 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1845 
1846 	if (!buf)
1847 		return -EINVAL;
1848 
1849 	ret = kstrtou32(buf, 10, &config_id);
1850 	if (ret)
1851 		return ret;
1852 
1853 	devinfo->feature_conf_id = config_id;
1854 
1855 	return count;
1856 }
1857 
1858 static DEVICE_ATTR_RW(feature_config_id);
1859 
1860 static ssize_t feature_config_value_show(struct device *device,
1861 					 struct device_attribute *attr,
1862 					 char *buf)
1863 {
1864 	int ret;
1865 	u32 ret_payload[PAYLOAD_ARG_CNT];
1866 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1867 
1868 	ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1869 					   ret_payload);
1870 	if (ret)
1871 		return ret;
1872 
1873 	return sysfs_emit(buf, "%d\n", ret_payload[1]);
1874 }
1875 
1876 static ssize_t feature_config_value_store(struct device *device,
1877 					  struct device_attribute *attr,
1878 					  const char *buf, size_t count)
1879 {
1880 	u32 value;
1881 	int ret;
1882 	struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1883 
1884 	if (!buf)
1885 		return -EINVAL;
1886 
1887 	ret = kstrtou32(buf, 10, &value);
1888 	if (ret)
1889 		return ret;
1890 
1891 	ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
1892 					   value);
1893 	if (ret)
1894 		return ret;
1895 
1896 	return count;
1897 }
1898 
1899 static DEVICE_ATTR_RW(feature_config_value);
1900 
1901 static struct attribute *zynqmp_firmware_attrs[] = {
1902 	&dev_attr_ggs0.attr,
1903 	&dev_attr_ggs1.attr,
1904 	&dev_attr_ggs2.attr,
1905 	&dev_attr_ggs3.attr,
1906 	&dev_attr_pggs0.attr,
1907 	&dev_attr_pggs1.attr,
1908 	&dev_attr_pggs2.attr,
1909 	&dev_attr_pggs3.attr,
1910 	&dev_attr_shutdown_scope.attr,
1911 	&dev_attr_health_status.attr,
1912 	&dev_attr_feature_config_id.attr,
1913 	&dev_attr_feature_config_value.attr,
1914 	NULL,
1915 };
1916 
1917 ATTRIBUTE_GROUPS(zynqmp_firmware);
1918 
1919 static int zynqmp_firmware_probe(struct platform_device *pdev)
1920 {
1921 	struct device *dev = &pdev->dev;
1922 	struct zynqmp_devinfo *devinfo;
1923 	int ret;
1924 
1925 	ret = get_set_conduit_method(dev->of_node);
1926 	if (ret)
1927 		return ret;
1928 
1929 	ret = do_feature_check_call(PM_FEATURE_CHECK);
1930 	if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1))
1931 		feature_check_enabled = true;
1932 
1933 	devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
1934 	if (!devinfo)
1935 		return -ENOMEM;
1936 
1937 	devinfo->dev = dev;
1938 
1939 	platform_set_drvdata(pdev, devinfo);
1940 
1941 	/* Check PM API version number */
1942 	ret = zynqmp_pm_get_api_version(&pm_api_version);
1943 	if (ret)
1944 		return ret;
1945 
1946 	if (pm_api_version < ZYNQMP_PM_VERSION) {
1947 		panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1948 		      __func__,
1949 		      ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1950 		      pm_api_version >> 16, pm_api_version & 0xFFFF);
1951 	}
1952 
1953 	pr_info("%s Platform Management API v%d.%d\n", __func__,
1954 		pm_api_version >> 16, pm_api_version & 0xFFFF);
1955 
1956 	/* Get the Family code and sub family code of platform */
1957 	ret = zynqmp_pm_get_family_info(&pm_family_code, &pm_sub_family_code);
1958 	if (ret < 0)
1959 		return ret;
1960 
1961 	/* Check trustzone version number */
1962 	ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1963 	if (ret)
1964 		panic("Legacy trustzone found without version support\n");
1965 
1966 	if (pm_tz_version < ZYNQMP_TZ_VERSION)
1967 		panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1968 		      __func__,
1969 		      ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1970 		      pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1971 
1972 	pr_info("%s Trustzone version v%d.%d\n", __func__,
1973 		pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1974 
1975 	ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1976 			      ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1977 	if (ret) {
1978 		dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1979 		return ret;
1980 	}
1981 
1982 	zynqmp_pm_api_debugfs_init();
1983 
1984 	if (pm_family_code == VERSAL_FAMILY_CODE) {
1985 		em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
1986 						       -1, NULL, 0);
1987 		if (IS_ERR(em_dev))
1988 			dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
1989 	}
1990 
1991 	return of_platform_populate(dev->of_node, NULL, NULL, dev);
1992 }
1993 
1994 static int zynqmp_firmware_remove(struct platform_device *pdev)
1995 {
1996 	struct pm_api_feature_data *feature_data;
1997 	struct hlist_node *tmp;
1998 	int i;
1999 
2000 	mfd_remove_devices(&pdev->dev);
2001 	zynqmp_pm_api_debugfs_exit();
2002 
2003 	hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
2004 		hash_del(&feature_data->hentry);
2005 		kfree(feature_data);
2006 	}
2007 
2008 	platform_device_unregister(em_dev);
2009 
2010 	return 0;
2011 }
2012 
2013 static const struct of_device_id zynqmp_firmware_of_match[] = {
2014 	{.compatible = "xlnx,zynqmp-firmware"},
2015 	{.compatible = "xlnx,versal-firmware"},
2016 	{},
2017 };
2018 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
2019 
2020 static struct platform_driver zynqmp_firmware_driver = {
2021 	.driver = {
2022 		.name = "zynqmp_firmware",
2023 		.of_match_table = zynqmp_firmware_of_match,
2024 		.dev_groups = zynqmp_firmware_groups,
2025 	},
2026 	.probe = zynqmp_firmware_probe,
2027 	.remove = zynqmp_firmware_remove,
2028 };
2029 module_platform_driver(zynqmp_firmware_driver);
2030