1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xilinx Zynq MPSoC Firmware layer 4 * 5 * Copyright (C) 2014-2022 Xilinx, Inc. 6 * Copyright (C) 2022 - 2026 Advanced Micro Devices, Inc. 7 * 8 * Michal Simek <michal.simek@amd.com> 9 * Davorin Mista <davorin.mista@aggios.com> 10 * Jolly Shah <jollys@xilinx.com> 11 * Rajan Vaja <rajanv@xilinx.com> 12 */ 13 14 #include <linux/arm-smccc.h> 15 #include <linux/compiler.h> 16 #include <linux/crash_dump.h> 17 #include <linux/device.h> 18 #include <linux/init.h> 19 #include <linux/mfd/core.h> 20 #include <linux/module.h> 21 #include <linux/of.h> 22 #include <linux/of_platform.h> 23 #include <linux/platform_device.h> 24 #include <linux/pm_domain.h> 25 #include <linux/slab.h> 26 #include <linux/uaccess.h> 27 #include <linux/hashtable.h> 28 29 #include <linux/firmware/xlnx-zynqmp.h> 30 #include <linux/firmware/xlnx-event-manager.h> 31 #include "zynqmp-debug.h" 32 33 /* Max HashMap Order for PM API feature check (1<<7 = 128) */ 34 #define PM_API_FEATURE_CHECK_MAX_ORDER 7 35 36 /* CRL registers and bitfields */ 37 #define CRL_APB_BASE 0xFF5E0000U 38 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 39 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U)) 40 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 41 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU 42 43 /* IOCTL/QUERY feature payload size */ 44 #define FEATURE_PAYLOAD_SIZE 2 45 46 static bool feature_check_enabled; 47 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER); 48 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE]; 49 static u32 query_features[FEATURE_PAYLOAD_SIZE]; 50 51 static u32 sip_svc_version; 52 static struct platform_device *em_dev; 53 54 /** 55 * struct zynqmp_devinfo - Structure for Zynqmp device instance 56 * @dev: Device Pointer 57 * @feature_conf_id: Feature conf id 58 */ 59 struct zynqmp_devinfo { 60 struct device *dev; 61 u32 feature_conf_id; 62 }; 63 64 /** 65 * struct pm_api_feature_data - PM API Feature data 66 * @pm_api_id: PM API Id, used as key to index into hashmap 67 * @feature_status: status of PM API feature: valid, invalid 68 * @hentry: hlist_node that hooks this entry into hashtable 69 */ 70 struct pm_api_feature_data { 71 u32 pm_api_id; 72 int feature_status; 73 struct hlist_node hentry; 74 }; 75 76 struct platform_fw_data { 77 /* 78 * Family code for platform. 79 */ 80 const u32 family_code; 81 }; 82 83 static struct platform_fw_data *active_platform_fw_data; 84 85 static const struct mfd_cell firmware_devs[] = { 86 { 87 .name = "zynqmp_power_controller", 88 }, 89 }; 90 91 /** 92 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes 93 * @ret_status: PMUFW return code 94 * 95 * Return: corresponding Linux error code 96 */ 97 static int zynqmp_pm_ret_code(u32 ret_status) 98 { 99 switch (ret_status) { 100 case XST_PM_SUCCESS: 101 case XST_PM_DOUBLE_REQ: 102 return 0; 103 case XST_PM_NO_FEATURE: 104 return -ENOTSUPP; 105 case XST_PM_INVALID_VERSION: 106 return -EOPNOTSUPP; 107 case XST_PM_NO_ACCESS: 108 return -EACCES; 109 case XST_PM_ABORT_SUSPEND: 110 return -ECANCELED; 111 case XST_PM_MULT_USER: 112 return -EUSERS; 113 case XST_PM_INTERNAL: 114 case XST_PM_CONFLICT: 115 case XST_PM_INVALID_NODE: 116 case XST_PM_INVALID_CRC: 117 default: 118 return -EINVAL; 119 } 120 } 121 122 static noinline int do_fw_call_fail(u32 *ret_payload, u32 num_args, ...) 123 { 124 return -ENODEV; 125 } 126 127 /* 128 * PM function call wrapper 129 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration 130 */ 131 static int (*do_fw_call)(u32 *ret_payload, u32, ...) = do_fw_call_fail; 132 133 /** 134 * do_fw_call_smc() - Call system-level platform management layer (SMC) 135 * @num_args: Number of variable arguments should be <= 8 136 * @ret_payload: Returned value array 137 * 138 * Invoke platform management function via SMC call (no hypervisor present). 139 * 140 * Return: Returns status, either success or error+reason 141 */ 142 static noinline int do_fw_call_smc(u32 *ret_payload, u32 num_args, ...) 143 { 144 struct arm_smccc_res res; 145 u64 args[8] = {0}; 146 va_list arg_list; 147 u8 i; 148 149 if (num_args > 8) 150 return -EINVAL; 151 152 va_start(arg_list, num_args); 153 154 for (i = 0; i < num_args; i++) 155 args[i] = va_arg(arg_list, u64); 156 157 va_end(arg_list); 158 159 arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res); 160 161 if (ret_payload) { 162 ret_payload[0] = lower_32_bits(res.a0); 163 ret_payload[1] = upper_32_bits(res.a0); 164 ret_payload[2] = lower_32_bits(res.a1); 165 ret_payload[3] = upper_32_bits(res.a1); 166 ret_payload[4] = lower_32_bits(res.a2); 167 ret_payload[5] = upper_32_bits(res.a2); 168 ret_payload[6] = lower_32_bits(res.a3); 169 } 170 171 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 172 } 173 174 /** 175 * do_fw_call_hvc() - Call system-level platform management layer (HVC) 176 * @num_args: Number of variable arguments should be <= 8 177 * @ret_payload: Returned value array 178 * 179 * Invoke platform management function via HVC 180 * HVC-based for communication through hypervisor 181 * (no direct communication with ATF). 182 * 183 * Return: Returns status, either success or error+reason 184 */ 185 static noinline int do_fw_call_hvc(u32 *ret_payload, u32 num_args, ...) 186 { 187 struct arm_smccc_res res; 188 u64 args[8] = {0}; 189 va_list arg_list; 190 u8 i; 191 192 if (num_args > 8) 193 return -EINVAL; 194 195 va_start(arg_list, num_args); 196 197 for (i = 0; i < num_args; i++) 198 args[i] = va_arg(arg_list, u64); 199 200 va_end(arg_list); 201 202 arm_smccc_hvc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res); 203 204 if (ret_payload) { 205 ret_payload[0] = lower_32_bits(res.a0); 206 ret_payload[1] = upper_32_bits(res.a0); 207 ret_payload[2] = lower_32_bits(res.a1); 208 ret_payload[3] = upper_32_bits(res.a1); 209 ret_payload[4] = lower_32_bits(res.a2); 210 ret_payload[5] = upper_32_bits(res.a2); 211 ret_payload[6] = lower_32_bits(res.a3); 212 } 213 214 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 215 } 216 217 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload) 218 { 219 int ret; 220 u64 smc_arg[2]; 221 u32 module_id; 222 u32 feature_check_api_id; 223 224 module_id = FIELD_GET(MODULE_ID_MASK, api_id); 225 226 /* 227 * Feature check of APIs belonging to PM and XSEM are handled by calling 228 * PM_FEATURE_CHECK API. For other modules, call PM_API_FEATURES API. 229 */ 230 if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID) 231 feature_check_api_id = PM_FEATURE_CHECK; 232 else 233 feature_check_api_id = PM_API_FEATURES; 234 235 if (module_id == TF_A_MODULE_ID) 236 smc_arg[1] = api_id; 237 else 238 smc_arg[1] = (api_id & API_ID_MASK); 239 240 smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id; 241 242 ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]); 243 244 /* 245 * For TF-A APIs, if the feature check with PM_API_FEATURES fails, 246 * retry with the legacy PM_FEATURE_CHECK for backward compatibility. 247 */ 248 if (module_id == TF_A_MODULE_ID && ret) { 249 smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, PM_MODULE_ID) | 250 PM_FEATURE_CHECK; 251 ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]); 252 } 253 254 if (ret) 255 return ret; 256 257 return ret_payload[1]; 258 } 259 260 static int do_feature_check_call(const u32 api_id) 261 { 262 int ret; 263 u32 ret_payload[PAYLOAD_ARG_CNT]; 264 struct pm_api_feature_data *feature_data; 265 266 /* Check for existing entry in hash table for given api */ 267 hash_for_each_possible(pm_api_features_map, feature_data, hentry, 268 api_id) { 269 if (feature_data->pm_api_id == api_id) 270 return feature_data->feature_status; 271 } 272 273 /* Add new entry if not present */ 274 feature_data = kmalloc_obj(*feature_data, GFP_ATOMIC); 275 if (!feature_data) 276 return -ENOMEM; 277 278 feature_data->pm_api_id = api_id; 279 ret = __do_feature_check_call(api_id, ret_payload); 280 281 feature_data->feature_status = ret; 282 hash_add(pm_api_features_map, &feature_data->hentry, api_id); 283 284 if (api_id == PM_IOCTL) 285 /* Store supported IOCTL IDs mask */ 286 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 287 else if (api_id == PM_QUERY_DATA) 288 /* Store supported QUERY IDs mask */ 289 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 290 291 return ret; 292 } 293 294 /** 295 * zynqmp_pm_feature() - Check whether given feature is supported or not and 296 * store supported IOCTL/QUERY ID mask 297 * @api_id: API ID to check 298 * 299 * Return: Returns status, either success or error+reason 300 */ 301 int zynqmp_pm_feature(const u32 api_id) 302 { 303 int ret; 304 305 if (!feature_check_enabled) 306 return 0; 307 308 ret = do_feature_check_call(api_id); 309 310 return ret; 311 } 312 EXPORT_SYMBOL_GPL(zynqmp_pm_feature); 313 314 /** 315 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function 316 * is supported or not 317 * @api_id: PM_IOCTL or PM_QUERY_DATA 318 * @id: IOCTL or QUERY function IDs 319 * 320 * Return: Returns status, either success or error+reason 321 */ 322 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id) 323 { 324 int ret; 325 u32 *bit_mask; 326 327 /* Input arguments validation */ 328 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA)) 329 return -EINVAL; 330 331 /* Check feature check API version */ 332 ret = do_feature_check_call(PM_FEATURE_CHECK); 333 if (ret < 0) 334 return ret; 335 336 /* Check if feature check version 2 is supported or not */ 337 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) { 338 /* 339 * Call feature check for IOCTL/QUERY API to get IOCTL ID or 340 * QUERY ID feature status. 341 */ 342 ret = do_feature_check_call(api_id); 343 if (ret < 0) 344 return ret; 345 346 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features; 347 348 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U) 349 return -EOPNOTSUPP; 350 } else { 351 return -ENODATA; 352 } 353 354 return 0; 355 } 356 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported); 357 358 /** 359 * zynqmp_pm_invoke_fw_fn() - Invoke the system-level platform management layer 360 * caller function depending on the configuration 361 * @pm_api_id: Requested PM-API call 362 * @ret_payload: Returned value array 363 * @num_args: Number of arguments to requested PM-API call 364 * 365 * Invoke platform management function for SMC or HVC call, depending on 366 * configuration. 367 * Following SMC Calling Convention (SMCCC) for SMC64: 368 * Pm Function Identifier, 369 * PM_SIP_SVC + PASS_THROUGH_FW_CMD_ID = 370 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 371 * ((SMC_64) << FUNCID_CC_SHIFT) 372 * ((SIP_START) << FUNCID_OEN_SHIFT) 373 * (PASS_THROUGH_FW_CMD_ID)) 374 * 375 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 376 * PASS_THROUGH_FW_CMD_ID - Fixed SiP SVC call ID for FW specific calls. 377 * 378 * Return: Returns status, either success or error+reason 379 */ 380 int zynqmp_pm_invoke_fw_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...) 381 { 382 /* 383 * Added SIP service call Function Identifier 384 * Make sure to stay in x0 register 385 */ 386 u64 smc_arg[SMC_ARG_CNT_64]; 387 int ret, i; 388 va_list arg_list; 389 u32 args[SMC_ARG_CNT_32] = {0}; 390 u32 module_id; 391 392 if (num_args > SMC_ARG_CNT_32) 393 return -EINVAL; 394 395 va_start(arg_list, num_args); 396 397 /* Check if feature is supported or not */ 398 ret = zynqmp_pm_feature(pm_api_id); 399 if (ret < 0) 400 return ret; 401 402 for (i = 0; i < num_args; i++) 403 args[i] = va_arg(arg_list, u32); 404 405 va_end(arg_list); 406 407 module_id = FIELD_GET(PLM_MODULE_ID_MASK, pm_api_id); 408 409 if (module_id == 0) 410 module_id = XPM_MODULE_ID; 411 412 smc_arg[0] = PM_SIP_SVC | PASS_THROUGH_FW_CMD_ID; 413 smc_arg[1] = ((u64)args[0] << 32U) | FIELD_PREP(PLM_MODULE_ID_MASK, module_id) | 414 (pm_api_id & API_ID_MASK); 415 for (i = 1; i < (SMC_ARG_CNT_64 - 1); i++) 416 smc_arg[i + 1] = ((u64)args[(i * 2)] << 32U) | args[(i * 2) - 1]; 417 418 return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3], 419 smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]); 420 } 421 422 /** 423 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer 424 * caller function depending on the configuration 425 * @pm_api_id: Requested PM-API call 426 * @ret_payload: Returned value array 427 * @num_args: Number of arguments to requested PM-API call 428 * 429 * Invoke platform management function for SMC or HVC call, depending on 430 * configuration. 431 * Following SMC Calling Convention (SMCCC) for SMC64: 432 * Pm Function Identifier, 433 * PM_SIP_SVC + PM_API_ID = 434 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 435 * ((SMC_64) << FUNCID_CC_SHIFT) 436 * ((SIP_START) << FUNCID_OEN_SHIFT) 437 * ((PM_API_ID) & FUNCID_NUM_MASK)) 438 * 439 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 440 * PM_API_ID - Platform Management API ID. 441 * 442 * Return: Returns status, either success or error+reason 443 */ 444 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...) 445 { 446 /* 447 * Added SIP service call Function Identifier 448 * Make sure to stay in x0 register 449 */ 450 u64 smc_arg[8]; 451 int ret, i; 452 va_list arg_list; 453 u32 args[14] = {0}; 454 455 if (num_args > 14) 456 return -EINVAL; 457 458 va_start(arg_list, num_args); 459 460 /* Check if feature is supported or not */ 461 ret = zynqmp_pm_feature(pm_api_id); 462 if (ret < 0) 463 return ret; 464 465 for (i = 0; i < num_args; i++) 466 args[i] = va_arg(arg_list, u32); 467 468 va_end(arg_list); 469 470 smc_arg[0] = PM_SIP_SVC | pm_api_id; 471 for (i = 0; i < 7; i++) 472 smc_arg[i + 1] = ((u64)args[(i * 2) + 1] << 32) | args[i * 2]; 473 474 return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3], 475 smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]); 476 } 477 478 static u32 pm_api_version; 479 static u32 pm_tz_version; 480 481 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset) 482 { 483 int ret; 484 485 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, NULL, 2, sgi_num, reset); 486 if (ret != -EOPNOTSUPP && !ret) 487 return ret; 488 489 /* try old implementation as fallback strategy if above fails */ 490 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, IOCTL_REGISTER_SGI, sgi_num, reset); 491 } 492 493 /** 494 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware 495 * @version: Returned version value 496 * 497 * Return: Returns status, either success or error+reason 498 */ 499 int zynqmp_pm_get_api_version(u32 *version) 500 { 501 u32 ret_payload[PAYLOAD_ARG_CNT]; 502 int ret; 503 504 if (!version) 505 return -EINVAL; 506 507 /* Check is PM API version already verified */ 508 if (pm_api_version > 0) { 509 *version = pm_api_version; 510 return 0; 511 } 512 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, ret_payload, 0); 513 *version = ret_payload[1]; 514 515 return ret; 516 } 517 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); 518 519 /** 520 * zynqmp_pm_get_chipid - Get silicon ID registers 521 * @idcode: IDCODE register 522 * @version: version register 523 * 524 * Return: Returns the status of the operation and the idcode and version 525 * registers in @idcode and @version. 526 */ 527 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) 528 { 529 u32 ret_payload[PAYLOAD_ARG_CNT]; 530 int ret; 531 532 if (!idcode || !version) 533 return -EINVAL; 534 535 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0); 536 *idcode = ret_payload[1]; 537 *version = ret_payload[2]; 538 539 return ret; 540 } 541 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); 542 543 /** 544 * zynqmp_pm_get_family_info() - Get family info of platform 545 * @family: Returned family code value 546 * 547 * Return: Returns status, either success or error+reason 548 */ 549 int zynqmp_pm_get_family_info(u32 *family) 550 { 551 if (!active_platform_fw_data) 552 return -ENODEV; 553 554 if (!family) 555 return -EINVAL; 556 557 *family = active_platform_fw_data->family_code; 558 559 return 0; 560 } 561 EXPORT_SYMBOL_GPL(zynqmp_pm_get_family_info); 562 563 /** 564 * zynqmp_pm_get_sip_svc_version() - Get SiP service call version 565 * @version: Returned version value 566 * 567 * Return: Returns status, either success or error+reason 568 */ 569 static int zynqmp_pm_get_sip_svc_version(u32 *version) 570 { 571 struct arm_smccc_res res; 572 u64 args[SMC_ARG_CNT_64] = {0}; 573 574 if (!version) 575 return -EINVAL; 576 577 /* Check if SiP SVC version already verified */ 578 if (sip_svc_version > 0) { 579 *version = sip_svc_version; 580 return 0; 581 } 582 583 args[0] = GET_SIP_SVC_VERSION; 584 585 arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res); 586 587 *version = ((lower_32_bits(res.a0) << 16U) | lower_32_bits(res.a1)); 588 589 return zynqmp_pm_ret_code(XST_PM_SUCCESS); 590 } 591 592 /** 593 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version 594 * @version: Returned version value 595 * 596 * Return: Returns status, either success or error+reason 597 */ 598 static int zynqmp_pm_get_trustzone_version(u32 *version) 599 { 600 u32 ret_payload[PAYLOAD_ARG_CNT]; 601 int ret; 602 603 if (!version) 604 return -EINVAL; 605 606 /* Check is PM trustzone version already verified */ 607 if (pm_tz_version > 0) { 608 *version = pm_tz_version; 609 return 0; 610 } 611 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, ret_payload, 0); 612 *version = ret_payload[1]; 613 614 return ret; 615 } 616 617 /** 618 * get_set_conduit_method() - Choose SMC or HVC based communication 619 * @np: Pointer to the device_node structure 620 * 621 * Use SMC or HVC-based functions to communicate with EL2/EL3. 622 * 623 * Return: Returns 0 on success or error code 624 */ 625 static int get_set_conduit_method(struct device_node *np) 626 { 627 const char *method; 628 629 if (of_property_read_string(np, "method", &method)) { 630 pr_warn("%s missing \"method\" property\n", __func__); 631 return -ENXIO; 632 } 633 634 if (!strcmp("hvc", method)) { 635 do_fw_call = do_fw_call_hvc; 636 } else if (!strcmp("smc", method)) { 637 do_fw_call = do_fw_call_smc; 638 } else { 639 pr_warn("%s Invalid \"method\" property: %s\n", 640 __func__, method); 641 return -EINVAL; 642 } 643 644 return 0; 645 } 646 647 /** 648 * zynqmp_pm_query_data() - Get query data from firmware 649 * @qdata: Variable to the zynqmp_pm_query_data structure 650 * @out: Returned output value 651 * 652 * Return: Returns status, either success or error+reason 653 */ 654 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) 655 { 656 int ret, i = 0; 657 u32 ret_payload[PAYLOAD_ARG_CNT] = {0}; 658 659 if (sip_svc_version >= SIP_SVC_PASSTHROUGH_VERSION) { 660 ret = zynqmp_pm_invoke_fw_fn(PM_QUERY_DATA, ret_payload, 4, 661 qdata.qid, qdata.arg1, 662 qdata.arg2, qdata.arg3); 663 /* To support backward compatibility */ 664 if (!ret && !ret_payload[0]) { 665 /* 666 * TF-A passes return status on 0th index but 667 * api to get clock name reads data from 0th 668 * index so pass data at 0th index instead of 669 * return status 670 */ 671 if (qdata.qid == PM_QID_CLOCK_GET_NAME || 672 qdata.qid == PM_QID_PINCTRL_GET_FUNCTION_NAME) 673 i = 1; 674 675 for (; i < PAYLOAD_ARG_CNT; i++, out++) 676 *out = ret_payload[i]; 677 678 return ret; 679 } 680 } 681 682 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid, 683 qdata.arg1, qdata.arg2, qdata.arg3); 684 685 /* 686 * For clock name query, all bytes in SMC response are clock name 687 * characters and return code is always success. For invalid clocks, 688 * clock name bytes would be zeros. 689 */ 690 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; 691 } 692 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); 693 694 /** 695 * zynqmp_pm_clock_enable() - Enable the clock for given id 696 * @clock_id: ID of the clock to be enabled 697 * 698 * This function is used by master to enable the clock 699 * including peripherals and PLL clocks. 700 * 701 * Return: Returns status, either success or error+reason 702 */ 703 int zynqmp_pm_clock_enable(u32 clock_id) 704 { 705 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, NULL, 1, clock_id); 706 } 707 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); 708 709 /** 710 * zynqmp_pm_clock_disable() - Disable the clock for given id 711 * @clock_id: ID of the clock to be disable 712 * 713 * This function is used by master to disable the clock 714 * including peripherals and PLL clocks. 715 * 716 * Return: Returns status, either success or error+reason 717 */ 718 int zynqmp_pm_clock_disable(u32 clock_id) 719 { 720 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, NULL, 1, clock_id); 721 } 722 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); 723 724 /** 725 * zynqmp_pm_clock_getstate() - Get the clock state for given id 726 * @clock_id: ID of the clock to be queried 727 * @state: 1/0 (Enabled/Disabled) 728 * 729 * This function is used by master to get the state of clock 730 * including peripherals and PLL clocks. 731 * 732 * Return: Returns status, either success or error+reason 733 */ 734 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) 735 { 736 u32 ret_payload[PAYLOAD_ARG_CNT]; 737 int ret; 738 739 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, ret_payload, 1, clock_id); 740 *state = ret_payload[1]; 741 742 return ret; 743 } 744 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); 745 746 /** 747 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id 748 * @clock_id: ID of the clock 749 * @divider: divider value 750 * 751 * This function is used by master to set divider for any clock 752 * to achieve desired rate. 753 * 754 * Return: Returns status, either success or error+reason 755 */ 756 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) 757 { 758 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, NULL, 2, clock_id, divider); 759 } 760 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); 761 762 /** 763 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id 764 * @clock_id: ID of the clock 765 * @divider: divider value 766 * 767 * This function is used by master to get divider values 768 * for any clock. 769 * 770 * Return: Returns status, either success or error+reason 771 */ 772 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) 773 { 774 u32 ret_payload[PAYLOAD_ARG_CNT]; 775 int ret; 776 777 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, ret_payload, 1, clock_id); 778 *divider = ret_payload[1]; 779 780 return ret; 781 } 782 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); 783 784 /** 785 * zynqmp_pm_clock_setparent() - Set the clock parent for given id 786 * @clock_id: ID of the clock 787 * @parent_id: parent id 788 * 789 * This function is used by master to set parent for any clock. 790 * 791 * Return: Returns status, either success or error+reason 792 */ 793 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) 794 { 795 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, NULL, 2, clock_id, parent_id); 796 } 797 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); 798 799 /** 800 * zynqmp_pm_clock_getparent() - Get the clock parent for given id 801 * @clock_id: ID of the clock 802 * @parent_id: parent id 803 * 804 * This function is used by master to get parent index 805 * for any clock. 806 * 807 * Return: Returns status, either success or error+reason 808 */ 809 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) 810 { 811 u32 ret_payload[PAYLOAD_ARG_CNT]; 812 int ret; 813 814 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, ret_payload, 1, clock_id); 815 *parent_id = ret_payload[1]; 816 817 return ret; 818 } 819 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); 820 821 /** 822 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode 823 * 824 * @clk_id: PLL clock ID 825 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) 826 * 827 * This function sets PLL mode 828 * 829 * Return: Returns status, either success or error+reason 830 */ 831 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) 832 { 833 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_MODE, clk_id, mode); 834 } 835 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); 836 837 /** 838 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode 839 * 840 * @clk_id: PLL clock ID 841 * @mode: PLL mode 842 * 843 * This function return current PLL mode 844 * 845 * Return: Returns status, either success or error+reason 846 */ 847 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) 848 { 849 return zynqmp_pm_invoke_fn(PM_IOCTL, mode, 3, 0, IOCTL_GET_PLL_FRAC_MODE, clk_id); 850 } 851 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); 852 853 /** 854 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data 855 * 856 * @clk_id: PLL clock ID 857 * @data: fraction data 858 * 859 * This function sets fraction data. 860 * It is valid for fraction mode only. 861 * 862 * Return: Returns status, either success or error+reason 863 */ 864 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) 865 { 866 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_DATA, clk_id, data); 867 } 868 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); 869 870 /** 871 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data 872 * 873 * @clk_id: PLL clock ID 874 * @data: fraction data 875 * 876 * This function returns fraction data value. 877 * 878 * Return: Returns status, either success or error+reason 879 */ 880 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) 881 { 882 return zynqmp_pm_invoke_fn(PM_IOCTL, data, 3, 0, IOCTL_GET_PLL_FRAC_DATA, clk_id); 883 } 884 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); 885 886 /** 887 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device 888 * 889 * @node_id: Node ID of the device 890 * @type: Type of tap delay to set (input/output) 891 * @value: Value to set fot the tap delay 892 * 893 * This function sets input/output tap delay for the SD device. 894 * 895 * Return: Returns status, either success or error+reason 896 */ 897 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) 898 { 899 u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL; 900 u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16); 901 902 if (value) { 903 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_SET_SD_TAPDELAY, type, 904 value); 905 } 906 907 /* 908 * Work around completely misdesigned firmware API on Xilinx ZynqMP. 909 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only 910 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA 911 * bits, but there is no matching call to clear those bits. If those 912 * bits are not cleared, SDMMC tuning may fail. 913 * 914 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to 915 * allow complete unrestricted access to all address space, including 916 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access 917 * to which was supposed to be protected by the current firmware API. 918 * 919 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter 920 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits. 921 */ 922 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 2, reg, mask); 923 } 924 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); 925 926 /** 927 * zynqmp_pm_sd_dll_reset() - Reset DLL logic 928 * 929 * @node_id: Node ID of the device 930 * @type: Reset type 931 * 932 * This function resets DLL logic for the SD device. 933 * 934 * Return: Returns status, either success or error+reason 935 */ 936 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) 937 { 938 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SD_DLL_RESET, type); 939 } 940 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); 941 942 /** 943 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection 944 * 945 * @dev_id: Device Id of the OSPI device. 946 * @select: OSPI Mux select value. 947 * 948 * This function select the OSPI Mux. 949 * 950 * Return: Returns status, either success or error+reason 951 */ 952 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select) 953 { 954 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, dev_id, IOCTL_OSPI_MUX_SELECT, select); 955 } 956 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); 957 958 /** 959 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) 960 * @index: GGS register index 961 * @value: Register value to be written 962 * 963 * This function writes value to GGS register. 964 * 965 * Return: Returns status, either success or error+reason 966 */ 967 int zynqmp_pm_write_ggs(u32 index, u32 value) 968 { 969 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_GGS, index, value); 970 } 971 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); 972 973 /** 974 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs) 975 * @index: GGS register index 976 * @value: Register value to be written 977 * 978 * This function returns GGS register value. 979 * 980 * Return: Returns status, either success or error+reason 981 */ 982 int zynqmp_pm_read_ggs(u32 index, u32 *value) 983 { 984 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_GGS, index); 985 } 986 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); 987 988 /** 989 * zynqmp_pm_write_pggs() - PM API for writing persistent global general 990 * storage (pggs) 991 * @index: PGGS register index 992 * @value: Register value to be written 993 * 994 * This function writes value to PGGS register. 995 * 996 * Return: Returns status, either success or error+reason 997 */ 998 int zynqmp_pm_write_pggs(u32 index, u32 value) 999 { 1000 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_PGGS, index, value); 1001 } 1002 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); 1003 1004 /** 1005 * zynqmp_pm_read_pggs() - PM API for reading persistent global general 1006 * storage (pggs) 1007 * @index: PGGS register index 1008 * @value: Register value to be written 1009 * 1010 * This function returns PGGS register value. 1011 * 1012 * Return: Returns status, either success or error+reason 1013 */ 1014 int zynqmp_pm_read_pggs(u32 index, u32 *value) 1015 { 1016 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_PGGS, index); 1017 } 1018 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); 1019 1020 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value) 1021 { 1022 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_TAPDELAY_BYPASS, index, value); 1023 } 1024 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); 1025 1026 /** 1027 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status 1028 * @value: Status value to be written 1029 * 1030 * This function sets healthy bit value to indicate boot health status 1031 * to firmware. 1032 * 1033 * Return: Returns status, either success or error+reason 1034 */ 1035 int zynqmp_pm_set_boot_health_status(u32 value) 1036 { 1037 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, 0, IOCTL_SET_BOOT_HEALTH_STATUS, value); 1038 } 1039 1040 /** 1041 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) 1042 * @reset: Reset to be configured 1043 * @assert_flag: Flag stating should reset be asserted (1) or 1044 * released (0) 1045 * 1046 * Return: Returns status, either success or error+reason 1047 */ 1048 int zynqmp_pm_reset_assert(const u32 reset, 1049 const enum zynqmp_pm_reset_action assert_flag) 1050 { 1051 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, NULL, 2, reset, assert_flag); 1052 } 1053 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); 1054 1055 /** 1056 * zynqmp_pm_reset_get_status - Get status of the reset 1057 * @reset: Reset whose status should be returned 1058 * @status: Returned status 1059 * 1060 * Return: Returns status, either success or error+reason 1061 */ 1062 int zynqmp_pm_reset_get_status(const u32 reset, u32 *status) 1063 { 1064 u32 ret_payload[PAYLOAD_ARG_CNT]; 1065 int ret; 1066 1067 if (!status) 1068 return -EINVAL; 1069 1070 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, ret_payload, 1, reset); 1071 *status = ret_payload[1]; 1072 1073 return ret; 1074 } 1075 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); 1076 1077 /** 1078 * zynqmp_pm_fpga_load - Perform the fpga load 1079 * @address: Address to write to 1080 * @size: pl bitstream size 1081 * @flags: Bitstream type 1082 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration 1083 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration 1084 * 1085 * This function provides access to pmufw. To transfer 1086 * the required bitstream into PL. 1087 * 1088 * Return: Returns status, either success or error+reason 1089 */ 1090 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) 1091 { 1092 u32 ret_payload[PAYLOAD_ARG_CNT]; 1093 int ret; 1094 1095 ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, ret_payload, 4, lower_32_bits(address), 1096 upper_32_bits(address), size, flags); 1097 if (ret_payload[0]) 1098 return -ret_payload[0]; 1099 1100 return ret; 1101 } 1102 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); 1103 1104 /** 1105 * zynqmp_pm_fpga_get_status - Read value from PCAP status register 1106 * @value: Value to read 1107 * 1108 * This function provides access to the pmufw to get the PCAP 1109 * status 1110 * 1111 * Return: Returns status, either success or error+reason 1112 */ 1113 int zynqmp_pm_fpga_get_status(u32 *value) 1114 { 1115 u32 ret_payload[PAYLOAD_ARG_CNT]; 1116 int ret; 1117 1118 if (!value) 1119 return -EINVAL; 1120 1121 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, ret_payload, 0); 1122 *value = ret_payload[1]; 1123 1124 return ret; 1125 } 1126 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); 1127 1128 /** 1129 * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status. 1130 * @value: Buffer to store FPGA configuration status. 1131 * 1132 * This function provides access to the pmufw to get the FPGA configuration 1133 * status 1134 * 1135 * Return: 0 on success, a negative value on error 1136 */ 1137 int zynqmp_pm_fpga_get_config_status(u32 *value) 1138 { 1139 u32 ret_payload[PAYLOAD_ARG_CNT]; 1140 int ret; 1141 1142 if (!value) 1143 return -EINVAL; 1144 1145 ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4, 1146 XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, 0, 0, 1147 XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG); 1148 1149 *value = ret_payload[1]; 1150 1151 return ret; 1152 } 1153 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status); 1154 1155 /** 1156 * zynqmp_pm_pinctrl_request - Request Pin from firmware 1157 * @pin: Pin number to request 1158 * 1159 * This function requests pin from firmware. 1160 * 1161 * Return: Returns status, either success or error+reason. 1162 */ 1163 int zynqmp_pm_pinctrl_request(const u32 pin) 1164 { 1165 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, NULL, 1, pin); 1166 } 1167 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); 1168 1169 /** 1170 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released 1171 * @pin: Pin number to release 1172 * 1173 * This function release pin from firmware. 1174 * 1175 * Return: Returns status, either success or error+reason. 1176 */ 1177 int zynqmp_pm_pinctrl_release(const u32 pin) 1178 { 1179 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, NULL, 1, pin); 1180 } 1181 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release); 1182 1183 /** 1184 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin 1185 * @pin: Pin number 1186 * @id: Function ID to set 1187 * 1188 * This function sets requested function for the given pin. 1189 * 1190 * Return: Returns status, either success or error+reason. 1191 */ 1192 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) 1193 { 1194 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, NULL, 2, pin, id); 1195 } 1196 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function); 1197 1198 /** 1199 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin 1200 * @pin: Pin number 1201 * @param: Parameter to get 1202 * @value: Buffer to store parameter value 1203 * 1204 * This function gets requested configuration parameter for the given pin. 1205 * 1206 * Return: Returns status, either success or error+reason. 1207 */ 1208 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, 1209 u32 *value) 1210 { 1211 u32 ret_payload[PAYLOAD_ARG_CNT]; 1212 int ret; 1213 1214 if (!value) 1215 return -EINVAL; 1216 1217 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, ret_payload, 2, pin, param); 1218 *value = ret_payload[1]; 1219 1220 return ret; 1221 } 1222 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config); 1223 1224 /** 1225 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin 1226 * @pin: Pin number 1227 * @param: Parameter to set 1228 * @value: Parameter value to set 1229 * 1230 * This function sets requested configuration parameter for the given pin. 1231 * 1232 * Return: Returns status, either success or error+reason. 1233 */ 1234 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, 1235 u32 value) 1236 { 1237 int ret; 1238 u32 pm_family_code; 1239 1240 ret = zynqmp_pm_get_family_info(&pm_family_code); 1241 if (ret) 1242 return ret; 1243 1244 if (pm_family_code == PM_ZYNQMP_FAMILY_CODE && 1245 param == PM_PINCTRL_CONFIG_TRI_STATE) { 1246 ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET); 1247 if (ret < PM_PINCTRL_PARAM_SET_VERSION) { 1248 pr_warn("The requested pinctrl feature is not supported in the current firmware.\n" 1249 "Expected firmware version is 2023.1 and above for this feature to work.\r\n"); 1250 return -EOPNOTSUPP; 1251 } 1252 } 1253 1254 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, NULL, 3, pin, param, value); 1255 } 1256 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config); 1257 1258 /** 1259 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status 1260 * @ps_mode: Returned output value of ps_mode 1261 * 1262 * This API function is to be used for notify the power management controller 1263 * to read bootpin status. 1264 * 1265 * Return: status, either success or error+reason 1266 */ 1267 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode) 1268 { 1269 unsigned int ret; 1270 u32 ret_payload[PAYLOAD_ARG_CNT]; 1271 1272 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, ret_payload, 1, CRL_APB_BOOT_PIN_CTRL); 1273 1274 *ps_mode = ret_payload[1]; 1275 1276 return ret; 1277 } 1278 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read); 1279 1280 /** 1281 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin 1282 * @ps_mode: Value to be written to the bootpin ctrl register 1283 * 1284 * This API function is to be used for notify the power management controller 1285 * to configure bootpin. 1286 * 1287 * Return: Returns status, either success or error+reason 1288 */ 1289 int zynqmp_pm_bootmode_write(u32 ps_mode) 1290 { 1291 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 3, CRL_APB_BOOT_PIN_CTRL, 1292 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode); 1293 } 1294 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); 1295 1296 /** 1297 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller 1298 * master has initialized its own power management 1299 * 1300 * Return: Returns status, either success or error+reason 1301 * 1302 * This API function is to be used for notify the power management controller 1303 * about the completed power management initialization. 1304 */ 1305 static int zynqmp_pm_init_finalize(void) 1306 { 1307 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, NULL, 0); 1308 } 1309 1310 /** 1311 * zynqmp_pm_set_suspend_mode() - Set system suspend mode 1312 * @mode: Mode to set for system suspend 1313 * 1314 * This API function is used to set mode of system suspend. 1315 * 1316 * Return: Returns status, either success or error+reason 1317 */ 1318 int zynqmp_pm_set_suspend_mode(u32 mode) 1319 { 1320 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, NULL, 1, mode); 1321 } 1322 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); 1323 1324 /** 1325 * zynqmp_pm_request_node() - Request a node with specific capabilities 1326 * @node: Node ID of the slave 1327 * @capabilities: Requested capabilities of the slave 1328 * @qos: Quality of service (not supported) 1329 * @ack: Flag to specify whether acknowledge is requested 1330 * 1331 * This function is used by master to request particular node from firmware. 1332 * Every master must request node before using it. 1333 * 1334 * Return: Returns status, either success or error+reason 1335 */ 1336 int zynqmp_pm_request_node(const u32 node, const u32 capabilities, 1337 const u32 qos, const enum zynqmp_pm_request_ack ack) 1338 { 1339 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, NULL, 4, node, capabilities, qos, ack); 1340 } 1341 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); 1342 1343 /** 1344 * zynqmp_pm_release_node() - Release a node 1345 * @node: Node ID of the slave 1346 * 1347 * This function is used by master to inform firmware that master 1348 * has released node. Once released, master must not use that node 1349 * without re-request. 1350 * 1351 * Return: Returns status, either success or error+reason 1352 */ 1353 int zynqmp_pm_release_node(const u32 node) 1354 { 1355 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, NULL, 1, node); 1356 } 1357 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); 1358 1359 /** 1360 * zynqmp_pm_get_rpu_mode() - Get RPU mode 1361 * @node_id: Node ID of the device 1362 * @rpu_mode: return by reference value 1363 * either split or lockstep 1364 * 1365 * Return: return 0 on success or error+reason. 1366 * if success, then rpu_mode will be set 1367 * to current rpu mode. 1368 */ 1369 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode) 1370 { 1371 u32 ret_payload[PAYLOAD_ARG_CNT]; 1372 int ret; 1373 1374 ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_GET_RPU_OPER_MODE); 1375 1376 /* only set rpu_mode if no error */ 1377 if (ret == XST_PM_SUCCESS) 1378 *rpu_mode = ret_payload[0]; 1379 1380 return ret; 1381 } 1382 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode); 1383 1384 /** 1385 * zynqmp_pm_set_rpu_mode() - Set RPU mode 1386 * @node_id: Node ID of the device 1387 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep 1388 * 1389 * This function is used to set RPU mode to split or 1390 * lockstep 1391 * 1392 * Return: Returns status, either success or error+reason 1393 */ 1394 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode) 1395 { 1396 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SET_RPU_OPER_MODE, 1397 (u32)rpu_mode); 1398 } 1399 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode); 1400 1401 /** 1402 * zynqmp_pm_set_tcm_config - configure TCM 1403 * @node_id: Firmware specific TCM subsystem ID 1404 * @tcm_mode: Argument 1 to requested IOCTL call 1405 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT 1406 * 1407 * This function is used to set RPU mode to split or combined 1408 * 1409 * Return: status: 0 for success, else failure 1410 */ 1411 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode) 1412 { 1413 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_TCM_COMB_CONFIG, 1414 (u32)tcm_mode); 1415 } 1416 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config); 1417 1418 /** 1419 * zynqmp_pm_get_node_status - PM call to request a node's current power state 1420 * @node: ID of the component or sub-system in question 1421 * @status: Current operating state of the requested node 1422 * @requirements: Current requirements asserted on the node, 1423 * used for slave nodes only. 1424 * @usage: Usage information, used for slave nodes only: 1425 * PM_USAGE_NO_MASTER - No master is currently using 1426 * the node 1427 * PM_USAGE_CURRENT_MASTER - Only requesting master is 1428 * currently using the node 1429 * PM_USAGE_OTHER_MASTER - Only other masters are 1430 * currently using the node 1431 * PM_USAGE_BOTH_MASTERS - Both the current and at least 1432 * one other master is currently 1433 * using the node 1434 * 1435 * Return: Returns status, either success or error+reason 1436 */ 1437 int zynqmp_pm_get_node_status(const u32 node, u32 *const status, 1438 u32 *const requirements, u32 *const usage) 1439 { 1440 u32 ret_payload[PAYLOAD_ARG_CNT]; 1441 int ret; 1442 1443 if (!status || !requirements || !usage) 1444 return -EINVAL; 1445 1446 ret = zynqmp_pm_invoke_fn(PM_GET_NODE_STATUS, ret_payload, 1, node); 1447 if (ret_payload[0] == XST_PM_SUCCESS) { 1448 *status = ret_payload[1]; 1449 *requirements = ret_payload[2]; 1450 *usage = ret_payload[3]; 1451 } 1452 1453 return ret; 1454 } 1455 EXPORT_SYMBOL_GPL(zynqmp_pm_get_node_status); 1456 1457 /** 1458 * zynqmp_pm_get_rpu_node_status - PM call to request a RPU node's current power state 1459 * @node: ID of the RPU component or sub-system in question 1460 * @status: Current operating state of the requested RPU node. 1461 * @requirements: Current requirements asserted on the RPU node. 1462 * @usage: Usage information, used for RPU slave nodes only: 1463 * PM_USAGE_NO_MASTER - No master is currently using 1464 * the node 1465 * PM_USAGE_CURRENT_MASTER - Only requesting master is 1466 * currently using the node 1467 * PM_USAGE_OTHER_MASTER - Only other masters are 1468 * currently using the node 1469 * PM_USAGE_BOTH_MASTERS - Both the current and at least 1470 * one other master is currently 1471 * using the node 1472 * 1473 * Return: Returns status, either success or error+reason 1474 */ 1475 int zynqmp_pm_get_rpu_node_status(const u32 node, u32 *const status, 1476 u32 *const requirements, u32 *const usage) 1477 { 1478 if (zynqmp_pm_feature(PM_GET_NODE_STATUS) < PM_API_VERSION_2) 1479 return -EOPNOTSUPP; 1480 1481 return zynqmp_pm_get_node_status(node, status, requirements, usage); 1482 } 1483 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_node_status); 1484 1485 /** 1486 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to 1487 * be powered down forcefully 1488 * @node: Node ID of the targeted PU or subsystem 1489 * @ack: Flag to specify whether acknowledge is requested 1490 * 1491 * Return: status, either success or error+reason 1492 */ 1493 int zynqmp_pm_force_pwrdwn(const u32 node, 1494 const enum zynqmp_pm_request_ack ack) 1495 { 1496 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, NULL, 2, node, ack); 1497 } 1498 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn); 1499 1500 /** 1501 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem 1502 * @node: Node ID of the master or subsystem 1503 * @set_addr: Specifies whether the address argument is relevant 1504 * @address: Address from which to resume when woken up 1505 * @ack: Flag to specify whether acknowledge requested 1506 * 1507 * Return: status, either success or error+reason 1508 */ 1509 int zynqmp_pm_request_wake(const u32 node, 1510 const bool set_addr, 1511 const u64 address, 1512 const enum zynqmp_pm_request_ack ack) 1513 { 1514 /* set_addr flag is encoded into 1st bit of address */ 1515 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, NULL, 4, node, address | set_addr, 1516 address >> 32, ack); 1517 } 1518 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake); 1519 1520 /** 1521 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves 1522 * @node: Node ID of the slave 1523 * @capabilities: Requested capabilities of the slave 1524 * @qos: Quality of service (not supported) 1525 * @ack: Flag to specify whether acknowledge is requested 1526 * 1527 * This API function is to be used for slaves a PU already has requested 1528 * to change its capabilities. 1529 * 1530 * Return: Returns status, either success or error+reason 1531 */ 1532 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 1533 const u32 qos, 1534 const enum zynqmp_pm_request_ack ack) 1535 { 1536 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, NULL, 4, node, capabilities, qos, ack); 1537 } 1538 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); 1539 1540 /** 1541 * zynqmp_pm_load_pdi - Load and process PDI 1542 * @src: Source device where PDI is located 1543 * @address: PDI src address 1544 * 1545 * This function provides support to load PDI from linux 1546 * 1547 * Return: Returns status, either success or error+reason 1548 */ 1549 int zynqmp_pm_load_pdi(const u32 src, const u64 address) 1550 { 1551 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, NULL, 3, src, lower_32_bits(address), 1552 upper_32_bits(address)); 1553 } 1554 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); 1555 1556 /** 1557 * zynqmp_pm_efuse_access - Provides access to efuse memory. 1558 * @address: Address of the efuse params structure 1559 * @out: Returned output value 1560 * 1561 * Return: Returns status, either success or error code. 1562 */ 1563 int zynqmp_pm_efuse_access(const u64 address, u32 *out) 1564 { 1565 u32 ret_payload[PAYLOAD_ARG_CNT]; 1566 int ret; 1567 1568 if (!out) 1569 return -EINVAL; 1570 1571 ret = zynqmp_pm_invoke_fn(PM_EFUSE_ACCESS, ret_payload, 2, 1572 upper_32_bits(address), 1573 lower_32_bits(address)); 1574 *out = ret_payload[1]; 1575 1576 return ret; 1577 } 1578 EXPORT_SYMBOL_GPL(zynqmp_pm_efuse_access); 1579 1580 /** 1581 * zynqmp_pm_register_notifier() - PM API for register a subsystem 1582 * to be notified about specific 1583 * event/error. 1584 * @node: Node ID to which the event is related. 1585 * @event: Event Mask of Error events for which wants to get notified. 1586 * @wake: Wake subsystem upon capturing the event if value 1 1587 * @enable: Enable the registration for value 1, disable for value 0 1588 * 1589 * This function is used to register/un-register for particular node-event 1590 * combination in firmware. 1591 * 1592 * Return: Returns status, either success or error+reason 1593 */ 1594 1595 int zynqmp_pm_register_notifier(const u32 node, const u32 event, 1596 const u32 wake, const u32 enable) 1597 { 1598 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, NULL, 4, node, event, wake, enable); 1599 } 1600 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier); 1601 1602 /** 1603 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart 1604 * @type: Shutdown or restart? 0 for shutdown, 1 for restart 1605 * @subtype: Specifies which system should be restarted or shut down 1606 * 1607 * Return: Returns status, either success or error+reason 1608 */ 1609 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 1610 { 1611 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, NULL, 2, type, subtype); 1612 } 1613 1614 /** 1615 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config 1616 * @id: The config ID of the feature to be configured 1617 * @value: The config value of the feature to be configured 1618 * 1619 * Return: Returns 0 on success or error value on failure. 1620 */ 1621 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value) 1622 { 1623 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_FEATURE_CONFIG, id, value); 1624 } 1625 1626 /** 1627 * zynqmp_pm_get_feature_config - PM call to get value of configured feature 1628 * @id: The config id of the feature to be queried 1629 * @payload: Returned value array 1630 * 1631 * Return: Returns 0 on success or error value on failure. 1632 */ 1633 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, 1634 u32 *payload) 1635 { 1636 return zynqmp_pm_invoke_fn(PM_IOCTL, payload, 3, 0, IOCTL_GET_FEATURE_CONFIG, id); 1637 } 1638 1639 /** 1640 * zynqmp_pm_sec_read_reg - PM call to securely read from given offset 1641 * of the node 1642 * @node_id: Node Id of the device 1643 * @offset: Offset to be used (20-bit) 1644 * @ret_value: Output data read from the given offset after 1645 * firmware access policy is successfully enforced 1646 * 1647 * Return: Returns 0 on success or error value on failure 1648 */ 1649 int zynqmp_pm_sec_read_reg(u32 node_id, u32 offset, u32 *ret_value) 1650 { 1651 u32 ret_payload[PAYLOAD_ARG_CNT]; 1652 u32 count = 1; 1653 int ret; 1654 1655 if (!ret_value) 1656 return -EINVAL; 1657 1658 ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 4, node_id, IOCTL_READ_REG, 1659 offset, count); 1660 1661 *ret_value = ret_payload[1]; 1662 1663 return ret; 1664 } 1665 EXPORT_SYMBOL_GPL(zynqmp_pm_sec_read_reg); 1666 1667 /** 1668 * zynqmp_pm_sec_mask_write_reg - PM call to securely write to given offset 1669 * of the node 1670 * @node_id: Node Id of the device 1671 * @offset: Offset to be used (20-bit) 1672 * @mask: Mask to be used 1673 * @value: Value to be written 1674 * 1675 * Return: Returns 0 on success or error value on failure 1676 */ 1677 int zynqmp_pm_sec_mask_write_reg(const u32 node_id, const u32 offset, u32 mask, 1678 u32 value) 1679 { 1680 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 5, node_id, IOCTL_MASK_WRITE_REG, 1681 offset, mask, value); 1682 } 1683 EXPORT_SYMBOL_GPL(zynqmp_pm_sec_mask_write_reg); 1684 1685 /** 1686 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers 1687 * @node: SD node ID 1688 * @config: The config type of SD registers 1689 * @value: Value to be set 1690 * 1691 * Return: Returns 0 on success or error value on failure. 1692 */ 1693 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) 1694 { 1695 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_SD_CONFIG, config, value); 1696 } 1697 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config); 1698 1699 /** 1700 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers 1701 * @node: GEM node ID 1702 * @config: The config type of GEM registers 1703 * @value: Value to be set 1704 * 1705 * Return: Returns 0 on success or error value on failure. 1706 */ 1707 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, 1708 u32 value) 1709 { 1710 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_GEM_CONFIG, config, value); 1711 } 1712 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config); 1713 1714 /** 1715 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope 1716 * @subtype: Shutdown subtype 1717 * @name: Matching string for scope argument 1718 * 1719 * This struct encapsulates mapping between shutdown scope ID and string. 1720 */ 1721 struct zynqmp_pm_shutdown_scope { 1722 const enum zynqmp_pm_shutdown_subtype subtype; 1723 const char *name; 1724 }; 1725 1726 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { 1727 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { 1728 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, 1729 .name = "subsystem", 1730 }, 1731 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { 1732 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, 1733 .name = "ps_only", 1734 }, 1735 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { 1736 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, 1737 .name = "system", 1738 }, 1739 }; 1740 1741 static struct zynqmp_pm_shutdown_scope *selected_scope = 1742 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; 1743 1744 /** 1745 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid 1746 * @scope_string: Shutdown scope string 1747 * 1748 * Return: Return pointer to matching shutdown scope struct from 1749 * array of available options in system if string is valid, 1750 * otherwise returns NULL. 1751 */ 1752 static struct zynqmp_pm_shutdown_scope* 1753 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) 1754 { 1755 int count; 1756 1757 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) 1758 if (sysfs_streq(scope_string, shutdown_scopes[count].name)) 1759 return &shutdown_scopes[count]; 1760 1761 return NULL; 1762 } 1763 1764 static ssize_t shutdown_scope_show(struct device *device, 1765 struct device_attribute *attr, 1766 char *buf) 1767 { 1768 int i; 1769 1770 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { 1771 if (&shutdown_scopes[i] == selected_scope) { 1772 strcat(buf, "["); 1773 strcat(buf, shutdown_scopes[i].name); 1774 strcat(buf, "]"); 1775 } else { 1776 strcat(buf, shutdown_scopes[i].name); 1777 } 1778 strcat(buf, " "); 1779 } 1780 strcat(buf, "\n"); 1781 1782 return strlen(buf); 1783 } 1784 1785 static ssize_t shutdown_scope_store(struct device *device, 1786 struct device_attribute *attr, 1787 const char *buf, size_t count) 1788 { 1789 int ret; 1790 struct zynqmp_pm_shutdown_scope *scope; 1791 1792 scope = zynqmp_pm_is_shutdown_scope_valid(buf); 1793 if (!scope) 1794 return -EINVAL; 1795 1796 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, 1797 scope->subtype); 1798 if (ret) { 1799 pr_err("unable to set shutdown scope %s\n", buf); 1800 return ret; 1801 } 1802 1803 selected_scope = scope; 1804 1805 return count; 1806 } 1807 1808 static DEVICE_ATTR_RW(shutdown_scope); 1809 1810 static ssize_t health_status_store(struct device *device, 1811 struct device_attribute *attr, 1812 const char *buf, size_t count) 1813 { 1814 int ret; 1815 unsigned int value; 1816 1817 ret = kstrtouint(buf, 10, &value); 1818 if (ret) 1819 return ret; 1820 1821 ret = zynqmp_pm_set_boot_health_status(value); 1822 if (ret) { 1823 dev_err(device, "unable to set healthy bit value to %u\n", 1824 value); 1825 return ret; 1826 } 1827 1828 return count; 1829 } 1830 1831 static DEVICE_ATTR_WO(health_status); 1832 1833 static ssize_t ggs_show(struct device *device, 1834 struct device_attribute *attr, 1835 char *buf, 1836 u32 reg) 1837 { 1838 int ret; 1839 u32 ret_payload[PAYLOAD_ARG_CNT]; 1840 1841 ret = zynqmp_pm_read_ggs(reg, ret_payload); 1842 if (ret) 1843 return ret; 1844 1845 return sprintf(buf, "0x%x\n", ret_payload[1]); 1846 } 1847 1848 static ssize_t ggs_store(struct device *device, 1849 struct device_attribute *attr, 1850 const char *buf, size_t count, 1851 u32 reg) 1852 { 1853 long value; 1854 int ret; 1855 1856 if (reg >= GSS_NUM_REGS) 1857 return -EINVAL; 1858 1859 ret = kstrtol(buf, 16, &value); 1860 if (ret) { 1861 count = -EFAULT; 1862 goto err; 1863 } 1864 1865 ret = zynqmp_pm_write_ggs(reg, value); 1866 if (ret) 1867 count = -EFAULT; 1868 err: 1869 return count; 1870 } 1871 1872 /* GGS register show functions */ 1873 #define GGS0_SHOW(N) \ 1874 ssize_t ggs##N##_show(struct device *device, \ 1875 struct device_attribute *attr, \ 1876 char *buf) \ 1877 { \ 1878 return ggs_show(device, attr, buf, N); \ 1879 } 1880 1881 static GGS0_SHOW(0); 1882 static GGS0_SHOW(1); 1883 static GGS0_SHOW(2); 1884 static GGS0_SHOW(3); 1885 1886 /* GGS register store function */ 1887 #define GGS0_STORE(N) \ 1888 ssize_t ggs##N##_store(struct device *device, \ 1889 struct device_attribute *attr, \ 1890 const char *buf, \ 1891 size_t count) \ 1892 { \ 1893 return ggs_store(device, attr, buf, count, N); \ 1894 } 1895 1896 static GGS0_STORE(0); 1897 static GGS0_STORE(1); 1898 static GGS0_STORE(2); 1899 static GGS0_STORE(3); 1900 1901 static ssize_t pggs_show(struct device *device, 1902 struct device_attribute *attr, 1903 char *buf, 1904 u32 reg) 1905 { 1906 int ret; 1907 u32 ret_payload[PAYLOAD_ARG_CNT]; 1908 1909 ret = zynqmp_pm_read_pggs(reg, ret_payload); 1910 if (ret) 1911 return ret; 1912 1913 return sprintf(buf, "0x%x\n", ret_payload[1]); 1914 } 1915 1916 static ssize_t pggs_store(struct device *device, 1917 struct device_attribute *attr, 1918 const char *buf, size_t count, 1919 u32 reg) 1920 { 1921 long value; 1922 int ret; 1923 1924 if (reg >= GSS_NUM_REGS) 1925 return -EINVAL; 1926 1927 ret = kstrtol(buf, 16, &value); 1928 if (ret) { 1929 count = -EFAULT; 1930 goto err; 1931 } 1932 1933 ret = zynqmp_pm_write_pggs(reg, value); 1934 if (ret) 1935 count = -EFAULT; 1936 1937 err: 1938 return count; 1939 } 1940 1941 #define PGGS0_SHOW(N) \ 1942 ssize_t pggs##N##_show(struct device *device, \ 1943 struct device_attribute *attr, \ 1944 char *buf) \ 1945 { \ 1946 return pggs_show(device, attr, buf, N); \ 1947 } 1948 1949 #define PGGS0_STORE(N) \ 1950 ssize_t pggs##N##_store(struct device *device, \ 1951 struct device_attribute *attr, \ 1952 const char *buf, \ 1953 size_t count) \ 1954 { \ 1955 return pggs_store(device, attr, buf, count, N); \ 1956 } 1957 1958 /* PGGS register show functions */ 1959 static PGGS0_SHOW(0); 1960 static PGGS0_SHOW(1); 1961 static PGGS0_SHOW(2); 1962 static PGGS0_SHOW(3); 1963 1964 /* PGGS register store functions */ 1965 static PGGS0_STORE(0); 1966 static PGGS0_STORE(1); 1967 static PGGS0_STORE(2); 1968 static PGGS0_STORE(3); 1969 1970 /* GGS register attributes */ 1971 static DEVICE_ATTR_RW(ggs0); 1972 static DEVICE_ATTR_RW(ggs1); 1973 static DEVICE_ATTR_RW(ggs2); 1974 static DEVICE_ATTR_RW(ggs3); 1975 1976 /* PGGS register attributes */ 1977 static DEVICE_ATTR_RW(pggs0); 1978 static DEVICE_ATTR_RW(pggs1); 1979 static DEVICE_ATTR_RW(pggs2); 1980 static DEVICE_ATTR_RW(pggs3); 1981 1982 static ssize_t feature_config_id_show(struct device *device, 1983 struct device_attribute *attr, 1984 char *buf) 1985 { 1986 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1987 1988 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id); 1989 } 1990 1991 static ssize_t feature_config_id_store(struct device *device, 1992 struct device_attribute *attr, 1993 const char *buf, size_t count) 1994 { 1995 u32 config_id; 1996 int ret; 1997 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1998 1999 if (!buf) 2000 return -EINVAL; 2001 2002 ret = kstrtou32(buf, 10, &config_id); 2003 if (ret) 2004 return ret; 2005 2006 devinfo->feature_conf_id = config_id; 2007 2008 return count; 2009 } 2010 2011 static DEVICE_ATTR_RW(feature_config_id); 2012 2013 static ssize_t feature_config_value_show(struct device *device, 2014 struct device_attribute *attr, 2015 char *buf) 2016 { 2017 int ret; 2018 u32 ret_payload[PAYLOAD_ARG_CNT]; 2019 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 2020 2021 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id, 2022 ret_payload); 2023 if (ret) 2024 return ret; 2025 2026 return sysfs_emit(buf, "%d\n", ret_payload[1]); 2027 } 2028 2029 static ssize_t feature_config_value_store(struct device *device, 2030 struct device_attribute *attr, 2031 const char *buf, size_t count) 2032 { 2033 u32 value; 2034 int ret; 2035 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 2036 2037 if (!buf) 2038 return -EINVAL; 2039 2040 ret = kstrtou32(buf, 10, &value); 2041 if (ret) 2042 return ret; 2043 2044 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id, 2045 value); 2046 if (ret) 2047 return ret; 2048 2049 return count; 2050 } 2051 2052 static DEVICE_ATTR_RW(feature_config_value); 2053 2054 static struct attribute *zynqmp_firmware_attrs[] = { 2055 &dev_attr_ggs0.attr, 2056 &dev_attr_ggs1.attr, 2057 &dev_attr_ggs2.attr, 2058 &dev_attr_ggs3.attr, 2059 &dev_attr_pggs0.attr, 2060 &dev_attr_pggs1.attr, 2061 &dev_attr_pggs2.attr, 2062 &dev_attr_pggs3.attr, 2063 &dev_attr_shutdown_scope.attr, 2064 &dev_attr_health_status.attr, 2065 &dev_attr_feature_config_id.attr, 2066 &dev_attr_feature_config_value.attr, 2067 NULL, 2068 }; 2069 2070 ATTRIBUTE_GROUPS(zynqmp_firmware); 2071 2072 /** 2073 * zynqmp_clear_pm_state() - Clear subsystem state 2074 * @dev: Device pointer used for logging 2075 * 2076 * Clears PM specific data in EL3 and platform firmware. 2077 * 2078 * Return: Returns status, either success or error 2079 */ 2080 static int zynqmp_clear_pm_state(struct device *dev) 2081 { 2082 u32 pm_family_code; 2083 int ret; 2084 2085 /* Get the Family code of platform */ 2086 ret = zynqmp_pm_get_family_info(&pm_family_code); 2087 if (ret < 0) 2088 return ret; 2089 2090 /* Supporting on Versal and Versal Net platforms only */ 2091 if (pm_family_code == PM_VERSAL_FAMILY_CODE || 2092 pm_family_code == PM_VERSAL_NET_FAMILY_CODE) { 2093 /* Check if EL3 firmware supports TF_A_CLEAR_PM_STATE */ 2094 ret = do_feature_check_call(TF_A_CLEAR_PM_STATE); 2095 if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1)) { 2096 /* Clear PM specific data in EL3 firmware */ 2097 ret = zynqmp_pm_invoke_fn(TF_A_CLEAR_PM_STATE, NULL, 0); 2098 if (ret) 2099 dev_err(dev, 2100 "Failed to clear EL3 PM subsystem state: %d\n", ret); 2101 } else { 2102 dev_warn(dev, "TF_A_CLEAR_PM_STATE is not supported by EL3 firmware: %d\n", ret); 2103 ret = 0; 2104 } 2105 2106 /* Check if the firmware supports the PM_DEV_ALL_PERIPH node ID */ 2107 ret = do_feature_check_call(PM_RELEASE_NODE); 2108 if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_3)) { 2109 /* Attempt to release all peripheral devices via firmware */ 2110 ret = zynqmp_pm_release_node(PM_DEV_ALL_PERIPH); 2111 if (ret) 2112 dev_err(dev, "Failed to release all peripheral devices: %d\n", ret); 2113 } else { 2114 dev_warn(dev, 2115 "Bulk device release is not supported by firmware: %d\n", ret); 2116 ret = 0; 2117 } 2118 2119 /* Check if the firmware supports the PM_ALL_NOTIFIERS node ID */ 2120 ret = do_feature_check_call(PM_REGISTER_NOTIFIER); 2121 if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_3)) { 2122 /* Attempt to unregister all notifier callbacks via firmware */ 2123 ret = zynqmp_pm_register_notifier(PM_ALL_NOTIFIERS, 0, 0, 0); 2124 if (ret) 2125 dev_err(dev, "Failed to unregister all notifiers: %d\n", ret); 2126 } else { 2127 dev_warn(dev, 2128 "Firmware doesn't support unregister all notifiers at once: %d\n", 2129 ret); 2130 ret = 0; 2131 } 2132 } 2133 2134 return ret; 2135 } 2136 2137 static int zynqmp_firmware_probe(struct platform_device *pdev) 2138 { 2139 struct device *dev = &pdev->dev; 2140 struct zynqmp_devinfo *devinfo; 2141 u32 pm_family_code; 2142 int ret; 2143 2144 ret = get_set_conduit_method(dev->of_node); 2145 if (ret) 2146 return ret; 2147 2148 /* Get platform-specific firmware data from device tree match */ 2149 active_platform_fw_data = (struct platform_fw_data *)device_get_match_data(dev); 2150 if (!active_platform_fw_data) 2151 return -EINVAL; 2152 2153 /* Get SiP SVC version number */ 2154 ret = zynqmp_pm_get_sip_svc_version(&sip_svc_version); 2155 if (ret) 2156 return ret; 2157 2158 ret = do_feature_check_call(PM_FEATURE_CHECK); 2159 if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1)) 2160 feature_check_enabled = true; 2161 2162 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL); 2163 if (!devinfo) 2164 return -ENOMEM; 2165 2166 devinfo->dev = dev; 2167 2168 platform_set_drvdata(pdev, devinfo); 2169 2170 /* Check PM API version number */ 2171 ret = zynqmp_pm_get_api_version(&pm_api_version); 2172 if (ret) 2173 return ret; 2174 2175 if (pm_api_version < ZYNQMP_PM_VERSION) { 2176 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n", 2177 __func__, 2178 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR, 2179 pm_api_version >> 16, pm_api_version & 0xFFFF); 2180 } 2181 2182 pr_info("%s Platform Management API v%d.%d\n", __func__, 2183 pm_api_version >> 16, pm_api_version & 0xFFFF); 2184 2185 /* Get the Family code of platform */ 2186 ret = zynqmp_pm_get_family_info(&pm_family_code); 2187 if (ret < 0) 2188 return ret; 2189 2190 if (is_kdump_kernel()) 2191 zynqmp_clear_pm_state(dev); 2192 2193 /* Check trustzone version number */ 2194 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version); 2195 if (ret) 2196 panic("Legacy trustzone found without version support\n"); 2197 2198 if (pm_tz_version < ZYNQMP_TZ_VERSION) 2199 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n", 2200 __func__, 2201 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR, 2202 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 2203 2204 pr_info("%s Trustzone version v%d.%d\n", __func__, 2205 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 2206 2207 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, 2208 ARRAY_SIZE(firmware_devs), NULL, 0, NULL); 2209 if (ret) { 2210 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret); 2211 return ret; 2212 } 2213 2214 zynqmp_pm_api_debugfs_init(); 2215 2216 if (pm_family_code != PM_ZYNQMP_FAMILY_CODE) { 2217 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", 2218 -1, NULL, 0); 2219 if (IS_ERR(em_dev)) 2220 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); 2221 } 2222 2223 return of_platform_populate(dev->of_node, NULL, NULL, dev); 2224 } 2225 2226 static void zynqmp_firmware_shutdown(struct platform_device *pdev) 2227 { 2228 zynqmp_clear_pm_state(&pdev->dev); 2229 } 2230 2231 static void zynqmp_firmware_remove(struct platform_device *pdev) 2232 { 2233 struct pm_api_feature_data *feature_data; 2234 struct hlist_node *tmp; 2235 int i; 2236 2237 mfd_remove_devices(&pdev->dev); 2238 zynqmp_pm_api_debugfs_exit(); 2239 2240 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) { 2241 hash_del(&feature_data->hentry); 2242 kfree(feature_data); 2243 } 2244 2245 platform_device_unregister(em_dev); 2246 } 2247 2248 static void zynqmp_firmware_sync_state(struct device *dev) 2249 { 2250 struct device_node *np = dev->of_node; 2251 2252 if (!of_device_is_compatible(np, "xlnx,zynqmp-firmware")) 2253 return; 2254 2255 of_genpd_sync_state(np); 2256 2257 if (zynqmp_pm_init_finalize()) 2258 dev_warn(dev, "failed to release power management to firmware\n"); 2259 } 2260 2261 static const struct platform_fw_data platform_fw_data_versal = { 2262 .family_code = PM_VERSAL_FAMILY_CODE, 2263 }; 2264 2265 static const struct platform_fw_data platform_fw_data_versal_net = { 2266 .family_code = PM_VERSAL_NET_FAMILY_CODE, 2267 }; 2268 2269 static const struct platform_fw_data platform_fw_data_zynqmp = { 2270 .family_code = PM_ZYNQMP_FAMILY_CODE, 2271 }; 2272 2273 static const struct of_device_id zynqmp_firmware_of_match[] = { 2274 {.compatible = "xlnx,zynqmp-firmware", .data = &platform_fw_data_zynqmp}, 2275 {.compatible = "xlnx,versal-firmware", .data = &platform_fw_data_versal}, 2276 {.compatible = "xlnx,versal-net-firmware", .data = &platform_fw_data_versal_net}, 2277 {}, 2278 }; 2279 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match); 2280 2281 static struct platform_driver zynqmp_firmware_driver = { 2282 .driver = { 2283 .name = "zynqmp_firmware", 2284 .of_match_table = zynqmp_firmware_of_match, 2285 .dev_groups = zynqmp_firmware_groups, 2286 .sync_state = zynqmp_firmware_sync_state, 2287 }, 2288 .probe = zynqmp_firmware_probe, 2289 .remove = zynqmp_firmware_remove, 2290 .shutdown = zynqmp_firmware_shutdown, 2291 }; 2292 module_platform_driver(zynqmp_firmware_driver); 2293