1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xilinx Zynq MPSoC Firmware layer 4 * 5 * Copyright (C) 2014-2022 Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@amd.com> 8 * Davorin Mista <davorin.mista@aggios.com> 9 * Jolly Shah <jollys@xilinx.com> 10 * Rajan Vaja <rajanv@xilinx.com> 11 */ 12 13 #include <linux/arm-smccc.h> 14 #include <linux/compiler.h> 15 #include <linux/device.h> 16 #include <linux/init.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_platform.h> 21 #include <linux/platform_device.h> 22 #include <linux/slab.h> 23 #include <linux/uaccess.h> 24 #include <linux/hashtable.h> 25 26 #include <linux/firmware/xlnx-zynqmp.h> 27 #include <linux/firmware/xlnx-event-manager.h> 28 #include "zynqmp-debug.h" 29 30 /* Max HashMap Order for PM API feature check (1<<7 = 128) */ 31 #define PM_API_FEATURE_CHECK_MAX_ORDER 7 32 33 /* CRL registers and bitfields */ 34 #define CRL_APB_BASE 0xFF5E0000U 35 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 36 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U)) 37 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 38 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU 39 40 /* IOCTL/QUERY feature payload size */ 41 #define FEATURE_PAYLOAD_SIZE 2 42 43 /* Firmware feature check version mask */ 44 #define FIRMWARE_VERSION_MASK GENMASK(15, 0) 45 46 static bool feature_check_enabled; 47 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER); 48 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE]; 49 static u32 query_features[FEATURE_PAYLOAD_SIZE]; 50 51 static struct platform_device *em_dev; 52 53 /** 54 * struct zynqmp_devinfo - Structure for Zynqmp device instance 55 * @dev: Device Pointer 56 * @feature_conf_id: Feature conf id 57 */ 58 struct zynqmp_devinfo { 59 struct device *dev; 60 u32 feature_conf_id; 61 }; 62 63 /** 64 * struct pm_api_feature_data - PM API Feature data 65 * @pm_api_id: PM API Id, used as key to index into hashmap 66 * @feature_status: status of PM API feature: valid, invalid 67 * @hentry: hlist_node that hooks this entry into hashtable 68 */ 69 struct pm_api_feature_data { 70 u32 pm_api_id; 71 int feature_status; 72 struct hlist_node hentry; 73 }; 74 75 static const struct mfd_cell firmware_devs[] = { 76 { 77 .name = "zynqmp_power_controller", 78 }, 79 }; 80 81 /** 82 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes 83 * @ret_status: PMUFW return code 84 * 85 * Return: corresponding Linux error code 86 */ 87 static int zynqmp_pm_ret_code(u32 ret_status) 88 { 89 switch (ret_status) { 90 case XST_PM_SUCCESS: 91 case XST_PM_DOUBLE_REQ: 92 return 0; 93 case XST_PM_NO_FEATURE: 94 return -ENOTSUPP; 95 case XST_PM_INVALID_VERSION: 96 return -EOPNOTSUPP; 97 case XST_PM_NO_ACCESS: 98 return -EACCES; 99 case XST_PM_ABORT_SUSPEND: 100 return -ECANCELED; 101 case XST_PM_MULT_USER: 102 return -EUSERS; 103 case XST_PM_INTERNAL: 104 case XST_PM_CONFLICT: 105 case XST_PM_INVALID_NODE: 106 case XST_PM_INVALID_CRC: 107 default: 108 return -EINVAL; 109 } 110 } 111 112 static noinline int do_fw_call_fail(u32 *ret_payload, u32 num_args, ...) 113 { 114 return -ENODEV; 115 } 116 117 /* 118 * PM function call wrapper 119 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration 120 */ 121 static int (*do_fw_call)(u32 *ret_payload, u32, ...) = do_fw_call_fail; 122 123 /** 124 * do_fw_call_smc() - Call system-level platform management layer (SMC) 125 * @num_args: Number of variable arguments should be <= 8 126 * @ret_payload: Returned value array 127 * 128 * Invoke platform management function via SMC call (no hypervisor present). 129 * 130 * Return: Returns status, either success or error+reason 131 */ 132 static noinline int do_fw_call_smc(u32 *ret_payload, u32 num_args, ...) 133 { 134 struct arm_smccc_res res; 135 u64 args[8] = {0}; 136 va_list arg_list; 137 u8 i; 138 139 if (num_args > 8) 140 return -EINVAL; 141 142 va_start(arg_list, num_args); 143 144 for (i = 0; i < num_args; i++) 145 args[i] = va_arg(arg_list, u64); 146 147 va_end(arg_list); 148 149 arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res); 150 151 if (ret_payload) { 152 ret_payload[0] = lower_32_bits(res.a0); 153 ret_payload[1] = upper_32_bits(res.a0); 154 ret_payload[2] = lower_32_bits(res.a1); 155 ret_payload[3] = upper_32_bits(res.a1); 156 } 157 158 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 159 } 160 161 /** 162 * do_fw_call_hvc() - Call system-level platform management layer (HVC) 163 * @num_args: Number of variable arguments should be <= 8 164 * @ret_payload: Returned value array 165 * 166 * Invoke platform management function via HVC 167 * HVC-based for communication through hypervisor 168 * (no direct communication with ATF). 169 * 170 * Return: Returns status, either success or error+reason 171 */ 172 static noinline int do_fw_call_hvc(u32 *ret_payload, u32 num_args, ...) 173 { 174 struct arm_smccc_res res; 175 u64 args[8] = {0}; 176 va_list arg_list; 177 u8 i; 178 179 if (num_args > 8) 180 return -EINVAL; 181 182 va_start(arg_list, num_args); 183 184 for (i = 0; i < num_args; i++) 185 args[i] = va_arg(arg_list, u64); 186 187 va_end(arg_list); 188 189 arm_smccc_hvc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res); 190 191 if (ret_payload) { 192 ret_payload[0] = lower_32_bits(res.a0); 193 ret_payload[1] = upper_32_bits(res.a0); 194 ret_payload[2] = lower_32_bits(res.a1); 195 ret_payload[3] = upper_32_bits(res.a1); 196 } 197 198 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 199 } 200 201 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload) 202 { 203 int ret; 204 u64 smc_arg[2]; 205 u32 module_id; 206 u32 feature_check_api_id; 207 208 module_id = FIELD_GET(MODULE_ID_MASK, api_id); 209 210 /* 211 * Feature check of APIs belonging to PM, XSEM, and TF-A are handled by calling 212 * PM_FEATURE_CHECK API. For other modules, call PM_API_FEATURES API. 213 */ 214 if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID || module_id == TF_A_MODULE_ID) 215 feature_check_api_id = PM_FEATURE_CHECK; 216 else 217 feature_check_api_id = PM_API_FEATURES; 218 219 /* 220 * Feature check of TF-A APIs is done in the TF-A layer and it expects for 221 * MODULE_ID_MASK bits of SMC's arg[0] to be the same as PM_MODULE_ID. 222 */ 223 if (module_id == TF_A_MODULE_ID) 224 module_id = PM_MODULE_ID; 225 226 smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id; 227 smc_arg[1] = (api_id & API_ID_MASK); 228 229 ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]); 230 if (ret) 231 ret = -EOPNOTSUPP; 232 else 233 ret = ret_payload[1]; 234 235 return ret; 236 } 237 238 static int do_feature_check_call(const u32 api_id) 239 { 240 int ret; 241 u32 ret_payload[PAYLOAD_ARG_CNT]; 242 struct pm_api_feature_data *feature_data; 243 244 /* Check for existing entry in hash table for given api */ 245 hash_for_each_possible(pm_api_features_map, feature_data, hentry, 246 api_id) { 247 if (feature_data->pm_api_id == api_id) 248 return feature_data->feature_status; 249 } 250 251 /* Add new entry if not present */ 252 feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC); 253 if (!feature_data) 254 return -ENOMEM; 255 256 feature_data->pm_api_id = api_id; 257 ret = __do_feature_check_call(api_id, ret_payload); 258 259 feature_data->feature_status = ret; 260 hash_add(pm_api_features_map, &feature_data->hentry, api_id); 261 262 if (api_id == PM_IOCTL) 263 /* Store supported IOCTL IDs mask */ 264 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 265 else if (api_id == PM_QUERY_DATA) 266 /* Store supported QUERY IDs mask */ 267 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4); 268 269 return ret; 270 } 271 272 /** 273 * zynqmp_pm_feature() - Check whether given feature is supported or not and 274 * store supported IOCTL/QUERY ID mask 275 * @api_id: API ID to check 276 * 277 * Return: Returns status, either success or error+reason 278 */ 279 int zynqmp_pm_feature(const u32 api_id) 280 { 281 int ret; 282 283 if (!feature_check_enabled) 284 return 0; 285 286 ret = do_feature_check_call(api_id); 287 288 return ret; 289 } 290 EXPORT_SYMBOL_GPL(zynqmp_pm_feature); 291 292 /** 293 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function 294 * is supported or not 295 * @api_id: PM_IOCTL or PM_QUERY_DATA 296 * @id: IOCTL or QUERY function IDs 297 * 298 * Return: Returns status, either success or error+reason 299 */ 300 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id) 301 { 302 int ret; 303 u32 *bit_mask; 304 305 /* Input arguments validation */ 306 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA)) 307 return -EINVAL; 308 309 /* Check feature check API version */ 310 ret = do_feature_check_call(PM_FEATURE_CHECK); 311 if (ret < 0) 312 return ret; 313 314 /* Check if feature check version 2 is supported or not */ 315 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) { 316 /* 317 * Call feature check for IOCTL/QUERY API to get IOCTL ID or 318 * QUERY ID feature status. 319 */ 320 ret = do_feature_check_call(api_id); 321 if (ret < 0) 322 return ret; 323 324 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features; 325 326 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U) 327 return -EOPNOTSUPP; 328 } else { 329 return -ENODATA; 330 } 331 332 return 0; 333 } 334 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported); 335 336 /** 337 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer 338 * caller function depending on the configuration 339 * @pm_api_id: Requested PM-API call 340 * @ret_payload: Returned value array 341 * @num_args: Number of arguments to requested PM-API call 342 * 343 * Invoke platform management function for SMC or HVC call, depending on 344 * configuration. 345 * Following SMC Calling Convention (SMCCC) for SMC64: 346 * Pm Function Identifier, 347 * PM_SIP_SVC + PM_API_ID = 348 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 349 * ((SMC_64) << FUNCID_CC_SHIFT) 350 * ((SIP_START) << FUNCID_OEN_SHIFT) 351 * ((PM_API_ID) & FUNCID_NUM_MASK)) 352 * 353 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 354 * PM_API_ID - Platform Management API ID. 355 * 356 * Return: Returns status, either success or error+reason 357 */ 358 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...) 359 { 360 /* 361 * Added SIP service call Function Identifier 362 * Make sure to stay in x0 register 363 */ 364 u64 smc_arg[8]; 365 int ret, i; 366 va_list arg_list; 367 u32 args[14] = {0}; 368 369 if (num_args > 14) 370 return -EINVAL; 371 372 va_start(arg_list, num_args); 373 374 /* Check if feature is supported or not */ 375 ret = zynqmp_pm_feature(pm_api_id); 376 if (ret < 0) 377 return ret; 378 379 for (i = 0; i < num_args; i++) 380 args[i] = va_arg(arg_list, u32); 381 382 va_end(arg_list); 383 384 smc_arg[0] = PM_SIP_SVC | pm_api_id; 385 for (i = 0; i < 7; i++) 386 smc_arg[i + 1] = ((u64)args[(i * 2) + 1] << 32) | args[i * 2]; 387 388 return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3], 389 smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]); 390 } 391 392 static u32 pm_api_version; 393 static u32 pm_tz_version; 394 static u32 pm_family_code; 395 static u32 pm_sub_family_code; 396 397 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset) 398 { 399 int ret; 400 401 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, NULL, 2, sgi_num, reset); 402 if (ret != -EOPNOTSUPP && !ret) 403 return ret; 404 405 /* try old implementation as fallback strategy if above fails */ 406 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, IOCTL_REGISTER_SGI, sgi_num, reset); 407 } 408 409 /** 410 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware 411 * @version: Returned version value 412 * 413 * Return: Returns status, either success or error+reason 414 */ 415 int zynqmp_pm_get_api_version(u32 *version) 416 { 417 u32 ret_payload[PAYLOAD_ARG_CNT]; 418 int ret; 419 420 if (!version) 421 return -EINVAL; 422 423 /* Check is PM API version already verified */ 424 if (pm_api_version > 0) { 425 *version = pm_api_version; 426 return 0; 427 } 428 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, ret_payload, 0); 429 *version = ret_payload[1]; 430 431 return ret; 432 } 433 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); 434 435 /** 436 * zynqmp_pm_get_chipid - Get silicon ID registers 437 * @idcode: IDCODE register 438 * @version: version register 439 * 440 * Return: Returns the status of the operation and the idcode and version 441 * registers in @idcode and @version. 442 */ 443 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) 444 { 445 u32 ret_payload[PAYLOAD_ARG_CNT]; 446 int ret; 447 448 if (!idcode || !version) 449 return -EINVAL; 450 451 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0); 452 *idcode = ret_payload[1]; 453 *version = ret_payload[2]; 454 455 return ret; 456 } 457 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); 458 459 /** 460 * zynqmp_pm_get_family_info() - Get family info of platform 461 * @family: Returned family code value 462 * @subfamily: Returned sub-family code value 463 * 464 * Return: Returns status, either success or error+reason 465 */ 466 int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily) 467 { 468 u32 ret_payload[PAYLOAD_ARG_CNT]; 469 u32 idcode; 470 int ret; 471 472 /* Check is family or sub-family code already received */ 473 if (pm_family_code && pm_sub_family_code) { 474 *family = pm_family_code; 475 *subfamily = pm_sub_family_code; 476 return 0; 477 } 478 479 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0); 480 if (ret < 0) 481 return ret; 482 483 idcode = ret_payload[1]; 484 pm_family_code = FIELD_GET(FAMILY_CODE_MASK, idcode); 485 pm_sub_family_code = FIELD_GET(SUB_FAMILY_CODE_MASK, idcode); 486 *family = pm_family_code; 487 *subfamily = pm_sub_family_code; 488 489 return 0; 490 } 491 EXPORT_SYMBOL_GPL(zynqmp_pm_get_family_info); 492 493 /** 494 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version 495 * @version: Returned version value 496 * 497 * Return: Returns status, either success or error+reason 498 */ 499 static int zynqmp_pm_get_trustzone_version(u32 *version) 500 { 501 u32 ret_payload[PAYLOAD_ARG_CNT]; 502 int ret; 503 504 if (!version) 505 return -EINVAL; 506 507 /* Check is PM trustzone version already verified */ 508 if (pm_tz_version > 0) { 509 *version = pm_tz_version; 510 return 0; 511 } 512 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, ret_payload, 0); 513 *version = ret_payload[1]; 514 515 return ret; 516 } 517 518 /** 519 * get_set_conduit_method() - Choose SMC or HVC based communication 520 * @np: Pointer to the device_node structure 521 * 522 * Use SMC or HVC-based functions to communicate with EL2/EL3. 523 * 524 * Return: Returns 0 on success or error code 525 */ 526 static int get_set_conduit_method(struct device_node *np) 527 { 528 const char *method; 529 530 if (of_property_read_string(np, "method", &method)) { 531 pr_warn("%s missing \"method\" property\n", __func__); 532 return -ENXIO; 533 } 534 535 if (!strcmp("hvc", method)) { 536 do_fw_call = do_fw_call_hvc; 537 } else if (!strcmp("smc", method)) { 538 do_fw_call = do_fw_call_smc; 539 } else { 540 pr_warn("%s Invalid \"method\" property: %s\n", 541 __func__, method); 542 return -EINVAL; 543 } 544 545 return 0; 546 } 547 548 /** 549 * zynqmp_pm_query_data() - Get query data from firmware 550 * @qdata: Variable to the zynqmp_pm_query_data structure 551 * @out: Returned output value 552 * 553 * Return: Returns status, either success or error+reason 554 */ 555 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) 556 { 557 int ret; 558 559 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid, qdata.arg1, qdata.arg2, 560 qdata.arg3); 561 562 /* 563 * For clock name query, all bytes in SMC response are clock name 564 * characters and return code is always success. For invalid clocks, 565 * clock name bytes would be zeros. 566 */ 567 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; 568 } 569 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); 570 571 /** 572 * zynqmp_pm_clock_enable() - Enable the clock for given id 573 * @clock_id: ID of the clock to be enabled 574 * 575 * This function is used by master to enable the clock 576 * including peripherals and PLL clocks. 577 * 578 * Return: Returns status, either success or error+reason 579 */ 580 int zynqmp_pm_clock_enable(u32 clock_id) 581 { 582 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, NULL, 1, clock_id); 583 } 584 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); 585 586 /** 587 * zynqmp_pm_clock_disable() - Disable the clock for given id 588 * @clock_id: ID of the clock to be disable 589 * 590 * This function is used by master to disable the clock 591 * including peripherals and PLL clocks. 592 * 593 * Return: Returns status, either success or error+reason 594 */ 595 int zynqmp_pm_clock_disable(u32 clock_id) 596 { 597 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, NULL, 1, clock_id); 598 } 599 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); 600 601 /** 602 * zynqmp_pm_clock_getstate() - Get the clock state for given id 603 * @clock_id: ID of the clock to be queried 604 * @state: 1/0 (Enabled/Disabled) 605 * 606 * This function is used by master to get the state of clock 607 * including peripherals and PLL clocks. 608 * 609 * Return: Returns status, either success or error+reason 610 */ 611 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) 612 { 613 u32 ret_payload[PAYLOAD_ARG_CNT]; 614 int ret; 615 616 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, ret_payload, 1, clock_id); 617 *state = ret_payload[1]; 618 619 return ret; 620 } 621 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); 622 623 /** 624 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id 625 * @clock_id: ID of the clock 626 * @divider: divider value 627 * 628 * This function is used by master to set divider for any clock 629 * to achieve desired rate. 630 * 631 * Return: Returns status, either success or error+reason 632 */ 633 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) 634 { 635 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, NULL, 2, clock_id, divider); 636 } 637 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); 638 639 /** 640 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id 641 * @clock_id: ID of the clock 642 * @divider: divider value 643 * 644 * This function is used by master to get divider values 645 * for any clock. 646 * 647 * Return: Returns status, either success or error+reason 648 */ 649 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) 650 { 651 u32 ret_payload[PAYLOAD_ARG_CNT]; 652 int ret; 653 654 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, ret_payload, 1, clock_id); 655 *divider = ret_payload[1]; 656 657 return ret; 658 } 659 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); 660 661 /** 662 * zynqmp_pm_clock_setparent() - Set the clock parent for given id 663 * @clock_id: ID of the clock 664 * @parent_id: parent id 665 * 666 * This function is used by master to set parent for any clock. 667 * 668 * Return: Returns status, either success or error+reason 669 */ 670 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) 671 { 672 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, NULL, 2, clock_id, parent_id); 673 } 674 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); 675 676 /** 677 * zynqmp_pm_clock_getparent() - Get the clock parent for given id 678 * @clock_id: ID of the clock 679 * @parent_id: parent id 680 * 681 * This function is used by master to get parent index 682 * for any clock. 683 * 684 * Return: Returns status, either success or error+reason 685 */ 686 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) 687 { 688 u32 ret_payload[PAYLOAD_ARG_CNT]; 689 int ret; 690 691 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, ret_payload, 1, clock_id); 692 *parent_id = ret_payload[1]; 693 694 return ret; 695 } 696 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); 697 698 /** 699 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode 700 * 701 * @clk_id: PLL clock ID 702 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) 703 * 704 * This function sets PLL mode 705 * 706 * Return: Returns status, either success or error+reason 707 */ 708 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) 709 { 710 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_MODE, clk_id, mode); 711 } 712 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); 713 714 /** 715 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode 716 * 717 * @clk_id: PLL clock ID 718 * @mode: PLL mode 719 * 720 * This function return current PLL mode 721 * 722 * Return: Returns status, either success or error+reason 723 */ 724 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) 725 { 726 return zynqmp_pm_invoke_fn(PM_IOCTL, mode, 3, 0, IOCTL_GET_PLL_FRAC_MODE, clk_id); 727 } 728 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); 729 730 /** 731 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data 732 * 733 * @clk_id: PLL clock ID 734 * @data: fraction data 735 * 736 * This function sets fraction data. 737 * It is valid for fraction mode only. 738 * 739 * Return: Returns status, either success or error+reason 740 */ 741 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) 742 { 743 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_DATA, clk_id, data); 744 } 745 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); 746 747 /** 748 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data 749 * 750 * @clk_id: PLL clock ID 751 * @data: fraction data 752 * 753 * This function returns fraction data value. 754 * 755 * Return: Returns status, either success or error+reason 756 */ 757 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) 758 { 759 return zynqmp_pm_invoke_fn(PM_IOCTL, data, 3, 0, IOCTL_GET_PLL_FRAC_DATA, clk_id); 760 } 761 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); 762 763 /** 764 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device 765 * 766 * @node_id: Node ID of the device 767 * @type: Type of tap delay to set (input/output) 768 * @value: Value to set fot the tap delay 769 * 770 * This function sets input/output tap delay for the SD device. 771 * 772 * Return: Returns status, either success or error+reason 773 */ 774 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) 775 { 776 u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL; 777 u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16); 778 779 if (value) { 780 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_SET_SD_TAPDELAY, type, 781 value); 782 } 783 784 /* 785 * Work around completely misdesigned firmware API on Xilinx ZynqMP. 786 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only 787 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA 788 * bits, but there is no matching call to clear those bits. If those 789 * bits are not cleared, SDMMC tuning may fail. 790 * 791 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to 792 * allow complete unrestricted access to all address space, including 793 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access 794 * to which was supposed to be protected by the current firmware API. 795 * 796 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter 797 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits. 798 */ 799 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 2, reg, mask); 800 } 801 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); 802 803 /** 804 * zynqmp_pm_sd_dll_reset() - Reset DLL logic 805 * 806 * @node_id: Node ID of the device 807 * @type: Reset type 808 * 809 * This function resets DLL logic for the SD device. 810 * 811 * Return: Returns status, either success or error+reason 812 */ 813 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) 814 { 815 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SD_DLL_RESET, type); 816 } 817 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); 818 819 /** 820 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection 821 * 822 * @dev_id: Device Id of the OSPI device. 823 * @select: OSPI Mux select value. 824 * 825 * This function select the OSPI Mux. 826 * 827 * Return: Returns status, either success or error+reason 828 */ 829 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select) 830 { 831 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, dev_id, IOCTL_OSPI_MUX_SELECT, select); 832 } 833 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select); 834 835 /** 836 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) 837 * @index: GGS register index 838 * @value: Register value to be written 839 * 840 * This function writes value to GGS register. 841 * 842 * Return: Returns status, either success or error+reason 843 */ 844 int zynqmp_pm_write_ggs(u32 index, u32 value) 845 { 846 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_GGS, index, value); 847 } 848 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); 849 850 /** 851 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs) 852 * @index: GGS register index 853 * @value: Register value to be written 854 * 855 * This function returns GGS register value. 856 * 857 * Return: Returns status, either success or error+reason 858 */ 859 int zynqmp_pm_read_ggs(u32 index, u32 *value) 860 { 861 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_GGS, index); 862 } 863 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); 864 865 /** 866 * zynqmp_pm_write_pggs() - PM API for writing persistent global general 867 * storage (pggs) 868 * @index: PGGS register index 869 * @value: Register value to be written 870 * 871 * This function writes value to PGGS register. 872 * 873 * Return: Returns status, either success or error+reason 874 */ 875 int zynqmp_pm_write_pggs(u32 index, u32 value) 876 { 877 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_PGGS, index, value); 878 } 879 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); 880 881 /** 882 * zynqmp_pm_read_pggs() - PM API for reading persistent global general 883 * storage (pggs) 884 * @index: PGGS register index 885 * @value: Register value to be written 886 * 887 * This function returns PGGS register value. 888 * 889 * Return: Returns status, either success or error+reason 890 */ 891 int zynqmp_pm_read_pggs(u32 index, u32 *value) 892 { 893 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_PGGS, index); 894 } 895 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); 896 897 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value) 898 { 899 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_TAPDELAY_BYPASS, index, value); 900 } 901 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); 902 903 /** 904 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status 905 * @value: Status value to be written 906 * 907 * This function sets healthy bit value to indicate boot health status 908 * to firmware. 909 * 910 * Return: Returns status, either success or error+reason 911 */ 912 int zynqmp_pm_set_boot_health_status(u32 value) 913 { 914 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, 0, IOCTL_SET_BOOT_HEALTH_STATUS, value); 915 } 916 917 /** 918 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) 919 * @reset: Reset to be configured 920 * @assert_flag: Flag stating should reset be asserted (1) or 921 * released (0) 922 * 923 * Return: Returns status, either success or error+reason 924 */ 925 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, 926 const enum zynqmp_pm_reset_action assert_flag) 927 { 928 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, NULL, 2, reset, assert_flag); 929 } 930 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); 931 932 /** 933 * zynqmp_pm_reset_get_status - Get status of the reset 934 * @reset: Reset whose status should be returned 935 * @status: Returned status 936 * 937 * Return: Returns status, either success or error+reason 938 */ 939 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) 940 { 941 u32 ret_payload[PAYLOAD_ARG_CNT]; 942 int ret; 943 944 if (!status) 945 return -EINVAL; 946 947 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, ret_payload, 1, reset); 948 *status = ret_payload[1]; 949 950 return ret; 951 } 952 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); 953 954 /** 955 * zynqmp_pm_fpga_load - Perform the fpga load 956 * @address: Address to write to 957 * @size: pl bitstream size 958 * @flags: Bitstream type 959 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration 960 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration 961 * 962 * This function provides access to pmufw. To transfer 963 * the required bitstream into PL. 964 * 965 * Return: Returns status, either success or error+reason 966 */ 967 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) 968 { 969 u32 ret_payload[PAYLOAD_ARG_CNT]; 970 int ret; 971 972 ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, ret_payload, 4, lower_32_bits(address), 973 upper_32_bits(address), size, flags); 974 if (ret_payload[0]) 975 return -ret_payload[0]; 976 977 return ret; 978 } 979 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); 980 981 /** 982 * zynqmp_pm_fpga_get_status - Read value from PCAP status register 983 * @value: Value to read 984 * 985 * This function provides access to the pmufw to get the PCAP 986 * status 987 * 988 * Return: Returns status, either success or error+reason 989 */ 990 int zynqmp_pm_fpga_get_status(u32 *value) 991 { 992 u32 ret_payload[PAYLOAD_ARG_CNT]; 993 int ret; 994 995 if (!value) 996 return -EINVAL; 997 998 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, ret_payload, 0); 999 *value = ret_payload[1]; 1000 1001 return ret; 1002 } 1003 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); 1004 1005 /** 1006 * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status. 1007 * @value: Buffer to store FPGA configuration status. 1008 * 1009 * This function provides access to the pmufw to get the FPGA configuration 1010 * status 1011 * 1012 * Return: 0 on success, a negative value on error 1013 */ 1014 int zynqmp_pm_fpga_get_config_status(u32 *value) 1015 { 1016 u32 ret_payload[PAYLOAD_ARG_CNT]; 1017 u32 buf, lower_addr, upper_addr; 1018 int ret; 1019 1020 if (!value) 1021 return -EINVAL; 1022 1023 lower_addr = lower_32_bits((u64)&buf); 1024 upper_addr = upper_32_bits((u64)&buf); 1025 1026 ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4, 1027 XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, lower_addr, upper_addr, 1028 XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG); 1029 1030 *value = ret_payload[1]; 1031 1032 return ret; 1033 } 1034 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status); 1035 1036 /** 1037 * zynqmp_pm_pinctrl_request - Request Pin from firmware 1038 * @pin: Pin number to request 1039 * 1040 * This function requests pin from firmware. 1041 * 1042 * Return: Returns status, either success or error+reason. 1043 */ 1044 int zynqmp_pm_pinctrl_request(const u32 pin) 1045 { 1046 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, NULL, 1, pin); 1047 } 1048 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request); 1049 1050 /** 1051 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released 1052 * @pin: Pin number to release 1053 * 1054 * This function release pin from firmware. 1055 * 1056 * Return: Returns status, either success or error+reason. 1057 */ 1058 int zynqmp_pm_pinctrl_release(const u32 pin) 1059 { 1060 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, NULL, 1, pin); 1061 } 1062 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release); 1063 1064 /** 1065 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin 1066 * @pin: Pin number 1067 * @id: Function ID to set 1068 * 1069 * This function sets requested function for the given pin. 1070 * 1071 * Return: Returns status, either success or error+reason. 1072 */ 1073 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id) 1074 { 1075 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, NULL, 2, pin, id); 1076 } 1077 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function); 1078 1079 /** 1080 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin 1081 * @pin: Pin number 1082 * @param: Parameter to get 1083 * @value: Buffer to store parameter value 1084 * 1085 * This function gets requested configuration parameter for the given pin. 1086 * 1087 * Return: Returns status, either success or error+reason. 1088 */ 1089 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, 1090 u32 *value) 1091 { 1092 u32 ret_payload[PAYLOAD_ARG_CNT]; 1093 int ret; 1094 1095 if (!value) 1096 return -EINVAL; 1097 1098 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, ret_payload, 2, pin, param); 1099 *value = ret_payload[1]; 1100 1101 return ret; 1102 } 1103 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config); 1104 1105 /** 1106 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin 1107 * @pin: Pin number 1108 * @param: Parameter to set 1109 * @value: Parameter value to set 1110 * 1111 * This function sets requested configuration parameter for the given pin. 1112 * 1113 * Return: Returns status, either success or error+reason. 1114 */ 1115 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, 1116 u32 value) 1117 { 1118 int ret; 1119 1120 if (pm_family_code == ZYNQMP_FAMILY_CODE && 1121 param == PM_PINCTRL_CONFIG_TRI_STATE) { 1122 ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET); 1123 if (ret < PM_PINCTRL_PARAM_SET_VERSION) 1124 return -EOPNOTSUPP; 1125 } 1126 1127 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, NULL, 3, pin, param, value); 1128 } 1129 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config); 1130 1131 /** 1132 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status 1133 * @ps_mode: Returned output value of ps_mode 1134 * 1135 * This API function is to be used for notify the power management controller 1136 * to read bootpin status. 1137 * 1138 * Return: status, either success or error+reason 1139 */ 1140 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode) 1141 { 1142 unsigned int ret; 1143 u32 ret_payload[PAYLOAD_ARG_CNT]; 1144 1145 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, ret_payload, 1, CRL_APB_BOOT_PIN_CTRL); 1146 1147 *ps_mode = ret_payload[1]; 1148 1149 return ret; 1150 } 1151 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read); 1152 1153 /** 1154 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin 1155 * @ps_mode: Value to be written to the bootpin ctrl register 1156 * 1157 * This API function is to be used for notify the power management controller 1158 * to configure bootpin. 1159 * 1160 * Return: Returns status, either success or error+reason 1161 */ 1162 int zynqmp_pm_bootmode_write(u32 ps_mode) 1163 { 1164 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 3, CRL_APB_BOOT_PIN_CTRL, 1165 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode); 1166 } 1167 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write); 1168 1169 /** 1170 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller 1171 * master has initialized its own power management 1172 * 1173 * Return: Returns status, either success or error+reason 1174 * 1175 * This API function is to be used for notify the power management controller 1176 * about the completed power management initialization. 1177 */ 1178 int zynqmp_pm_init_finalize(void) 1179 { 1180 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, NULL, 0); 1181 } 1182 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); 1183 1184 /** 1185 * zynqmp_pm_set_suspend_mode() - Set system suspend mode 1186 * @mode: Mode to set for system suspend 1187 * 1188 * This API function is used to set mode of system suspend. 1189 * 1190 * Return: Returns status, either success or error+reason 1191 */ 1192 int zynqmp_pm_set_suspend_mode(u32 mode) 1193 { 1194 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, NULL, 1, mode); 1195 } 1196 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); 1197 1198 /** 1199 * zynqmp_pm_request_node() - Request a node with specific capabilities 1200 * @node: Node ID of the slave 1201 * @capabilities: Requested capabilities of the slave 1202 * @qos: Quality of service (not supported) 1203 * @ack: Flag to specify whether acknowledge is requested 1204 * 1205 * This function is used by master to request particular node from firmware. 1206 * Every master must request node before using it. 1207 * 1208 * Return: Returns status, either success or error+reason 1209 */ 1210 int zynqmp_pm_request_node(const u32 node, const u32 capabilities, 1211 const u32 qos, const enum zynqmp_pm_request_ack ack) 1212 { 1213 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, NULL, 4, node, capabilities, qos, ack); 1214 } 1215 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); 1216 1217 /** 1218 * zynqmp_pm_release_node() - Release a node 1219 * @node: Node ID of the slave 1220 * 1221 * This function is used by master to inform firmware that master 1222 * has released node. Once released, master must not use that node 1223 * without re-request. 1224 * 1225 * Return: Returns status, either success or error+reason 1226 */ 1227 int zynqmp_pm_release_node(const u32 node) 1228 { 1229 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, NULL, 1, node); 1230 } 1231 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); 1232 1233 /** 1234 * zynqmp_pm_get_rpu_mode() - Get RPU mode 1235 * @node_id: Node ID of the device 1236 * @rpu_mode: return by reference value 1237 * either split or lockstep 1238 * 1239 * Return: return 0 on success or error+reason. 1240 * if success, then rpu_mode will be set 1241 * to current rpu mode. 1242 */ 1243 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode) 1244 { 1245 u32 ret_payload[PAYLOAD_ARG_CNT]; 1246 int ret; 1247 1248 ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_GET_RPU_OPER_MODE); 1249 1250 /* only set rpu_mode if no error */ 1251 if (ret == XST_PM_SUCCESS) 1252 *rpu_mode = ret_payload[0]; 1253 1254 return ret; 1255 } 1256 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode); 1257 1258 /** 1259 * zynqmp_pm_set_rpu_mode() - Set RPU mode 1260 * @node_id: Node ID of the device 1261 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep 1262 * 1263 * This function is used to set RPU mode to split or 1264 * lockstep 1265 * 1266 * Return: Returns status, either success or error+reason 1267 */ 1268 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode) 1269 { 1270 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SET_RPU_OPER_MODE, 1271 (u32)rpu_mode); 1272 } 1273 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode); 1274 1275 /** 1276 * zynqmp_pm_set_tcm_config - configure TCM 1277 * @node_id: Firmware specific TCM subsystem ID 1278 * @tcm_mode: Argument 1 to requested IOCTL call 1279 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT 1280 * 1281 * This function is used to set RPU mode to split or combined 1282 * 1283 * Return: status: 0 for success, else failure 1284 */ 1285 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode) 1286 { 1287 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_TCM_COMB_CONFIG, 1288 (u32)tcm_mode); 1289 } 1290 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config); 1291 1292 /** 1293 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to 1294 * be powered down forcefully 1295 * @node: Node ID of the targeted PU or subsystem 1296 * @ack: Flag to specify whether acknowledge is requested 1297 * 1298 * Return: status, either success or error+reason 1299 */ 1300 int zynqmp_pm_force_pwrdwn(const u32 node, 1301 const enum zynqmp_pm_request_ack ack) 1302 { 1303 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, NULL, 2, node, ack); 1304 } 1305 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn); 1306 1307 /** 1308 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem 1309 * @node: Node ID of the master or subsystem 1310 * @set_addr: Specifies whether the address argument is relevant 1311 * @address: Address from which to resume when woken up 1312 * @ack: Flag to specify whether acknowledge requested 1313 * 1314 * Return: status, either success or error+reason 1315 */ 1316 int zynqmp_pm_request_wake(const u32 node, 1317 const bool set_addr, 1318 const u64 address, 1319 const enum zynqmp_pm_request_ack ack) 1320 { 1321 /* set_addr flag is encoded into 1st bit of address */ 1322 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, NULL, 4, node, address | set_addr, 1323 address >> 32, ack); 1324 } 1325 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake); 1326 1327 /** 1328 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves 1329 * @node: Node ID of the slave 1330 * @capabilities: Requested capabilities of the slave 1331 * @qos: Quality of service (not supported) 1332 * @ack: Flag to specify whether acknowledge is requested 1333 * 1334 * This API function is to be used for slaves a PU already has requested 1335 * to change its capabilities. 1336 * 1337 * Return: Returns status, either success or error+reason 1338 */ 1339 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 1340 const u32 qos, 1341 const enum zynqmp_pm_request_ack ack) 1342 { 1343 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, NULL, 4, node, capabilities, qos, ack); 1344 } 1345 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); 1346 1347 /** 1348 * zynqmp_pm_load_pdi - Load and process PDI 1349 * @src: Source device where PDI is located 1350 * @address: PDI src address 1351 * 1352 * This function provides support to load PDI from linux 1353 * 1354 * Return: Returns status, either success or error+reason 1355 */ 1356 int zynqmp_pm_load_pdi(const u32 src, const u64 address) 1357 { 1358 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, NULL, 3, src, lower_32_bits(address), 1359 upper_32_bits(address)); 1360 } 1361 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi); 1362 1363 /** 1364 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using 1365 * AES-GCM core. 1366 * @address: Address of the AesParams structure. 1367 * @out: Returned output value 1368 * 1369 * Return: Returns status, either success or error code. 1370 */ 1371 int zynqmp_pm_aes_engine(const u64 address, u32 *out) 1372 { 1373 u32 ret_payload[PAYLOAD_ARG_CNT]; 1374 int ret; 1375 1376 if (!out) 1377 return -EINVAL; 1378 1379 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, ret_payload, 2, upper_32_bits(address), 1380 lower_32_bits(address)); 1381 *out = ret_payload[1]; 1382 1383 return ret; 1384 } 1385 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); 1386 1387 /** 1388 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash 1389 * @address: Address of the data/ Address of output buffer where 1390 * hash should be stored. 1391 * @size: Size of the data. 1392 * @flags: 1393 * BIT(0) - for initializing csudma driver and SHA3(Here address 1394 * and size inputs can be NULL). 1395 * BIT(1) - to call Sha3_Update API which can be called multiple 1396 * times when data is not contiguous. 1397 * BIT(2) - to get final hash of the whole updated data. 1398 * Hash will be overwritten at provided address with 1399 * 48 bytes. 1400 * 1401 * Return: Returns status, either success or error code. 1402 */ 1403 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags) 1404 { 1405 u32 lower_addr = lower_32_bits(address); 1406 u32 upper_addr = upper_32_bits(address); 1407 1408 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, NULL, 4, upper_addr, lower_addr, size, flags); 1409 } 1410 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash); 1411 1412 /** 1413 * zynqmp_pm_register_notifier() - PM API for register a subsystem 1414 * to be notified about specific 1415 * event/error. 1416 * @node: Node ID to which the event is related. 1417 * @event: Event Mask of Error events for which wants to get notified. 1418 * @wake: Wake subsystem upon capturing the event if value 1 1419 * @enable: Enable the registration for value 1, disable for value 0 1420 * 1421 * This function is used to register/un-register for particular node-event 1422 * combination in firmware. 1423 * 1424 * Return: Returns status, either success or error+reason 1425 */ 1426 1427 int zynqmp_pm_register_notifier(const u32 node, const u32 event, 1428 const u32 wake, const u32 enable) 1429 { 1430 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, NULL, 4, node, event, wake, enable); 1431 } 1432 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier); 1433 1434 /** 1435 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart 1436 * @type: Shutdown or restart? 0 for shutdown, 1 for restart 1437 * @subtype: Specifies which system should be restarted or shut down 1438 * 1439 * Return: Returns status, either success or error+reason 1440 */ 1441 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 1442 { 1443 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, NULL, 2, type, subtype); 1444 } 1445 1446 /** 1447 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config 1448 * @id: The config ID of the feature to be configured 1449 * @value: The config value of the feature to be configured 1450 * 1451 * Return: Returns 0 on success or error value on failure. 1452 */ 1453 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value) 1454 { 1455 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_FEATURE_CONFIG, id, value); 1456 } 1457 1458 /** 1459 * zynqmp_pm_get_feature_config - PM call to get value of configured feature 1460 * @id: The config id of the feature to be queried 1461 * @payload: Returned value array 1462 * 1463 * Return: Returns 0 on success or error value on failure. 1464 */ 1465 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, 1466 u32 *payload) 1467 { 1468 return zynqmp_pm_invoke_fn(PM_IOCTL, payload, 3, 0, IOCTL_GET_FEATURE_CONFIG, id); 1469 } 1470 1471 /** 1472 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers 1473 * @node: SD node ID 1474 * @config: The config type of SD registers 1475 * @value: Value to be set 1476 * 1477 * Return: Returns 0 on success or error value on failure. 1478 */ 1479 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) 1480 { 1481 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_SD_CONFIG, config, value); 1482 } 1483 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config); 1484 1485 /** 1486 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers 1487 * @node: GEM node ID 1488 * @config: The config type of GEM registers 1489 * @value: Value to be set 1490 * 1491 * Return: Returns 0 on success or error value on failure. 1492 */ 1493 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, 1494 u32 value) 1495 { 1496 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_GEM_CONFIG, config, value); 1497 } 1498 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config); 1499 1500 /** 1501 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope 1502 * @subtype: Shutdown subtype 1503 * @name: Matching string for scope argument 1504 * 1505 * This struct encapsulates mapping between shutdown scope ID and string. 1506 */ 1507 struct zynqmp_pm_shutdown_scope { 1508 const enum zynqmp_pm_shutdown_subtype subtype; 1509 const char *name; 1510 }; 1511 1512 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { 1513 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { 1514 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, 1515 .name = "subsystem", 1516 }, 1517 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { 1518 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, 1519 .name = "ps_only", 1520 }, 1521 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { 1522 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, 1523 .name = "system", 1524 }, 1525 }; 1526 1527 static struct zynqmp_pm_shutdown_scope *selected_scope = 1528 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; 1529 1530 /** 1531 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid 1532 * @scope_string: Shutdown scope string 1533 * 1534 * Return: Return pointer to matching shutdown scope struct from 1535 * array of available options in system if string is valid, 1536 * otherwise returns NULL. 1537 */ 1538 static struct zynqmp_pm_shutdown_scope* 1539 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) 1540 { 1541 int count; 1542 1543 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) 1544 if (sysfs_streq(scope_string, shutdown_scopes[count].name)) 1545 return &shutdown_scopes[count]; 1546 1547 return NULL; 1548 } 1549 1550 static ssize_t shutdown_scope_show(struct device *device, 1551 struct device_attribute *attr, 1552 char *buf) 1553 { 1554 int i; 1555 1556 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { 1557 if (&shutdown_scopes[i] == selected_scope) { 1558 strcat(buf, "["); 1559 strcat(buf, shutdown_scopes[i].name); 1560 strcat(buf, "]"); 1561 } else { 1562 strcat(buf, shutdown_scopes[i].name); 1563 } 1564 strcat(buf, " "); 1565 } 1566 strcat(buf, "\n"); 1567 1568 return strlen(buf); 1569 } 1570 1571 static ssize_t shutdown_scope_store(struct device *device, 1572 struct device_attribute *attr, 1573 const char *buf, size_t count) 1574 { 1575 int ret; 1576 struct zynqmp_pm_shutdown_scope *scope; 1577 1578 scope = zynqmp_pm_is_shutdown_scope_valid(buf); 1579 if (!scope) 1580 return -EINVAL; 1581 1582 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, 1583 scope->subtype); 1584 if (ret) { 1585 pr_err("unable to set shutdown scope %s\n", buf); 1586 return ret; 1587 } 1588 1589 selected_scope = scope; 1590 1591 return count; 1592 } 1593 1594 static DEVICE_ATTR_RW(shutdown_scope); 1595 1596 static ssize_t health_status_store(struct device *device, 1597 struct device_attribute *attr, 1598 const char *buf, size_t count) 1599 { 1600 int ret; 1601 unsigned int value; 1602 1603 ret = kstrtouint(buf, 10, &value); 1604 if (ret) 1605 return ret; 1606 1607 ret = zynqmp_pm_set_boot_health_status(value); 1608 if (ret) { 1609 dev_err(device, "unable to set healthy bit value to %u\n", 1610 value); 1611 return ret; 1612 } 1613 1614 return count; 1615 } 1616 1617 static DEVICE_ATTR_WO(health_status); 1618 1619 static ssize_t ggs_show(struct device *device, 1620 struct device_attribute *attr, 1621 char *buf, 1622 u32 reg) 1623 { 1624 int ret; 1625 u32 ret_payload[PAYLOAD_ARG_CNT]; 1626 1627 ret = zynqmp_pm_read_ggs(reg, ret_payload); 1628 if (ret) 1629 return ret; 1630 1631 return sprintf(buf, "0x%x\n", ret_payload[1]); 1632 } 1633 1634 static ssize_t ggs_store(struct device *device, 1635 struct device_attribute *attr, 1636 const char *buf, size_t count, 1637 u32 reg) 1638 { 1639 long value; 1640 int ret; 1641 1642 if (reg >= GSS_NUM_REGS) 1643 return -EINVAL; 1644 1645 ret = kstrtol(buf, 16, &value); 1646 if (ret) { 1647 count = -EFAULT; 1648 goto err; 1649 } 1650 1651 ret = zynqmp_pm_write_ggs(reg, value); 1652 if (ret) 1653 count = -EFAULT; 1654 err: 1655 return count; 1656 } 1657 1658 /* GGS register show functions */ 1659 #define GGS0_SHOW(N) \ 1660 ssize_t ggs##N##_show(struct device *device, \ 1661 struct device_attribute *attr, \ 1662 char *buf) \ 1663 { \ 1664 return ggs_show(device, attr, buf, N); \ 1665 } 1666 1667 static GGS0_SHOW(0); 1668 static GGS0_SHOW(1); 1669 static GGS0_SHOW(2); 1670 static GGS0_SHOW(3); 1671 1672 /* GGS register store function */ 1673 #define GGS0_STORE(N) \ 1674 ssize_t ggs##N##_store(struct device *device, \ 1675 struct device_attribute *attr, \ 1676 const char *buf, \ 1677 size_t count) \ 1678 { \ 1679 return ggs_store(device, attr, buf, count, N); \ 1680 } 1681 1682 static GGS0_STORE(0); 1683 static GGS0_STORE(1); 1684 static GGS0_STORE(2); 1685 static GGS0_STORE(3); 1686 1687 static ssize_t pggs_show(struct device *device, 1688 struct device_attribute *attr, 1689 char *buf, 1690 u32 reg) 1691 { 1692 int ret; 1693 u32 ret_payload[PAYLOAD_ARG_CNT]; 1694 1695 ret = zynqmp_pm_read_pggs(reg, ret_payload); 1696 if (ret) 1697 return ret; 1698 1699 return sprintf(buf, "0x%x\n", ret_payload[1]); 1700 } 1701 1702 static ssize_t pggs_store(struct device *device, 1703 struct device_attribute *attr, 1704 const char *buf, size_t count, 1705 u32 reg) 1706 { 1707 long value; 1708 int ret; 1709 1710 if (reg >= GSS_NUM_REGS) 1711 return -EINVAL; 1712 1713 ret = kstrtol(buf, 16, &value); 1714 if (ret) { 1715 count = -EFAULT; 1716 goto err; 1717 } 1718 1719 ret = zynqmp_pm_write_pggs(reg, value); 1720 if (ret) 1721 count = -EFAULT; 1722 1723 err: 1724 return count; 1725 } 1726 1727 #define PGGS0_SHOW(N) \ 1728 ssize_t pggs##N##_show(struct device *device, \ 1729 struct device_attribute *attr, \ 1730 char *buf) \ 1731 { \ 1732 return pggs_show(device, attr, buf, N); \ 1733 } 1734 1735 #define PGGS0_STORE(N) \ 1736 ssize_t pggs##N##_store(struct device *device, \ 1737 struct device_attribute *attr, \ 1738 const char *buf, \ 1739 size_t count) \ 1740 { \ 1741 return pggs_store(device, attr, buf, count, N); \ 1742 } 1743 1744 /* PGGS register show functions */ 1745 static PGGS0_SHOW(0); 1746 static PGGS0_SHOW(1); 1747 static PGGS0_SHOW(2); 1748 static PGGS0_SHOW(3); 1749 1750 /* PGGS register store functions */ 1751 static PGGS0_STORE(0); 1752 static PGGS0_STORE(1); 1753 static PGGS0_STORE(2); 1754 static PGGS0_STORE(3); 1755 1756 /* GGS register attributes */ 1757 static DEVICE_ATTR_RW(ggs0); 1758 static DEVICE_ATTR_RW(ggs1); 1759 static DEVICE_ATTR_RW(ggs2); 1760 static DEVICE_ATTR_RW(ggs3); 1761 1762 /* PGGS register attributes */ 1763 static DEVICE_ATTR_RW(pggs0); 1764 static DEVICE_ATTR_RW(pggs1); 1765 static DEVICE_ATTR_RW(pggs2); 1766 static DEVICE_ATTR_RW(pggs3); 1767 1768 static ssize_t feature_config_id_show(struct device *device, 1769 struct device_attribute *attr, 1770 char *buf) 1771 { 1772 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1773 1774 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id); 1775 } 1776 1777 static ssize_t feature_config_id_store(struct device *device, 1778 struct device_attribute *attr, 1779 const char *buf, size_t count) 1780 { 1781 u32 config_id; 1782 int ret; 1783 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1784 1785 if (!buf) 1786 return -EINVAL; 1787 1788 ret = kstrtou32(buf, 10, &config_id); 1789 if (ret) 1790 return ret; 1791 1792 devinfo->feature_conf_id = config_id; 1793 1794 return count; 1795 } 1796 1797 static DEVICE_ATTR_RW(feature_config_id); 1798 1799 static ssize_t feature_config_value_show(struct device *device, 1800 struct device_attribute *attr, 1801 char *buf) 1802 { 1803 int ret; 1804 u32 ret_payload[PAYLOAD_ARG_CNT]; 1805 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1806 1807 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id, 1808 ret_payload); 1809 if (ret) 1810 return ret; 1811 1812 return sysfs_emit(buf, "%d\n", ret_payload[1]); 1813 } 1814 1815 static ssize_t feature_config_value_store(struct device *device, 1816 struct device_attribute *attr, 1817 const char *buf, size_t count) 1818 { 1819 u32 value; 1820 int ret; 1821 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device); 1822 1823 if (!buf) 1824 return -EINVAL; 1825 1826 ret = kstrtou32(buf, 10, &value); 1827 if (ret) 1828 return ret; 1829 1830 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id, 1831 value); 1832 if (ret) 1833 return ret; 1834 1835 return count; 1836 } 1837 1838 static DEVICE_ATTR_RW(feature_config_value); 1839 1840 static struct attribute *zynqmp_firmware_attrs[] = { 1841 &dev_attr_ggs0.attr, 1842 &dev_attr_ggs1.attr, 1843 &dev_attr_ggs2.attr, 1844 &dev_attr_ggs3.attr, 1845 &dev_attr_pggs0.attr, 1846 &dev_attr_pggs1.attr, 1847 &dev_attr_pggs2.attr, 1848 &dev_attr_pggs3.attr, 1849 &dev_attr_shutdown_scope.attr, 1850 &dev_attr_health_status.attr, 1851 &dev_attr_feature_config_id.attr, 1852 &dev_attr_feature_config_value.attr, 1853 NULL, 1854 }; 1855 1856 ATTRIBUTE_GROUPS(zynqmp_firmware); 1857 1858 static int zynqmp_firmware_probe(struct platform_device *pdev) 1859 { 1860 struct device *dev = &pdev->dev; 1861 struct zynqmp_devinfo *devinfo; 1862 int ret; 1863 1864 ret = get_set_conduit_method(dev->of_node); 1865 if (ret) 1866 return ret; 1867 1868 ret = do_feature_check_call(PM_FEATURE_CHECK); 1869 if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1)) 1870 feature_check_enabled = true; 1871 1872 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL); 1873 if (!devinfo) 1874 return -ENOMEM; 1875 1876 devinfo->dev = dev; 1877 1878 platform_set_drvdata(pdev, devinfo); 1879 1880 /* Check PM API version number */ 1881 ret = zynqmp_pm_get_api_version(&pm_api_version); 1882 if (ret) 1883 return ret; 1884 1885 if (pm_api_version < ZYNQMP_PM_VERSION) { 1886 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n", 1887 __func__, 1888 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR, 1889 pm_api_version >> 16, pm_api_version & 0xFFFF); 1890 } 1891 1892 pr_info("%s Platform Management API v%d.%d\n", __func__, 1893 pm_api_version >> 16, pm_api_version & 0xFFFF); 1894 1895 /* Get the Family code and sub family code of platform */ 1896 ret = zynqmp_pm_get_family_info(&pm_family_code, &pm_sub_family_code); 1897 if (ret < 0) 1898 return ret; 1899 1900 /* Check trustzone version number */ 1901 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version); 1902 if (ret) 1903 panic("Legacy trustzone found without version support\n"); 1904 1905 if (pm_tz_version < ZYNQMP_TZ_VERSION) 1906 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n", 1907 __func__, 1908 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR, 1909 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1910 1911 pr_info("%s Trustzone version v%d.%d\n", __func__, 1912 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1913 1914 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, 1915 ARRAY_SIZE(firmware_devs), NULL, 0, NULL); 1916 if (ret) { 1917 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret); 1918 return ret; 1919 } 1920 1921 zynqmp_pm_api_debugfs_init(); 1922 1923 if (pm_family_code == VERSAL_FAMILY_CODE) { 1924 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager", 1925 -1, NULL, 0); 1926 if (IS_ERR(em_dev)) 1927 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n"); 1928 } 1929 1930 return of_platform_populate(dev->of_node, NULL, NULL, dev); 1931 } 1932 1933 static void zynqmp_firmware_remove(struct platform_device *pdev) 1934 { 1935 struct pm_api_feature_data *feature_data; 1936 struct hlist_node *tmp; 1937 int i; 1938 1939 mfd_remove_devices(&pdev->dev); 1940 zynqmp_pm_api_debugfs_exit(); 1941 1942 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) { 1943 hash_del(&feature_data->hentry); 1944 kfree(feature_data); 1945 } 1946 1947 platform_device_unregister(em_dev); 1948 } 1949 1950 static const struct of_device_id zynqmp_firmware_of_match[] = { 1951 {.compatible = "xlnx,zynqmp-firmware"}, 1952 {.compatible = "xlnx,versal-firmware"}, 1953 {}, 1954 }; 1955 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match); 1956 1957 static struct platform_driver zynqmp_firmware_driver = { 1958 .driver = { 1959 .name = "zynqmp_firmware", 1960 .of_match_table = zynqmp_firmware_of_match, 1961 .dev_groups = zynqmp_firmware_groups, 1962 }, 1963 .probe = zynqmp_firmware_probe, 1964 .remove_new = zynqmp_firmware_remove, 1965 }; 1966 module_platform_driver(zynqmp_firmware_driver); 1967