1*08314e7cSSumit Garg /* SPDX-License-Identifier: GPL-2.0 */ 2*08314e7cSSumit Garg /* 3*08314e7cSSumit Garg * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4*08314e7cSSumit Garg */ 5*08314e7cSSumit Garg 6*08314e7cSSumit Garg #ifndef __QCOM_PAS_INT_H 7*08314e7cSSumit Garg #define __QCOM_PAS_INT_H 8*08314e7cSSumit Garg 9*08314e7cSSumit Garg struct device; 10*08314e7cSSumit Garg 11*08314e7cSSumit Garg /** 12*08314e7cSSumit Garg * struct qcom_pas_ops - Qcom Peripheral Authentication Service (PAS) ops 13*08314e7cSSumit Garg * @drv_name: PAS driver name. 14*08314e7cSSumit Garg * @dev: PAS device pointer. 15*08314e7cSSumit Garg * @supported: Peripheral supported callback. 16*08314e7cSSumit Garg * @init_image: Peripheral image initialization callback. 17*08314e7cSSumit Garg * @mem_setup: Peripheral memory setup callback. 18*08314e7cSSumit Garg * @get_rsc_table: Peripheral get resource table callback. 19*08314e7cSSumit Garg * @prepare_and_auth_reset: Peripheral prepare firmware authentication and 20*08314e7cSSumit Garg * reset callback. 21*08314e7cSSumit Garg * @auth_and_reset: Peripheral firmware authentication and reset 22*08314e7cSSumit Garg * callback. 23*08314e7cSSumit Garg * @set_remote_state: Peripheral set remote state callback. 24*08314e7cSSumit Garg * @shutdown: Peripheral shutdown callback. 25*08314e7cSSumit Garg * @metadata_release: Image metadata release callback. 26*08314e7cSSumit Garg */ 27*08314e7cSSumit Garg struct qcom_pas_ops { 28*08314e7cSSumit Garg const char *drv_name; 29*08314e7cSSumit Garg struct device *dev; 30*08314e7cSSumit Garg bool (*supported)(struct device *dev, u32 pas_id); 31*08314e7cSSumit Garg int (*init_image)(struct device *dev, u32 pas_id, const void *metadata, 32*08314e7cSSumit Garg size_t size, struct qcom_pas_context *ctx); 33*08314e7cSSumit Garg int (*mem_setup)(struct device *dev, u32 pas_id, phys_addr_t addr, 34*08314e7cSSumit Garg phys_addr_t size); 35*08314e7cSSumit Garg void *(*get_rsc_table)(struct device *dev, struct qcom_pas_context *ctx, 36*08314e7cSSumit Garg void *input_rt, size_t input_rt_size, 37*08314e7cSSumit Garg size_t *output_rt_size); 38*08314e7cSSumit Garg int (*prepare_and_auth_reset)(struct device *dev, 39*08314e7cSSumit Garg struct qcom_pas_context *ctx); 40*08314e7cSSumit Garg int (*auth_and_reset)(struct device *dev, u32 pas_id); 41*08314e7cSSumit Garg int (*set_remote_state)(struct device *dev, u32 state, u32 pas_id); 42*08314e7cSSumit Garg int (*shutdown)(struct device *dev, u32 pas_id); 43*08314e7cSSumit Garg void (*metadata_release)(struct device *dev, 44*08314e7cSSumit Garg struct qcom_pas_context *ctx); 45*08314e7cSSumit Garg }; 46*08314e7cSSumit Garg 47*08314e7cSSumit Garg void qcom_pas_ops_register(struct qcom_pas_ops *ops); 48*08314e7cSSumit Garg void qcom_pas_ops_unregister(void); 49*08314e7cSSumit Garg 50*08314e7cSSumit Garg #endif /* __QCOM_PAS_INT_H */ 51