1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Isochronous I/O functionality: 4 * - Isochronous DMA context management 5 * - Isochronous bus resource management (channels, bandwidth), client side 6 * 7 * Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net> 8 */ 9 10 #include <linux/dma-mapping.h> 11 #include <linux/errno.h> 12 #include <linux/firewire.h> 13 #include <linux/firewire-constants.h> 14 #include <linux/kernel.h> 15 #include <linux/mm.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 #include <linux/vmalloc.h> 19 #include <linux/export.h> 20 21 #include <asm/byteorder.h> 22 23 #include "core.h" 24 25 #include <trace/events/firewire.h> 26 27 /* 28 * Isochronous DMA context management 29 */ 30 31 int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count) 32 { 33 int i; 34 35 buffer->page_count = 0; 36 buffer->page_count_mapped = 0; 37 buffer->pages = kmalloc_array(page_count, sizeof(buffer->pages[0]), 38 GFP_KERNEL); 39 if (buffer->pages == NULL) 40 return -ENOMEM; 41 42 for (i = 0; i < page_count; i++) { 43 buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO); 44 if (buffer->pages[i] == NULL) 45 break; 46 } 47 buffer->page_count = i; 48 if (i < page_count) { 49 fw_iso_buffer_destroy(buffer, NULL); 50 return -ENOMEM; 51 } 52 53 return 0; 54 } 55 56 int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card, 57 enum dma_data_direction direction) 58 { 59 dma_addr_t address; 60 int i; 61 62 buffer->direction = direction; 63 64 for (i = 0; i < buffer->page_count; i++) { 65 address = dma_map_page(card->device, buffer->pages[i], 66 0, PAGE_SIZE, direction); 67 if (dma_mapping_error(card->device, address)) 68 break; 69 70 set_page_private(buffer->pages[i], address); 71 } 72 buffer->page_count_mapped = i; 73 if (i < buffer->page_count) 74 return -ENOMEM; 75 76 return 0; 77 } 78 79 int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card, 80 int page_count, enum dma_data_direction direction) 81 { 82 int ret; 83 84 ret = fw_iso_buffer_alloc(buffer, page_count); 85 if (ret < 0) 86 return ret; 87 88 ret = fw_iso_buffer_map_dma(buffer, card, direction); 89 if (ret < 0) 90 fw_iso_buffer_destroy(buffer, card); 91 92 return ret; 93 } 94 EXPORT_SYMBOL(fw_iso_buffer_init); 95 96 void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer, 97 struct fw_card *card) 98 { 99 int i; 100 dma_addr_t address; 101 102 for (i = 0; i < buffer->page_count_mapped; i++) { 103 address = page_private(buffer->pages[i]); 104 dma_unmap_page(card->device, address, 105 PAGE_SIZE, buffer->direction); 106 } 107 for (i = 0; i < buffer->page_count; i++) 108 __free_page(buffer->pages[i]); 109 110 kfree(buffer->pages); 111 buffer->pages = NULL; 112 buffer->page_count = 0; 113 buffer->page_count_mapped = 0; 114 } 115 EXPORT_SYMBOL(fw_iso_buffer_destroy); 116 117 /* Convert DMA address to offset into virtually contiguous buffer. */ 118 size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed) 119 { 120 size_t i; 121 dma_addr_t address; 122 ssize_t offset; 123 124 for (i = 0; i < buffer->page_count; i++) { 125 address = page_private(buffer->pages[i]); 126 offset = (ssize_t)completed - (ssize_t)address; 127 if (offset > 0 && offset <= PAGE_SIZE) 128 return (i << PAGE_SHIFT) + offset; 129 } 130 131 return 0; 132 } 133 134 static void flush_completions_work(struct work_struct *work) 135 { 136 struct fw_iso_context *ctx = container_of(work, struct fw_iso_context, work); 137 138 fw_iso_context_flush_completions(ctx); 139 } 140 141 struct fw_iso_context *fw_iso_context_create(struct fw_card *card, 142 int type, int channel, int speed, size_t header_size, 143 fw_iso_callback_t callback, void *callback_data) 144 { 145 struct fw_iso_context *ctx; 146 147 ctx = card->driver->allocate_iso_context(card, 148 type, channel, header_size); 149 if (IS_ERR(ctx)) 150 return ctx; 151 152 ctx->card = card; 153 ctx->type = type; 154 ctx->channel = channel; 155 ctx->speed = speed; 156 ctx->header_size = header_size; 157 ctx->callback.sc = callback; 158 ctx->callback_data = callback_data; 159 INIT_WORK(&ctx->work, flush_completions_work); 160 161 trace_isoc_outbound_allocate(ctx, channel, speed); 162 trace_isoc_inbound_single_allocate(ctx, channel, header_size); 163 trace_isoc_inbound_multiple_allocate(ctx); 164 165 return ctx; 166 } 167 EXPORT_SYMBOL(fw_iso_context_create); 168 169 void fw_iso_context_destroy(struct fw_iso_context *ctx) 170 { 171 trace_isoc_outbound_destroy(ctx); 172 trace_isoc_inbound_single_destroy(ctx); 173 trace_isoc_inbound_multiple_destroy(ctx); 174 175 ctx->card->driver->free_iso_context(ctx); 176 } 177 EXPORT_SYMBOL(fw_iso_context_destroy); 178 179 int fw_iso_context_start(struct fw_iso_context *ctx, 180 int cycle, int sync, int tags) 181 { 182 trace_isoc_outbound_start(ctx, cycle); 183 trace_isoc_inbound_single_start(ctx, cycle, sync, tags); 184 trace_isoc_inbound_multiple_start(ctx, cycle, sync, tags); 185 186 return ctx->card->driver->start_iso(ctx, cycle, sync, tags); 187 } 188 EXPORT_SYMBOL(fw_iso_context_start); 189 190 int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels) 191 { 192 trace_isoc_inbound_multiple_channels(ctx, *channels); 193 194 return ctx->card->driver->set_iso_channels(ctx, channels); 195 } 196 197 int fw_iso_context_queue(struct fw_iso_context *ctx, 198 struct fw_iso_packet *packet, 199 struct fw_iso_buffer *buffer, 200 unsigned long payload) 201 { 202 trace_isoc_outbound_queue(ctx, payload, packet); 203 trace_isoc_inbound_single_queue(ctx, payload, packet); 204 trace_isoc_inbound_multiple_queue(ctx, payload, packet); 205 206 return ctx->card->driver->queue_iso(ctx, packet, buffer, payload); 207 } 208 EXPORT_SYMBOL(fw_iso_context_queue); 209 210 void fw_iso_context_queue_flush(struct fw_iso_context *ctx) 211 { 212 trace_isoc_outbound_flush(ctx); 213 trace_isoc_inbound_single_flush(ctx); 214 trace_isoc_inbound_multiple_flush(ctx); 215 216 ctx->card->driver->flush_queue_iso(ctx); 217 } 218 EXPORT_SYMBOL(fw_iso_context_queue_flush); 219 220 /** 221 * fw_iso_context_flush_completions() - process isochronous context in current process context. 222 * @ctx: the isochronous context 223 * 224 * Process the isochronous context in the current process context. The registered callback function 225 * is called if some packets have been already transferred since the last time. If it is required 226 * to process the context asynchronously, fw_iso_context_schedule_flush_completions() is available 227 * instead. 228 * 229 * Context: Process context. 230 */ 231 int fw_iso_context_flush_completions(struct fw_iso_context *ctx) 232 { 233 trace_isoc_outbound_flush_completions(ctx); 234 trace_isoc_inbound_single_flush_completions(ctx); 235 trace_isoc_inbound_multiple_flush_completions(ctx); 236 237 return ctx->card->driver->flush_iso_completions(ctx); 238 } 239 EXPORT_SYMBOL(fw_iso_context_flush_completions); 240 241 int fw_iso_context_stop(struct fw_iso_context *ctx) 242 { 243 int err; 244 245 trace_isoc_outbound_stop(ctx); 246 trace_isoc_inbound_single_stop(ctx); 247 trace_isoc_inbound_multiple_stop(ctx); 248 249 might_sleep(); 250 251 // Avoid dead lock due to programming mistake. 252 if (WARN_ON_ONCE(current_work() == &ctx->work)) 253 return 0; 254 255 err = ctx->card->driver->stop_iso(ctx); 256 257 cancel_work_sync(&ctx->work); 258 259 return err; 260 } 261 EXPORT_SYMBOL(fw_iso_context_stop); 262 263 /* 264 * Isochronous bus resource management (channels, bandwidth), client side 265 */ 266 267 static int manage_bandwidth(struct fw_card *card, int irm_id, int generation, 268 int bandwidth, bool allocate) 269 { 270 int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0; 271 __be32 data[2]; 272 273 /* 274 * On a 1394a IRM with low contention, try < 1 is enough. 275 * On a 1394-1995 IRM, we need at least try < 2. 276 * Let's just do try < 5. 277 */ 278 for (try = 0; try < 5; try++) { 279 new = allocate ? old - bandwidth : old + bandwidth; 280 if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL) 281 return -EBUSY; 282 283 data[0] = cpu_to_be32(old); 284 data[1] = cpu_to_be32(new); 285 switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP, 286 irm_id, generation, SCODE_100, 287 CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE, 288 data, 8)) { 289 case RCODE_GENERATION: 290 /* A generation change frees all bandwidth. */ 291 return allocate ? -EAGAIN : bandwidth; 292 293 case RCODE_COMPLETE: 294 if (be32_to_cpup(data) == old) 295 return bandwidth; 296 297 old = be32_to_cpup(data); 298 /* Fall through. */ 299 } 300 } 301 302 return -EIO; 303 } 304 305 static int manage_channel(struct fw_card *card, int irm_id, int generation, 306 u32 channels_mask, u64 offset, bool allocate) 307 { 308 __be32 bit, all, old; 309 __be32 data[2]; 310 int channel, ret = -EIO, retry = 5; 311 312 old = all = allocate ? cpu_to_be32(~0) : 0; 313 314 for (channel = 0; channel < 32; channel++) { 315 if (!(channels_mask & 1 << channel)) 316 continue; 317 318 ret = -EBUSY; 319 320 bit = cpu_to_be32(1 << (31 - channel)); 321 if ((old & bit) != (all & bit)) 322 continue; 323 324 data[0] = old; 325 data[1] = old ^ bit; 326 switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP, 327 irm_id, generation, SCODE_100, 328 offset, data, 8)) { 329 case RCODE_GENERATION: 330 /* A generation change frees all channels. */ 331 return allocate ? -EAGAIN : channel; 332 333 case RCODE_COMPLETE: 334 if (data[0] == old) 335 return channel; 336 337 old = data[0]; 338 339 /* Is the IRM 1394a-2000 compliant? */ 340 if ((data[0] & bit) == (data[1] & bit)) 341 continue; 342 343 fallthrough; /* It's a 1394-1995 IRM, retry */ 344 default: 345 if (retry) { 346 retry--; 347 channel--; 348 } else { 349 ret = -EIO; 350 } 351 } 352 } 353 354 return ret; 355 } 356 357 static void deallocate_channel(struct fw_card *card, int irm_id, 358 int generation, int channel) 359 { 360 u32 mask; 361 u64 offset; 362 363 mask = channel < 32 ? 1 << channel : 1 << (channel - 32); 364 offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI : 365 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO; 366 367 manage_channel(card, irm_id, generation, mask, offset, false); 368 } 369 370 /** 371 * fw_iso_resource_manage() - Allocate or deallocate a channel and/or bandwidth 372 * @card: card interface for this action 373 * @generation: bus generation 374 * @channels_mask: bitmask for channel allocation 375 * @channel: pointer for returning channel allocation result 376 * @bandwidth: pointer for returning bandwidth allocation result 377 * @allocate: whether to allocate (true) or deallocate (false) 378 * 379 * In parameters: card, generation, channels_mask, bandwidth, allocate 380 * Out parameters: channel, bandwidth 381 * 382 * This function blocks (sleeps) during communication with the IRM. 383 * 384 * Allocates or deallocates at most one channel out of channels_mask. 385 * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0. 386 * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for 387 * channel 0 and LSB for channel 63.) 388 * Allocates or deallocates as many bandwidth allocation units as specified. 389 * 390 * Returns channel < 0 if no channel was allocated or deallocated. 391 * Returns bandwidth = 0 if no bandwidth was allocated or deallocated. 392 * 393 * If generation is stale, deallocations succeed but allocations fail with 394 * channel = -EAGAIN. 395 * 396 * If channel allocation fails, no bandwidth will be allocated either. 397 * If bandwidth allocation fails, no channel will be allocated either. 398 * But deallocations of channel and bandwidth are tried independently 399 * of each other's success. 400 */ 401 void fw_iso_resource_manage(struct fw_card *card, int generation, 402 u64 channels_mask, int *channel, int *bandwidth, 403 bool allocate) 404 { 405 u32 channels_hi = channels_mask; /* channels 31...0 */ 406 u32 channels_lo = channels_mask >> 32; /* channels 63...32 */ 407 int irm_id, ret, c = -EINVAL; 408 409 scoped_guard(spinlock_irq, &card->lock) 410 irm_id = card->irm_node->node_id; 411 412 if (channels_hi) 413 c = manage_channel(card, irm_id, generation, channels_hi, 414 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI, 415 allocate); 416 if (channels_lo && c < 0) { 417 c = manage_channel(card, irm_id, generation, channels_lo, 418 CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO, 419 allocate); 420 if (c >= 0) 421 c += 32; 422 } 423 *channel = c; 424 425 if (allocate && channels_mask != 0 && c < 0) 426 *bandwidth = 0; 427 428 if (*bandwidth == 0) 429 return; 430 431 ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate); 432 if (ret < 0) 433 *bandwidth = 0; 434 435 if (allocate && ret < 0) { 436 if (c >= 0) 437 deallocate_channel(card, irm_id, generation, c); 438 *channel = ret; 439 } 440 } 441 EXPORT_SYMBOL(fw_iso_resource_manage); 442