xref: /linux/drivers/firewire/core-iso.c (revision 5c49cc0ed405cadb60d8c4484f95ffdaf7c6ec5c)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Isochronous I/O functionality:
4  *   - Isochronous DMA context management
5  *   - Isochronous bus resource management (channels, bandwidth), client side
6  *
7  * Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net>
8  */
9 
10 #include <linux/dma-mapping.h>
11 #include <linux/errno.h>
12 #include <linux/firewire.h>
13 #include <linux/firewire-constants.h>
14 #include <linux/kernel.h>
15 #include <linux/mm.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/vmalloc.h>
19 #include <linux/export.h>
20 
21 #include <asm/byteorder.h>
22 
23 #include "core.h"
24 
25 #include <trace/events/firewire.h>
26 
27 /*
28  * Isochronous DMA context management
29  */
30 
31 int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count)
32 {
33 	int i;
34 
35 	buffer->page_count = 0;
36 	buffer->page_count_mapped = 0;
37 	buffer->pages = kmalloc_array(page_count, sizeof(buffer->pages[0]),
38 				      GFP_KERNEL);
39 	if (buffer->pages == NULL)
40 		return -ENOMEM;
41 
42 	for (i = 0; i < page_count; i++) {
43 		buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
44 		if (buffer->pages[i] == NULL)
45 			break;
46 	}
47 	buffer->page_count = i;
48 	if (i < page_count) {
49 		fw_iso_buffer_destroy(buffer, NULL);
50 		return -ENOMEM;
51 	}
52 
53 	return 0;
54 }
55 
56 int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card,
57 			  enum dma_data_direction direction)
58 {
59 	dma_addr_t address;
60 	int i;
61 
62 	buffer->direction = direction;
63 
64 	for (i = 0; i < buffer->page_count; i++) {
65 		address = dma_map_page(card->device, buffer->pages[i],
66 				       0, PAGE_SIZE, direction);
67 		if (dma_mapping_error(card->device, address))
68 			break;
69 
70 		set_page_private(buffer->pages[i], address);
71 	}
72 	buffer->page_count_mapped = i;
73 	if (i < buffer->page_count)
74 		return -ENOMEM;
75 
76 	return 0;
77 }
78 
79 int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,
80 		       int page_count, enum dma_data_direction direction)
81 {
82 	int ret;
83 
84 	ret = fw_iso_buffer_alloc(buffer, page_count);
85 	if (ret < 0)
86 		return ret;
87 
88 	ret = fw_iso_buffer_map_dma(buffer, card, direction);
89 	if (ret < 0)
90 		fw_iso_buffer_destroy(buffer, card);
91 
92 	return ret;
93 }
94 EXPORT_SYMBOL(fw_iso_buffer_init);
95 
96 void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,
97 			   struct fw_card *card)
98 {
99 	int i;
100 	dma_addr_t address;
101 
102 	for (i = 0; i < buffer->page_count_mapped; i++) {
103 		address = page_private(buffer->pages[i]);
104 		dma_unmap_page(card->device, address,
105 			       PAGE_SIZE, buffer->direction);
106 	}
107 	for (i = 0; i < buffer->page_count; i++)
108 		__free_page(buffer->pages[i]);
109 
110 	kfree(buffer->pages);
111 	buffer->pages = NULL;
112 	buffer->page_count = 0;
113 	buffer->page_count_mapped = 0;
114 }
115 EXPORT_SYMBOL(fw_iso_buffer_destroy);
116 
117 /* Convert DMA address to offset into virtually contiguous buffer. */
118 size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed)
119 {
120 	size_t i;
121 	dma_addr_t address;
122 	ssize_t offset;
123 
124 	for (i = 0; i < buffer->page_count; i++) {
125 		address = page_private(buffer->pages[i]);
126 		offset = (ssize_t)completed - (ssize_t)address;
127 		if (offset > 0 && offset <= PAGE_SIZE)
128 			return (i << PAGE_SHIFT) + offset;
129 	}
130 
131 	return 0;
132 }
133 
134 struct fw_iso_context *fw_iso_context_create(struct fw_card *card,
135 		int type, int channel, int speed, size_t header_size,
136 		fw_iso_callback_t callback, void *callback_data)
137 {
138 	struct fw_iso_context *ctx;
139 
140 	ctx = card->driver->allocate_iso_context(card,
141 						 type, channel, header_size);
142 	if (IS_ERR(ctx))
143 		return ctx;
144 
145 	ctx->card = card;
146 	ctx->type = type;
147 	ctx->channel = channel;
148 	ctx->speed = speed;
149 	ctx->header_size = header_size;
150 	ctx->callback.sc = callback;
151 	ctx->callback_data = callback_data;
152 
153 	trace_isoc_outbound_allocate(ctx, channel, speed);
154 	trace_isoc_inbound_single_allocate(ctx, channel, header_size);
155 	trace_isoc_inbound_multiple_allocate(ctx);
156 
157 	return ctx;
158 }
159 EXPORT_SYMBOL(fw_iso_context_create);
160 
161 void fw_iso_context_destroy(struct fw_iso_context *ctx)
162 {
163 	trace_isoc_outbound_destroy(ctx);
164 	trace_isoc_inbound_single_destroy(ctx);
165 	trace_isoc_inbound_multiple_destroy(ctx);
166 
167 	ctx->card->driver->free_iso_context(ctx);
168 }
169 EXPORT_SYMBOL(fw_iso_context_destroy);
170 
171 int fw_iso_context_start(struct fw_iso_context *ctx,
172 			 int cycle, int sync, int tags)
173 {
174 	trace_isoc_outbound_start(ctx, cycle);
175 	trace_isoc_inbound_single_start(ctx, cycle, sync, tags);
176 	trace_isoc_inbound_multiple_start(ctx, cycle, sync, tags);
177 
178 	return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
179 }
180 EXPORT_SYMBOL(fw_iso_context_start);
181 
182 int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels)
183 {
184 	trace_isoc_inbound_multiple_channels(ctx, *channels);
185 
186 	return ctx->card->driver->set_iso_channels(ctx, channels);
187 }
188 
189 int fw_iso_context_queue(struct fw_iso_context *ctx,
190 			 struct fw_iso_packet *packet,
191 			 struct fw_iso_buffer *buffer,
192 			 unsigned long payload)
193 {
194 	trace_isoc_outbound_queue(ctx, payload, packet);
195 	trace_isoc_inbound_single_queue(ctx, payload, packet);
196 	trace_isoc_inbound_multiple_queue(ctx, payload, packet);
197 
198 	return ctx->card->driver->queue_iso(ctx, packet, buffer, payload);
199 }
200 EXPORT_SYMBOL(fw_iso_context_queue);
201 
202 void fw_iso_context_queue_flush(struct fw_iso_context *ctx)
203 {
204 	trace_isoc_outbound_flush(ctx);
205 	trace_isoc_inbound_single_flush(ctx);
206 	trace_isoc_inbound_multiple_flush(ctx);
207 
208 	ctx->card->driver->flush_queue_iso(ctx);
209 }
210 EXPORT_SYMBOL(fw_iso_context_queue_flush);
211 
212 int fw_iso_context_flush_completions(struct fw_iso_context *ctx)
213 {
214 	int err;
215 
216 	trace_isoc_outbound_flush_completions(ctx);
217 	trace_isoc_inbound_single_flush_completions(ctx);
218 	trace_isoc_inbound_multiple_flush_completions(ctx);
219 
220 	might_sleep();
221 
222 	// Avoid dead lock due to programming mistake.
223 	if (WARN_ON(current_work() == &ctx->work))
224 		return 0;
225 
226 	disable_work_sync(&ctx->work);
227 
228 	err = ctx->card->driver->flush_iso_completions(ctx);
229 
230 	enable_work(&ctx->work);
231 
232 	return err;
233 }
234 EXPORT_SYMBOL(fw_iso_context_flush_completions);
235 
236 int fw_iso_context_stop(struct fw_iso_context *ctx)
237 {
238 	int err;
239 
240 	trace_isoc_outbound_stop(ctx);
241 	trace_isoc_inbound_single_stop(ctx);
242 	trace_isoc_inbound_multiple_stop(ctx);
243 
244 	might_sleep();
245 
246 	// Avoid dead lock due to programming mistake.
247 	if (WARN_ON(current_work() == &ctx->work))
248 		return 0;
249 
250 	err = ctx->card->driver->stop_iso(ctx);
251 
252 	cancel_work_sync(&ctx->work);
253 
254 	return err;
255 }
256 EXPORT_SYMBOL(fw_iso_context_stop);
257 
258 /*
259  * Isochronous bus resource management (channels, bandwidth), client side
260  */
261 
262 static int manage_bandwidth(struct fw_card *card, int irm_id, int generation,
263 			    int bandwidth, bool allocate)
264 {
265 	int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0;
266 	__be32 data[2];
267 
268 	/*
269 	 * On a 1394a IRM with low contention, try < 1 is enough.
270 	 * On a 1394-1995 IRM, we need at least try < 2.
271 	 * Let's just do try < 5.
272 	 */
273 	for (try = 0; try < 5; try++) {
274 		new = allocate ? old - bandwidth : old + bandwidth;
275 		if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL)
276 			return -EBUSY;
277 
278 		data[0] = cpu_to_be32(old);
279 		data[1] = cpu_to_be32(new);
280 		switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
281 				irm_id, generation, SCODE_100,
282 				CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE,
283 				data, 8)) {
284 		case RCODE_GENERATION:
285 			/* A generation change frees all bandwidth. */
286 			return allocate ? -EAGAIN : bandwidth;
287 
288 		case RCODE_COMPLETE:
289 			if (be32_to_cpup(data) == old)
290 				return bandwidth;
291 
292 			old = be32_to_cpup(data);
293 			/* Fall through. */
294 		}
295 	}
296 
297 	return -EIO;
298 }
299 
300 static int manage_channel(struct fw_card *card, int irm_id, int generation,
301 		u32 channels_mask, u64 offset, bool allocate)
302 {
303 	__be32 bit, all, old;
304 	__be32 data[2];
305 	int channel, ret = -EIO, retry = 5;
306 
307 	old = all = allocate ? cpu_to_be32(~0) : 0;
308 
309 	for (channel = 0; channel < 32; channel++) {
310 		if (!(channels_mask & 1 << channel))
311 			continue;
312 
313 		ret = -EBUSY;
314 
315 		bit = cpu_to_be32(1 << (31 - channel));
316 		if ((old & bit) != (all & bit))
317 			continue;
318 
319 		data[0] = old;
320 		data[1] = old ^ bit;
321 		switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
322 					   irm_id, generation, SCODE_100,
323 					   offset, data, 8)) {
324 		case RCODE_GENERATION:
325 			/* A generation change frees all channels. */
326 			return allocate ? -EAGAIN : channel;
327 
328 		case RCODE_COMPLETE:
329 			if (data[0] == old)
330 				return channel;
331 
332 			old = data[0];
333 
334 			/* Is the IRM 1394a-2000 compliant? */
335 			if ((data[0] & bit) == (data[1] & bit))
336 				continue;
337 
338 			fallthrough;	/* It's a 1394-1995 IRM, retry */
339 		default:
340 			if (retry) {
341 				retry--;
342 				channel--;
343 			} else {
344 				ret = -EIO;
345 			}
346 		}
347 	}
348 
349 	return ret;
350 }
351 
352 static void deallocate_channel(struct fw_card *card, int irm_id,
353 			       int generation, int channel)
354 {
355 	u32 mask;
356 	u64 offset;
357 
358 	mask = channel < 32 ? 1 << channel : 1 << (channel - 32);
359 	offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI :
360 				CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO;
361 
362 	manage_channel(card, irm_id, generation, mask, offset, false);
363 }
364 
365 /**
366  * fw_iso_resource_manage() - Allocate or deallocate a channel and/or bandwidth
367  * @card: card interface for this action
368  * @generation: bus generation
369  * @channels_mask: bitmask for channel allocation
370  * @channel: pointer for returning channel allocation result
371  * @bandwidth: pointer for returning bandwidth allocation result
372  * @allocate: whether to allocate (true) or deallocate (false)
373  *
374  * In parameters: card, generation, channels_mask, bandwidth, allocate
375  * Out parameters: channel, bandwidth
376  *
377  * This function blocks (sleeps) during communication with the IRM.
378  *
379  * Allocates or deallocates at most one channel out of channels_mask.
380  * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0.
381  * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for
382  * channel 0 and LSB for channel 63.)
383  * Allocates or deallocates as many bandwidth allocation units as specified.
384  *
385  * Returns channel < 0 if no channel was allocated or deallocated.
386  * Returns bandwidth = 0 if no bandwidth was allocated or deallocated.
387  *
388  * If generation is stale, deallocations succeed but allocations fail with
389  * channel = -EAGAIN.
390  *
391  * If channel allocation fails, no bandwidth will be allocated either.
392  * If bandwidth allocation fails, no channel will be allocated either.
393  * But deallocations of channel and bandwidth are tried independently
394  * of each other's success.
395  */
396 void fw_iso_resource_manage(struct fw_card *card, int generation,
397 			    u64 channels_mask, int *channel, int *bandwidth,
398 			    bool allocate)
399 {
400 	u32 channels_hi = channels_mask;	/* channels 31...0 */
401 	u32 channels_lo = channels_mask >> 32;	/* channels 63...32 */
402 	int irm_id, ret, c = -EINVAL;
403 
404 	scoped_guard(spinlock_irq, &card->lock)
405 		irm_id = card->irm_node->node_id;
406 
407 	if (channels_hi)
408 		c = manage_channel(card, irm_id, generation, channels_hi,
409 				CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI,
410 				allocate);
411 	if (channels_lo && c < 0) {
412 		c = manage_channel(card, irm_id, generation, channels_lo,
413 				CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO,
414 				allocate);
415 		if (c >= 0)
416 			c += 32;
417 	}
418 	*channel = c;
419 
420 	if (allocate && channels_mask != 0 && c < 0)
421 		*bandwidth = 0;
422 
423 	if (*bandwidth == 0)
424 		return;
425 
426 	ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate);
427 	if (ret < 0)
428 		*bandwidth = 0;
429 
430 	if (allocate && ret < 0) {
431 		if (c >= 0)
432 			deallocate_channel(card, irm_id, generation, c);
433 		*channel = ret;
434 	}
435 }
436 EXPORT_SYMBOL(fw_iso_resource_manage);
437