1 /* 2 * Freescale Memory Controller kernel module 3 * 4 * Author: York Sun <york.sun@nxp.com> 5 * 6 * Copyright 2016 NXP Semiconductor 7 * 8 * Derived from mpc85xx_edac.c 9 * Author: Dave Jiang <djiang@mvista.com> 10 * 11 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under 12 * the terms of the GNU General Public License version 2. This program 13 * is licensed "as is" without any warranty of any kind, whether express 14 * or implied. 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include "edac_module.h" 20 #include "fsl_ddr_edac.h" 21 22 static const struct of_device_id fsl_ddr_mc_err_of_match[] = { 23 { .compatible = "fsl,qoriq-memory-controller", }, 24 {}, 25 }; 26 MODULE_DEVICE_TABLE(of, fsl_ddr_mc_err_of_match); 27 28 static struct platform_driver fsl_ddr_mc_err_driver = { 29 .probe = fsl_mc_err_probe, 30 .remove = fsl_mc_err_remove, 31 .driver = { 32 .name = "fsl_ddr_mc_err", 33 .of_match_table = fsl_ddr_mc_err_of_match, 34 }, 35 }; 36 37 static int __init fsl_ddr_mc_init(void) 38 { 39 int res; 40 41 /* make sure error reporting method is sane */ 42 switch (edac_op_state) { 43 case EDAC_OPSTATE_POLL: 44 case EDAC_OPSTATE_INT: 45 break; 46 default: 47 edac_op_state = EDAC_OPSTATE_INT; 48 break; 49 } 50 51 res = platform_driver_register(&fsl_ddr_mc_err_driver); 52 if (res) { 53 pr_err("MC fails to register\n"); 54 return res; 55 } 56 57 return 0; 58 } 59 60 module_init(fsl_ddr_mc_init); 61 62 static void __exit fsl_ddr_mc_exit(void) 63 { 64 platform_driver_unregister(&fsl_ddr_mc_err_driver); 65 } 66 67 module_exit(fsl_ddr_mc_exit); 68 69 MODULE_LICENSE("GPL"); 70 MODULE_AUTHOR("NXP Semiconductor"); 71 module_param(edac_op_state, int, 0444); 72 MODULE_PARM_DESC(edac_op_state, 73 "EDAC Error Reporting state: 0=Poll, 2=Interrupt"); 74