1 /* 2 * edac_mc kernel module 3 * (C) 2005-2007 Linux Networx (http://lnxi.com) 4 * 5 * This file may be distributed under the terms of the 6 * GNU General Public License. 7 * 8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com 9 * 10 * (c) 2012-2013 - Mauro Carvalho Chehab 11 * The entire API were re-written, and ported to use struct device 12 * 13 */ 14 15 #include <linux/ctype.h> 16 #include <linux/slab.h> 17 #include <linux/edac.h> 18 #include <linux/bug.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/uaccess.h> 21 22 #include "edac_core.h" 23 #include "edac_module.h" 24 25 /* MC EDAC Controls, setable by module parameter, and sysfs */ 26 static int edac_mc_log_ue = 1; 27 static int edac_mc_log_ce = 1; 28 static int edac_mc_panic_on_ue; 29 static int edac_mc_poll_msec = 1000; 30 31 /* Getter functions for above */ 32 int edac_mc_get_log_ue(void) 33 { 34 return edac_mc_log_ue; 35 } 36 37 int edac_mc_get_log_ce(void) 38 { 39 return edac_mc_log_ce; 40 } 41 42 int edac_mc_get_panic_on_ue(void) 43 { 44 return edac_mc_panic_on_ue; 45 } 46 47 /* this is temporary */ 48 int edac_mc_get_poll_msec(void) 49 { 50 return edac_mc_poll_msec; 51 } 52 53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp) 54 { 55 unsigned long l; 56 int ret; 57 58 if (!val) 59 return -EINVAL; 60 61 ret = kstrtoul(val, 0, &l); 62 if (ret) 63 return ret; 64 65 if (l < 1000) 66 return -EINVAL; 67 68 *((unsigned long *)kp->arg) = l; 69 70 /* notify edac_mc engine to reset the poll period */ 71 edac_mc_reset_delay_period(l); 72 73 return 0; 74 } 75 76 /* Parameter declarations for above */ 77 module_param(edac_mc_panic_on_ue, int, 0644); 78 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); 79 module_param(edac_mc_log_ue, int, 0644); 80 MODULE_PARM_DESC(edac_mc_log_ue, 81 "Log uncorrectable error to console: 0=off 1=on"); 82 module_param(edac_mc_log_ce, int, 0644); 83 MODULE_PARM_DESC(edac_mc_log_ce, 84 "Log correctable error to console: 0=off 1=on"); 85 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int, 86 &edac_mc_poll_msec, 0644); 87 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds"); 88 89 static struct device *mci_pdev; 90 91 /* 92 * various constants for Memory Controllers 93 */ 94 static const char * const mem_types[] = { 95 [MEM_EMPTY] = "Empty", 96 [MEM_RESERVED] = "Reserved", 97 [MEM_UNKNOWN] = "Unknown", 98 [MEM_FPM] = "FPM", 99 [MEM_EDO] = "EDO", 100 [MEM_BEDO] = "BEDO", 101 [MEM_SDR] = "Unbuffered-SDR", 102 [MEM_RDR] = "Registered-SDR", 103 [MEM_DDR] = "Unbuffered-DDR", 104 [MEM_RDDR] = "Registered-DDR", 105 [MEM_RMBS] = "RMBS", 106 [MEM_DDR2] = "Unbuffered-DDR2", 107 [MEM_FB_DDR2] = "FullyBuffered-DDR2", 108 [MEM_RDDR2] = "Registered-DDR2", 109 [MEM_XDR] = "XDR", 110 [MEM_DDR3] = "Unbuffered-DDR3", 111 [MEM_RDDR3] = "Registered-DDR3", 112 [MEM_DDR4] = "Unbuffered-DDR4", 113 [MEM_RDDR4] = "Registered-DDR4" 114 }; 115 116 static const char * const dev_types[] = { 117 [DEV_UNKNOWN] = "Unknown", 118 [DEV_X1] = "x1", 119 [DEV_X2] = "x2", 120 [DEV_X4] = "x4", 121 [DEV_X8] = "x8", 122 [DEV_X16] = "x16", 123 [DEV_X32] = "x32", 124 [DEV_X64] = "x64" 125 }; 126 127 static const char * const edac_caps[] = { 128 [EDAC_UNKNOWN] = "Unknown", 129 [EDAC_NONE] = "None", 130 [EDAC_RESERVED] = "Reserved", 131 [EDAC_PARITY] = "PARITY", 132 [EDAC_EC] = "EC", 133 [EDAC_SECDED] = "SECDED", 134 [EDAC_S2ECD2ED] = "S2ECD2ED", 135 [EDAC_S4ECD4ED] = "S4ECD4ED", 136 [EDAC_S8ECD8ED] = "S8ECD8ED", 137 [EDAC_S16ECD16ED] = "S16ECD16ED" 138 }; 139 140 #ifdef CONFIG_EDAC_LEGACY_SYSFS 141 /* 142 * EDAC sysfs CSROW data structures and methods 143 */ 144 145 #define to_csrow(k) container_of(k, struct csrow_info, dev) 146 147 /* 148 * We need it to avoid namespace conflicts between the legacy API 149 * and the per-dimm/per-rank one 150 */ 151 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \ 152 static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) 153 154 struct dev_ch_attribute { 155 struct device_attribute attr; 156 int channel; 157 }; 158 159 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \ 160 static struct dev_ch_attribute dev_attr_legacy_##_name = \ 161 { __ATTR(_name, _mode, _show, _store), (_var) } 162 163 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel) 164 165 /* Set of more default csrow<id> attribute show/store functions */ 166 static ssize_t csrow_ue_count_show(struct device *dev, 167 struct device_attribute *mattr, char *data) 168 { 169 struct csrow_info *csrow = to_csrow(dev); 170 171 return sprintf(data, "%u\n", csrow->ue_count); 172 } 173 174 static ssize_t csrow_ce_count_show(struct device *dev, 175 struct device_attribute *mattr, char *data) 176 { 177 struct csrow_info *csrow = to_csrow(dev); 178 179 return sprintf(data, "%u\n", csrow->ce_count); 180 } 181 182 static ssize_t csrow_size_show(struct device *dev, 183 struct device_attribute *mattr, char *data) 184 { 185 struct csrow_info *csrow = to_csrow(dev); 186 int i; 187 u32 nr_pages = 0; 188 189 for (i = 0; i < csrow->nr_channels; i++) 190 nr_pages += csrow->channels[i]->dimm->nr_pages; 191 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); 192 } 193 194 static ssize_t csrow_mem_type_show(struct device *dev, 195 struct device_attribute *mattr, char *data) 196 { 197 struct csrow_info *csrow = to_csrow(dev); 198 199 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]); 200 } 201 202 static ssize_t csrow_dev_type_show(struct device *dev, 203 struct device_attribute *mattr, char *data) 204 { 205 struct csrow_info *csrow = to_csrow(dev); 206 207 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]); 208 } 209 210 static ssize_t csrow_edac_mode_show(struct device *dev, 211 struct device_attribute *mattr, 212 char *data) 213 { 214 struct csrow_info *csrow = to_csrow(dev); 215 216 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]); 217 } 218 219 /* show/store functions for DIMM Label attributes */ 220 static ssize_t channel_dimm_label_show(struct device *dev, 221 struct device_attribute *mattr, 222 char *data) 223 { 224 struct csrow_info *csrow = to_csrow(dev); 225 unsigned chan = to_channel(mattr); 226 struct rank_info *rank = csrow->channels[chan]; 227 228 /* if field has not been initialized, there is nothing to send */ 229 if (!rank->dimm->label[0]) 230 return 0; 231 232 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", 233 rank->dimm->label); 234 } 235 236 static ssize_t channel_dimm_label_store(struct device *dev, 237 struct device_attribute *mattr, 238 const char *data, size_t count) 239 { 240 struct csrow_info *csrow = to_csrow(dev); 241 unsigned chan = to_channel(mattr); 242 struct rank_info *rank = csrow->channels[chan]; 243 244 ssize_t max_size = 0; 245 246 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); 247 strncpy(rank->dimm->label, data, max_size); 248 rank->dimm->label[max_size] = '\0'; 249 250 return max_size; 251 } 252 253 /* show function for dynamic chX_ce_count attribute */ 254 static ssize_t channel_ce_count_show(struct device *dev, 255 struct device_attribute *mattr, char *data) 256 { 257 struct csrow_info *csrow = to_csrow(dev); 258 unsigned chan = to_channel(mattr); 259 struct rank_info *rank = csrow->channels[chan]; 260 261 return sprintf(data, "%u\n", rank->ce_count); 262 } 263 264 /* cwrow<id>/attribute files */ 265 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL); 266 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL); 267 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL); 268 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL); 269 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL); 270 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL); 271 272 /* default attributes of the CSROW<id> object */ 273 static struct attribute *csrow_attrs[] = { 274 &dev_attr_legacy_dev_type.attr, 275 &dev_attr_legacy_mem_type.attr, 276 &dev_attr_legacy_edac_mode.attr, 277 &dev_attr_legacy_size_mb.attr, 278 &dev_attr_legacy_ue_count.attr, 279 &dev_attr_legacy_ce_count.attr, 280 NULL, 281 }; 282 283 static struct attribute_group csrow_attr_grp = { 284 .attrs = csrow_attrs, 285 }; 286 287 static const struct attribute_group *csrow_attr_groups[] = { 288 &csrow_attr_grp, 289 NULL 290 }; 291 292 static void csrow_attr_release(struct device *dev) 293 { 294 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev); 295 296 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); 297 kfree(csrow); 298 } 299 300 static struct device_type csrow_attr_type = { 301 .groups = csrow_attr_groups, 302 .release = csrow_attr_release, 303 }; 304 305 /* 306 * possible dynamic channel DIMM Label attribute files 307 * 308 */ 309 310 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR, 311 channel_dimm_label_show, channel_dimm_label_store, 0); 312 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR, 313 channel_dimm_label_show, channel_dimm_label_store, 1); 314 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR, 315 channel_dimm_label_show, channel_dimm_label_store, 2); 316 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR, 317 channel_dimm_label_show, channel_dimm_label_store, 3); 318 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR, 319 channel_dimm_label_show, channel_dimm_label_store, 4); 320 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR, 321 channel_dimm_label_show, channel_dimm_label_store, 5); 322 323 /* Total possible dynamic DIMM Label attribute file table */ 324 static struct attribute *dynamic_csrow_dimm_attr[] = { 325 &dev_attr_legacy_ch0_dimm_label.attr.attr, 326 &dev_attr_legacy_ch1_dimm_label.attr.attr, 327 &dev_attr_legacy_ch2_dimm_label.attr.attr, 328 &dev_attr_legacy_ch3_dimm_label.attr.attr, 329 &dev_attr_legacy_ch4_dimm_label.attr.attr, 330 &dev_attr_legacy_ch5_dimm_label.attr.attr, 331 NULL 332 }; 333 334 /* possible dynamic channel ce_count attribute files */ 335 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO, 336 channel_ce_count_show, NULL, 0); 337 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO, 338 channel_ce_count_show, NULL, 1); 339 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO, 340 channel_ce_count_show, NULL, 2); 341 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO, 342 channel_ce_count_show, NULL, 3); 343 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO, 344 channel_ce_count_show, NULL, 4); 345 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO, 346 channel_ce_count_show, NULL, 5); 347 348 /* Total possible dynamic ce_count attribute file table */ 349 static struct attribute *dynamic_csrow_ce_count_attr[] = { 350 &dev_attr_legacy_ch0_ce_count.attr.attr, 351 &dev_attr_legacy_ch1_ce_count.attr.attr, 352 &dev_attr_legacy_ch2_ce_count.attr.attr, 353 &dev_attr_legacy_ch3_ce_count.attr.attr, 354 &dev_attr_legacy_ch4_ce_count.attr.attr, 355 &dev_attr_legacy_ch5_ce_count.attr.attr, 356 NULL 357 }; 358 359 static umode_t csrow_dev_is_visible(struct kobject *kobj, 360 struct attribute *attr, int idx) 361 { 362 struct device *dev = kobj_to_dev(kobj); 363 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev); 364 365 if (idx >= csrow->nr_channels) 366 return 0; 367 /* Only expose populated DIMMs */ 368 if (!csrow->channels[idx]->dimm->nr_pages) 369 return 0; 370 return attr->mode; 371 } 372 373 374 static const struct attribute_group csrow_dev_dimm_group = { 375 .attrs = dynamic_csrow_dimm_attr, 376 .is_visible = csrow_dev_is_visible, 377 }; 378 379 static const struct attribute_group csrow_dev_ce_count_group = { 380 .attrs = dynamic_csrow_ce_count_attr, 381 .is_visible = csrow_dev_is_visible, 382 }; 383 384 static const struct attribute_group *csrow_dev_groups[] = { 385 &csrow_dev_dimm_group, 386 &csrow_dev_ce_count_group, 387 NULL 388 }; 389 390 static inline int nr_pages_per_csrow(struct csrow_info *csrow) 391 { 392 int chan, nr_pages = 0; 393 394 for (chan = 0; chan < csrow->nr_channels; chan++) 395 nr_pages += csrow->channels[chan]->dimm->nr_pages; 396 397 return nr_pages; 398 } 399 400 /* Create a CSROW object under specifed edac_mc_device */ 401 static int edac_create_csrow_object(struct mem_ctl_info *mci, 402 struct csrow_info *csrow, int index) 403 { 404 csrow->dev.type = &csrow_attr_type; 405 csrow->dev.bus = mci->bus; 406 csrow->dev.groups = csrow_dev_groups; 407 device_initialize(&csrow->dev); 408 csrow->dev.parent = &mci->dev; 409 csrow->mci = mci; 410 dev_set_name(&csrow->dev, "csrow%d", index); 411 dev_set_drvdata(&csrow->dev, csrow); 412 413 edac_dbg(0, "creating (virtual) csrow node %s\n", 414 dev_name(&csrow->dev)); 415 416 return device_add(&csrow->dev); 417 } 418 419 /* Create a CSROW object under specifed edac_mc_device */ 420 static int edac_create_csrow_objects(struct mem_ctl_info *mci) 421 { 422 int err, i; 423 struct csrow_info *csrow; 424 425 for (i = 0; i < mci->nr_csrows; i++) { 426 csrow = mci->csrows[i]; 427 if (!nr_pages_per_csrow(csrow)) 428 continue; 429 err = edac_create_csrow_object(mci, mci->csrows[i], i); 430 if (err < 0) { 431 edac_dbg(1, 432 "failure: create csrow objects for csrow %d\n", 433 i); 434 goto error; 435 } 436 } 437 return 0; 438 439 error: 440 for (--i; i >= 0; i--) { 441 csrow = mci->csrows[i]; 442 if (!nr_pages_per_csrow(csrow)) 443 continue; 444 put_device(&mci->csrows[i]->dev); 445 } 446 447 return err; 448 } 449 450 static void edac_delete_csrow_objects(struct mem_ctl_info *mci) 451 { 452 int i; 453 struct csrow_info *csrow; 454 455 for (i = mci->nr_csrows - 1; i >= 0; i--) { 456 csrow = mci->csrows[i]; 457 if (!nr_pages_per_csrow(csrow)) 458 continue; 459 device_unregister(&mci->csrows[i]->dev); 460 } 461 } 462 #endif 463 464 /* 465 * Per-dimm (or per-rank) devices 466 */ 467 468 #define to_dimm(k) container_of(k, struct dimm_info, dev) 469 470 /* show/store functions for DIMM Label attributes */ 471 static ssize_t dimmdev_location_show(struct device *dev, 472 struct device_attribute *mattr, char *data) 473 { 474 struct dimm_info *dimm = to_dimm(dev); 475 476 return edac_dimm_info_location(dimm, data, PAGE_SIZE); 477 } 478 479 static ssize_t dimmdev_label_show(struct device *dev, 480 struct device_attribute *mattr, char *data) 481 { 482 struct dimm_info *dimm = to_dimm(dev); 483 484 /* if field has not been initialized, there is nothing to send */ 485 if (!dimm->label[0]) 486 return 0; 487 488 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label); 489 } 490 491 static ssize_t dimmdev_label_store(struct device *dev, 492 struct device_attribute *mattr, 493 const char *data, 494 size_t count) 495 { 496 struct dimm_info *dimm = to_dimm(dev); 497 498 ssize_t max_size = 0; 499 500 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1); 501 strncpy(dimm->label, data, max_size); 502 dimm->label[max_size] = '\0'; 503 504 return max_size; 505 } 506 507 static ssize_t dimmdev_size_show(struct device *dev, 508 struct device_attribute *mattr, char *data) 509 { 510 struct dimm_info *dimm = to_dimm(dev); 511 512 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages)); 513 } 514 515 static ssize_t dimmdev_mem_type_show(struct device *dev, 516 struct device_attribute *mattr, char *data) 517 { 518 struct dimm_info *dimm = to_dimm(dev); 519 520 return sprintf(data, "%s\n", mem_types[dimm->mtype]); 521 } 522 523 static ssize_t dimmdev_dev_type_show(struct device *dev, 524 struct device_attribute *mattr, char *data) 525 { 526 struct dimm_info *dimm = to_dimm(dev); 527 528 return sprintf(data, "%s\n", dev_types[dimm->dtype]); 529 } 530 531 static ssize_t dimmdev_edac_mode_show(struct device *dev, 532 struct device_attribute *mattr, 533 char *data) 534 { 535 struct dimm_info *dimm = to_dimm(dev); 536 537 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]); 538 } 539 540 /* dimm/rank attribute files */ 541 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR, 542 dimmdev_label_show, dimmdev_label_store); 543 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL); 544 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL); 545 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL); 546 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL); 547 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL); 548 549 /* attributes of the dimm<id>/rank<id> object */ 550 static struct attribute *dimm_attrs[] = { 551 &dev_attr_dimm_label.attr, 552 &dev_attr_dimm_location.attr, 553 &dev_attr_size.attr, 554 &dev_attr_dimm_mem_type.attr, 555 &dev_attr_dimm_dev_type.attr, 556 &dev_attr_dimm_edac_mode.attr, 557 NULL, 558 }; 559 560 static struct attribute_group dimm_attr_grp = { 561 .attrs = dimm_attrs, 562 }; 563 564 static const struct attribute_group *dimm_attr_groups[] = { 565 &dimm_attr_grp, 566 NULL 567 }; 568 569 static void dimm_attr_release(struct device *dev) 570 { 571 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev); 572 573 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev)); 574 kfree(dimm); 575 } 576 577 static struct device_type dimm_attr_type = { 578 .groups = dimm_attr_groups, 579 .release = dimm_attr_release, 580 }; 581 582 /* Create a DIMM object under specifed memory controller device */ 583 static int edac_create_dimm_object(struct mem_ctl_info *mci, 584 struct dimm_info *dimm, 585 int index) 586 { 587 int err; 588 dimm->mci = mci; 589 590 dimm->dev.type = &dimm_attr_type; 591 dimm->dev.bus = mci->bus; 592 device_initialize(&dimm->dev); 593 594 dimm->dev.parent = &mci->dev; 595 if (mci->csbased) 596 dev_set_name(&dimm->dev, "rank%d", index); 597 else 598 dev_set_name(&dimm->dev, "dimm%d", index); 599 dev_set_drvdata(&dimm->dev, dimm); 600 pm_runtime_forbid(&mci->dev); 601 602 err = device_add(&dimm->dev); 603 604 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev)); 605 606 return err; 607 } 608 609 /* 610 * Memory controller device 611 */ 612 613 #define to_mci(k) container_of(k, struct mem_ctl_info, dev) 614 615 static ssize_t mci_reset_counters_store(struct device *dev, 616 struct device_attribute *mattr, 617 const char *data, size_t count) 618 { 619 struct mem_ctl_info *mci = to_mci(dev); 620 int cnt, row, chan, i; 621 mci->ue_mc = 0; 622 mci->ce_mc = 0; 623 mci->ue_noinfo_count = 0; 624 mci->ce_noinfo_count = 0; 625 626 for (row = 0; row < mci->nr_csrows; row++) { 627 struct csrow_info *ri = mci->csrows[row]; 628 629 ri->ue_count = 0; 630 ri->ce_count = 0; 631 632 for (chan = 0; chan < ri->nr_channels; chan++) 633 ri->channels[chan]->ce_count = 0; 634 } 635 636 cnt = 1; 637 for (i = 0; i < mci->n_layers; i++) { 638 cnt *= mci->layers[i].size; 639 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32)); 640 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32)); 641 } 642 643 mci->start_time = jiffies; 644 return count; 645 } 646 647 /* Memory scrubbing interface: 648 * 649 * A MC driver can limit the scrubbing bandwidth based on the CPU type. 650 * Therefore, ->set_sdram_scrub_rate should be made to return the actual 651 * bandwidth that is accepted or 0 when scrubbing is to be disabled. 652 * 653 * Negative value still means that an error has occurred while setting 654 * the scrub rate. 655 */ 656 static ssize_t mci_sdram_scrub_rate_store(struct device *dev, 657 struct device_attribute *mattr, 658 const char *data, size_t count) 659 { 660 struct mem_ctl_info *mci = to_mci(dev); 661 unsigned long bandwidth = 0; 662 int new_bw = 0; 663 664 if (kstrtoul(data, 10, &bandwidth) < 0) 665 return -EINVAL; 666 667 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth); 668 if (new_bw < 0) { 669 edac_printk(KERN_WARNING, EDAC_MC, 670 "Error setting scrub rate to: %lu\n", bandwidth); 671 return -EINVAL; 672 } 673 674 return count; 675 } 676 677 /* 678 * ->get_sdram_scrub_rate() return value semantics same as above. 679 */ 680 static ssize_t mci_sdram_scrub_rate_show(struct device *dev, 681 struct device_attribute *mattr, 682 char *data) 683 { 684 struct mem_ctl_info *mci = to_mci(dev); 685 int bandwidth = 0; 686 687 bandwidth = mci->get_sdram_scrub_rate(mci); 688 if (bandwidth < 0) { 689 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n"); 690 return bandwidth; 691 } 692 693 return sprintf(data, "%d\n", bandwidth); 694 } 695 696 /* default attribute files for the MCI object */ 697 static ssize_t mci_ue_count_show(struct device *dev, 698 struct device_attribute *mattr, 699 char *data) 700 { 701 struct mem_ctl_info *mci = to_mci(dev); 702 703 return sprintf(data, "%d\n", mci->ue_mc); 704 } 705 706 static ssize_t mci_ce_count_show(struct device *dev, 707 struct device_attribute *mattr, 708 char *data) 709 { 710 struct mem_ctl_info *mci = to_mci(dev); 711 712 return sprintf(data, "%d\n", mci->ce_mc); 713 } 714 715 static ssize_t mci_ce_noinfo_show(struct device *dev, 716 struct device_attribute *mattr, 717 char *data) 718 { 719 struct mem_ctl_info *mci = to_mci(dev); 720 721 return sprintf(data, "%d\n", mci->ce_noinfo_count); 722 } 723 724 static ssize_t mci_ue_noinfo_show(struct device *dev, 725 struct device_attribute *mattr, 726 char *data) 727 { 728 struct mem_ctl_info *mci = to_mci(dev); 729 730 return sprintf(data, "%d\n", mci->ue_noinfo_count); 731 } 732 733 static ssize_t mci_seconds_show(struct device *dev, 734 struct device_attribute *mattr, 735 char *data) 736 { 737 struct mem_ctl_info *mci = to_mci(dev); 738 739 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ); 740 } 741 742 static ssize_t mci_ctl_name_show(struct device *dev, 743 struct device_attribute *mattr, 744 char *data) 745 { 746 struct mem_ctl_info *mci = to_mci(dev); 747 748 return sprintf(data, "%s\n", mci->ctl_name); 749 } 750 751 static ssize_t mci_size_mb_show(struct device *dev, 752 struct device_attribute *mattr, 753 char *data) 754 { 755 struct mem_ctl_info *mci = to_mci(dev); 756 int total_pages = 0, csrow_idx, j; 757 758 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { 759 struct csrow_info *csrow = mci->csrows[csrow_idx]; 760 761 for (j = 0; j < csrow->nr_channels; j++) { 762 struct dimm_info *dimm = csrow->channels[j]->dimm; 763 764 total_pages += dimm->nr_pages; 765 } 766 } 767 768 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); 769 } 770 771 static ssize_t mci_max_location_show(struct device *dev, 772 struct device_attribute *mattr, 773 char *data) 774 { 775 struct mem_ctl_info *mci = to_mci(dev); 776 int i; 777 char *p = data; 778 779 for (i = 0; i < mci->n_layers; i++) { 780 p += sprintf(p, "%s %d ", 781 edac_layer_name[mci->layers[i].type], 782 mci->layers[i].size - 1); 783 } 784 785 return p - data; 786 } 787 788 #ifdef CONFIG_EDAC_DEBUG 789 static ssize_t edac_fake_inject_write(struct file *file, 790 const char __user *data, 791 size_t count, loff_t *ppos) 792 { 793 struct device *dev = file->private_data; 794 struct mem_ctl_info *mci = to_mci(dev); 795 static enum hw_event_mc_err_type type; 796 u16 errcount = mci->fake_inject_count; 797 798 if (!errcount) 799 errcount = 1; 800 801 type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED 802 : HW_EVENT_ERR_CORRECTED; 803 804 printk(KERN_DEBUG 805 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n", 806 errcount, 807 (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE", 808 errcount > 1 ? "s" : "", 809 mci->fake_inject_layer[0], 810 mci->fake_inject_layer[1], 811 mci->fake_inject_layer[2] 812 ); 813 edac_mc_handle_error(type, mci, errcount, 0, 0, 0, 814 mci->fake_inject_layer[0], 815 mci->fake_inject_layer[1], 816 mci->fake_inject_layer[2], 817 "FAKE ERROR", "for EDAC testing only"); 818 819 return count; 820 } 821 822 static const struct file_operations debug_fake_inject_fops = { 823 .open = simple_open, 824 .write = edac_fake_inject_write, 825 .llseek = generic_file_llseek, 826 }; 827 #endif 828 829 /* default Control file */ 830 static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store); 831 832 /* default Attribute files */ 833 static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL); 834 static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL); 835 static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL); 836 static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL); 837 static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL); 838 static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL); 839 static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL); 840 static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL); 841 842 /* memory scrubber attribute file */ 843 DEVICE_ATTR(sdram_scrub_rate, 0, mci_sdram_scrub_rate_show, 844 mci_sdram_scrub_rate_store); /* umode set later in is_visible */ 845 846 static struct attribute *mci_attrs[] = { 847 &dev_attr_reset_counters.attr, 848 &dev_attr_mc_name.attr, 849 &dev_attr_size_mb.attr, 850 &dev_attr_seconds_since_reset.attr, 851 &dev_attr_ue_noinfo_count.attr, 852 &dev_attr_ce_noinfo_count.attr, 853 &dev_attr_ue_count.attr, 854 &dev_attr_ce_count.attr, 855 &dev_attr_max_location.attr, 856 &dev_attr_sdram_scrub_rate.attr, 857 NULL 858 }; 859 860 static umode_t mci_attr_is_visible(struct kobject *kobj, 861 struct attribute *attr, int idx) 862 { 863 struct device *dev = kobj_to_dev(kobj); 864 struct mem_ctl_info *mci = to_mci(dev); 865 umode_t mode = 0; 866 867 if (attr != &dev_attr_sdram_scrub_rate.attr) 868 return attr->mode; 869 if (mci->get_sdram_scrub_rate) 870 mode |= S_IRUGO; 871 if (mci->set_sdram_scrub_rate) 872 mode |= S_IWUSR; 873 return mode; 874 } 875 876 static struct attribute_group mci_attr_grp = { 877 .attrs = mci_attrs, 878 .is_visible = mci_attr_is_visible, 879 }; 880 881 static const struct attribute_group *mci_attr_groups[] = { 882 &mci_attr_grp, 883 NULL 884 }; 885 886 static void mci_attr_release(struct device *dev) 887 { 888 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev); 889 890 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); 891 kfree(mci); 892 } 893 894 static struct device_type mci_attr_type = { 895 .groups = mci_attr_groups, 896 .release = mci_attr_release, 897 }; 898 899 #ifdef CONFIG_EDAC_DEBUG 900 static struct dentry *edac_debugfs; 901 902 int __init edac_debugfs_init(void) 903 { 904 edac_debugfs = debugfs_create_dir("edac", NULL); 905 if (IS_ERR(edac_debugfs)) { 906 edac_debugfs = NULL; 907 return -ENOMEM; 908 } 909 return 0; 910 } 911 912 void edac_debugfs_exit(void) 913 { 914 debugfs_remove(edac_debugfs); 915 } 916 917 static int edac_create_debug_nodes(struct mem_ctl_info *mci) 918 { 919 struct dentry *d, *parent; 920 char name[80]; 921 int i; 922 923 if (!edac_debugfs) 924 return -ENODEV; 925 926 d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs); 927 if (!d) 928 return -ENOMEM; 929 parent = d; 930 931 for (i = 0; i < mci->n_layers; i++) { 932 sprintf(name, "fake_inject_%s", 933 edac_layer_name[mci->layers[i].type]); 934 d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent, 935 &mci->fake_inject_layer[i]); 936 if (!d) 937 goto nomem; 938 } 939 940 d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent, 941 &mci->fake_inject_ue); 942 if (!d) 943 goto nomem; 944 945 d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent, 946 &mci->fake_inject_count); 947 if (!d) 948 goto nomem; 949 950 d = debugfs_create_file("fake_inject", S_IWUSR, parent, 951 &mci->dev, 952 &debug_fake_inject_fops); 953 if (!d) 954 goto nomem; 955 956 mci->debugfs = parent; 957 return 0; 958 nomem: 959 debugfs_remove(mci->debugfs); 960 return -ENOMEM; 961 } 962 #endif 963 964 /* 965 * Create a new Memory Controller kobject instance, 966 * mc<id> under the 'mc' directory 967 * 968 * Return: 969 * 0 Success 970 * !0 Failure 971 */ 972 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci, 973 const struct attribute_group **groups) 974 { 975 int i, err; 976 977 /* 978 * The memory controller needs its own bus, in order to avoid 979 * namespace conflicts at /sys/bus/edac. 980 */ 981 mci->bus->name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx); 982 if (!mci->bus->name) 983 return -ENOMEM; 984 985 edac_dbg(0, "creating bus %s\n", mci->bus->name); 986 987 err = bus_register(mci->bus); 988 if (err < 0) 989 goto fail_free_name; 990 991 /* get the /sys/devices/system/edac subsys reference */ 992 mci->dev.type = &mci_attr_type; 993 device_initialize(&mci->dev); 994 995 mci->dev.parent = mci_pdev; 996 mci->dev.bus = mci->bus; 997 mci->dev.groups = groups; 998 dev_set_name(&mci->dev, "mc%d", mci->mc_idx); 999 dev_set_drvdata(&mci->dev, mci); 1000 pm_runtime_forbid(&mci->dev); 1001 1002 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev)); 1003 err = device_add(&mci->dev); 1004 if (err < 0) { 1005 edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev)); 1006 goto fail_unregister_bus; 1007 } 1008 1009 /* 1010 * Create the dimm/rank devices 1011 */ 1012 for (i = 0; i < mci->tot_dimms; i++) { 1013 struct dimm_info *dimm = mci->dimms[i]; 1014 /* Only expose populated DIMMs */ 1015 if (!dimm->nr_pages) 1016 continue; 1017 1018 #ifdef CONFIG_EDAC_DEBUG 1019 edac_dbg(1, "creating dimm%d, located at ", i); 1020 if (edac_debug_level >= 1) { 1021 int lay; 1022 for (lay = 0; lay < mci->n_layers; lay++) 1023 printk(KERN_CONT "%s %d ", 1024 edac_layer_name[mci->layers[lay].type], 1025 dimm->location[lay]); 1026 printk(KERN_CONT "\n"); 1027 } 1028 #endif 1029 err = edac_create_dimm_object(mci, dimm, i); 1030 if (err) { 1031 edac_dbg(1, "failure: create dimm %d obj\n", i); 1032 goto fail_unregister_dimm; 1033 } 1034 } 1035 1036 #ifdef CONFIG_EDAC_LEGACY_SYSFS 1037 err = edac_create_csrow_objects(mci); 1038 if (err < 0) 1039 goto fail_unregister_dimm; 1040 #endif 1041 1042 #ifdef CONFIG_EDAC_DEBUG 1043 edac_create_debug_nodes(mci); 1044 #endif 1045 return 0; 1046 1047 fail_unregister_dimm: 1048 for (i--; i >= 0; i--) { 1049 struct dimm_info *dimm = mci->dimms[i]; 1050 if (!dimm->nr_pages) 1051 continue; 1052 1053 device_unregister(&dimm->dev); 1054 } 1055 device_unregister(&mci->dev); 1056 fail_unregister_bus: 1057 bus_unregister(mci->bus); 1058 fail_free_name: 1059 kfree(mci->bus->name); 1060 return err; 1061 } 1062 1063 /* 1064 * remove a Memory Controller instance 1065 */ 1066 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) 1067 { 1068 int i; 1069 1070 edac_dbg(0, "\n"); 1071 1072 #ifdef CONFIG_EDAC_DEBUG 1073 debugfs_remove(mci->debugfs); 1074 #endif 1075 #ifdef CONFIG_EDAC_LEGACY_SYSFS 1076 edac_delete_csrow_objects(mci); 1077 #endif 1078 1079 for (i = 0; i < mci->tot_dimms; i++) { 1080 struct dimm_info *dimm = mci->dimms[i]; 1081 if (dimm->nr_pages == 0) 1082 continue; 1083 edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev)); 1084 device_unregister(&dimm->dev); 1085 } 1086 } 1087 1088 void edac_unregister_sysfs(struct mem_ctl_info *mci) 1089 { 1090 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev)); 1091 device_unregister(&mci->dev); 1092 bus_unregister(mci->bus); 1093 kfree(mci->bus->name); 1094 } 1095 1096 static void mc_attr_release(struct device *dev) 1097 { 1098 /* 1099 * There's no container structure here, as this is just the mci 1100 * parent device, used to create the /sys/devices/mc sysfs node. 1101 * So, there are no attributes on it. 1102 */ 1103 edac_dbg(1, "Releasing device %s\n", dev_name(dev)); 1104 kfree(dev); 1105 } 1106 1107 static struct device_type mc_attr_type = { 1108 .release = mc_attr_release, 1109 }; 1110 /* 1111 * Init/exit code for the module. Basically, creates/removes /sys/class/rc 1112 */ 1113 int __init edac_mc_sysfs_init(void) 1114 { 1115 struct bus_type *edac_subsys; 1116 int err; 1117 1118 /* get the /sys/devices/system/edac subsys reference */ 1119 edac_subsys = edac_get_sysfs_subsys(); 1120 if (edac_subsys == NULL) { 1121 edac_dbg(1, "no edac_subsys\n"); 1122 err = -EINVAL; 1123 goto out; 1124 } 1125 1126 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL); 1127 if (!mci_pdev) { 1128 err = -ENOMEM; 1129 goto out_put_sysfs; 1130 } 1131 1132 mci_pdev->bus = edac_subsys; 1133 mci_pdev->type = &mc_attr_type; 1134 device_initialize(mci_pdev); 1135 dev_set_name(mci_pdev, "mc"); 1136 1137 err = device_add(mci_pdev); 1138 if (err < 0) 1139 goto out_dev_free; 1140 1141 edac_dbg(0, "device %s created\n", dev_name(mci_pdev)); 1142 1143 return 0; 1144 1145 out_dev_free: 1146 kfree(mci_pdev); 1147 out_put_sysfs: 1148 edac_put_sysfs_subsys(); 1149 out: 1150 return err; 1151 } 1152 1153 void edac_mc_sysfs_exit(void) 1154 { 1155 device_unregister(mci_pdev); 1156 edac_put_sysfs_subsys(); 1157 } 1158