xref: /linux/drivers/dpll/dpll_nl.c (revision d8f87aa5fa0a4276491fa8ef436cd22605a3f9ba)
1 // SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 /* Do not edit directly, auto-generated from: */
3 /*	Documentation/netlink/specs/dpll.yaml */
4 /* YNL-GEN kernel source */
5 /* To regenerate run: tools/net/ynl/ynl-regen.sh */
6 
7 #include <net/netlink.h>
8 #include <net/genetlink.h>
9 
10 #include "dpll_nl.h"
11 
12 #include <uapi/linux/dpll.h>
13 
14 /* Common nested types */
15 const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_PHASE_OFFSET + 1] = {
16 	[DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, },
17 	[DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
18 	[DPLL_A_PIN_PRIO] = { .type = NLA_U32, },
19 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
20 	[DPLL_A_PIN_PHASE_OFFSET] = { .type = NLA_S64, },
21 };
22 
23 const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1] = {
24 	[DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, },
25 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
26 };
27 
28 const struct nla_policy dpll_reference_sync_nl_policy[DPLL_A_PIN_STATE + 1] = {
29 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
30 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
31 };
32 
33 /* DPLL_CMD_DEVICE_ID_GET - do */
34 static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = {
35 	[DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, },
36 	[DPLL_A_CLOCK_ID] = { .type = NLA_U64, },
37 	[DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
38 };
39 
40 /* DPLL_CMD_DEVICE_GET - do */
41 static const struct nla_policy dpll_device_get_nl_policy[DPLL_A_ID + 1] = {
42 	[DPLL_A_ID] = { .type = NLA_U32, },
43 };
44 
45 /* DPLL_CMD_DEVICE_SET - do */
46 static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_PHASE_OFFSET_AVG_FACTOR + 1] = {
47 	[DPLL_A_ID] = { .type = NLA_U32, },
48 	[DPLL_A_MODE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
49 	[DPLL_A_PHASE_OFFSET_MONITOR] = NLA_POLICY_MAX(NLA_U32, 1),
50 	[DPLL_A_PHASE_OFFSET_AVG_FACTOR] = { .type = NLA_U32, },
51 };
52 
53 /* DPLL_CMD_PIN_ID_GET - do */
54 static const struct nla_policy dpll_pin_id_get_nl_policy[DPLL_A_PIN_TYPE + 1] = {
55 	[DPLL_A_PIN_MODULE_NAME] = { .type = NLA_NUL_STRING, },
56 	[DPLL_A_PIN_CLOCK_ID] = { .type = NLA_U64, },
57 	[DPLL_A_PIN_BOARD_LABEL] = { .type = NLA_NUL_STRING, },
58 	[DPLL_A_PIN_PANEL_LABEL] = { .type = NLA_NUL_STRING, },
59 	[DPLL_A_PIN_PACKAGE_LABEL] = { .type = NLA_NUL_STRING, },
60 	[DPLL_A_PIN_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 5),
61 };
62 
63 /* DPLL_CMD_PIN_GET - do */
64 static const struct nla_policy dpll_pin_get_do_nl_policy[DPLL_A_PIN_ID + 1] = {
65 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
66 };
67 
68 /* DPLL_CMD_PIN_GET - dump */
69 static const struct nla_policy dpll_pin_get_dump_nl_policy[DPLL_A_PIN_ID + 1] = {
70 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
71 };
72 
73 /* DPLL_CMD_PIN_SET - do */
74 static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_REFERENCE_SYNC + 1] = {
75 	[DPLL_A_PIN_ID] = { .type = NLA_U32, },
76 	[DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, },
77 	[DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
78 	[DPLL_A_PIN_PRIO] = { .type = NLA_U32, },
79 	[DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3),
80 	[DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy),
81 	[DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy),
82 	[DPLL_A_PIN_PHASE_ADJUST] = { .type = NLA_S32, },
83 	[DPLL_A_PIN_ESYNC_FREQUENCY] = { .type = NLA_U64, },
84 	[DPLL_A_PIN_REFERENCE_SYNC] = NLA_POLICY_NESTED(dpll_reference_sync_nl_policy),
85 };
86 
87 /* Ops table for dpll */
88 static const struct genl_split_ops dpll_nl_ops[] = {
89 	{
90 		.cmd		= DPLL_CMD_DEVICE_ID_GET,
91 		.pre_doit	= dpll_lock_doit,
92 		.doit		= dpll_nl_device_id_get_doit,
93 		.post_doit	= dpll_unlock_doit,
94 		.policy		= dpll_device_id_get_nl_policy,
95 		.maxattr	= DPLL_A_TYPE,
96 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
97 	},
98 	{
99 		.cmd		= DPLL_CMD_DEVICE_GET,
100 		.pre_doit	= dpll_pre_doit,
101 		.doit		= dpll_nl_device_get_doit,
102 		.post_doit	= dpll_post_doit,
103 		.policy		= dpll_device_get_nl_policy,
104 		.maxattr	= DPLL_A_ID,
105 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
106 	},
107 	{
108 		.cmd	= DPLL_CMD_DEVICE_GET,
109 		.dumpit	= dpll_nl_device_get_dumpit,
110 		.flags	= GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP,
111 	},
112 	{
113 		.cmd		= DPLL_CMD_DEVICE_SET,
114 		.pre_doit	= dpll_pre_doit,
115 		.doit		= dpll_nl_device_set_doit,
116 		.post_doit	= dpll_post_doit,
117 		.policy		= dpll_device_set_nl_policy,
118 		.maxattr	= DPLL_A_PHASE_OFFSET_AVG_FACTOR,
119 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
120 	},
121 	{
122 		.cmd		= DPLL_CMD_PIN_ID_GET,
123 		.pre_doit	= dpll_lock_doit,
124 		.doit		= dpll_nl_pin_id_get_doit,
125 		.post_doit	= dpll_unlock_doit,
126 		.policy		= dpll_pin_id_get_nl_policy,
127 		.maxattr	= DPLL_A_PIN_TYPE,
128 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
129 	},
130 	{
131 		.cmd		= DPLL_CMD_PIN_GET,
132 		.pre_doit	= dpll_pin_pre_doit,
133 		.doit		= dpll_nl_pin_get_doit,
134 		.post_doit	= dpll_pin_post_doit,
135 		.policy		= dpll_pin_get_do_nl_policy,
136 		.maxattr	= DPLL_A_PIN_ID,
137 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
138 	},
139 	{
140 		.cmd		= DPLL_CMD_PIN_GET,
141 		.dumpit		= dpll_nl_pin_get_dumpit,
142 		.policy		= dpll_pin_get_dump_nl_policy,
143 		.maxattr	= DPLL_A_PIN_ID,
144 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP,
145 	},
146 	{
147 		.cmd		= DPLL_CMD_PIN_SET,
148 		.pre_doit	= dpll_pin_pre_doit,
149 		.doit		= dpll_nl_pin_set_doit,
150 		.post_doit	= dpll_pin_post_doit,
151 		.policy		= dpll_pin_set_nl_policy,
152 		.maxattr	= DPLL_A_PIN_REFERENCE_SYNC,
153 		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,
154 	},
155 };
156 
157 static const struct genl_multicast_group dpll_nl_mcgrps[] = {
158 	[DPLL_NLGRP_MONITOR] = { "monitor", },
159 };
160 
161 struct genl_family dpll_nl_family __ro_after_init = {
162 	.name		= DPLL_FAMILY_NAME,
163 	.version	= DPLL_FAMILY_VERSION,
164 	.netnsok	= true,
165 	.parallel_ops	= true,
166 	.module		= THIS_MODULE,
167 	.split_ops	= dpll_nl_ops,
168 	.n_split_ops	= ARRAY_SIZE(dpll_nl_ops),
169 	.mcgrps		= dpll_nl_mcgrps,
170 	.n_mcgrps	= ARRAY_SIZE(dpll_nl_mcgrps),
171 };
172