1ffee2dc0SBinbin Zhou# SPDX-License-Identifier: GPL-2.0-only 2ffee2dc0SBinbin Zhou# 3ffee2dc0SBinbin Zhou# Loongson DMA controllers drivers 4ffee2dc0SBinbin Zhou# 5ffee2dc0SBinbin Zhouif MACH_LOONGSON32 || MACH_LOONGSON64 || COMPILE_TEST 6ffee2dc0SBinbin Zhou 7ffee2dc0SBinbin Zhouconfig LOONGSON1_APB_DMA 8ffee2dc0SBinbin Zhou tristate "Loongson1 APB DMA support" 9ffee2dc0SBinbin Zhou depends on MACH_LOONGSON32 || COMPILE_TEST 10ffee2dc0SBinbin Zhou select DMA_ENGINE 11ffee2dc0SBinbin Zhou select DMA_VIRTUAL_CHANNELS 12ffee2dc0SBinbin Zhou help 13ffee2dc0SBinbin Zhou This selects support for the APB DMA controller in Loongson1 SoCs, 14ffee2dc0SBinbin Zhou which is required by Loongson1 NAND and audio support. 15ffee2dc0SBinbin Zhou 16ffee2dc0SBinbin Zhouconfig LOONGSON2_APB_DMA 17ffee2dc0SBinbin Zhou tristate "Loongson2 APB DMA support" 18ffee2dc0SBinbin Zhou depends on MACH_LOONGSON64 || COMPILE_TEST 19ffee2dc0SBinbin Zhou select DMA_ENGINE 20ffee2dc0SBinbin Zhou select DMA_VIRTUAL_CHANNELS 21ffee2dc0SBinbin Zhou help 22ffee2dc0SBinbin Zhou Support for the Loongson2 APB DMA controller driver. The 23ffee2dc0SBinbin Zhou DMA controller is having single DMA channel which can be 24ffee2dc0SBinbin Zhou configured for different peripherals like audio, nand, sdio 25ffee2dc0SBinbin Zhou etc which is in APB bus. 26ffee2dc0SBinbin Zhou 27ffee2dc0SBinbin Zhou This DMA controller transfers data from memory to peripheral fifo. 28ffee2dc0SBinbin Zhou It does not support memory to memory data transfer. 29ffee2dc0SBinbin Zhou 30*1c0028e7SBinbin Zhouconfig LOONGSON2_APB_CMC_DMA 31*1c0028e7SBinbin Zhou tristate "Loongson2 Chain Multi-Channel DMA support" 32*1c0028e7SBinbin Zhou depends on MACH_LOONGSON64 || COMPILE_TEST 33*1c0028e7SBinbin Zhou select DMA_ENGINE 34*1c0028e7SBinbin Zhou select DMA_VIRTUAL_CHANNELS 35*1c0028e7SBinbin Zhou help 36*1c0028e7SBinbin Zhou Support for the Loongson Chain Multi-Channel DMA controller driver. 37*1c0028e7SBinbin Zhou It is discovered on the Loongson-2K chip (Loongson-2K0300/Loongson-2K3000), 38*1c0028e7SBinbin Zhou which has 4/8 channels internally, enabling bidirectional data transfer 39*1c0028e7SBinbin Zhou between devices and memory. 40*1c0028e7SBinbin Zhou 41ffee2dc0SBinbin Zhouendif 42