1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * PCI driver for the High Speed UART DMA 4 * 5 * Copyright (C) 2015 Intel Corporation 6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> 7 * 8 * Partially based on the bits found in drivers/tty/serial/mfd.c. 9 */ 10 11 #include <linux/bitops.h> 12 #include <linux/device.h> 13 #include <linux/module.h> 14 #include <linux/pci.h> 15 16 #include "hsu.h" 17 18 #define HSU_PCI_DMASR 0x00 19 #define HSU_PCI_DMAISR 0x04 20 21 #define HSU_PCI_CHAN_OFFSET 0x100 22 23 #define PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA 0x081e 24 #define PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA 0x1192 25 26 static irqreturn_t hsu_pci_irq(int irq, void *dev) 27 { 28 struct hsu_dma_chip *chip = dev; 29 unsigned long dmaisr; 30 unsigned short i; 31 u32 status; 32 int ret = 0; 33 int err; 34 35 dmaisr = readl(chip->regs + HSU_PCI_DMAISR); 36 for_each_set_bit(i, &dmaisr, chip->hsu->nr_channels) { 37 err = hsu_dma_get_status(chip, i, &status); 38 if (err > 0) 39 ret |= 1; 40 else if (err == 0) 41 ret |= hsu_dma_do_irq(chip, i, status); 42 } 43 44 return IRQ_RETVAL(ret); 45 } 46 47 static void hsu_pci_dma_remove(void *chip) 48 { 49 hsu_dma_remove(chip); 50 } 51 52 static int hsu_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 53 { 54 struct device *dev = &pdev->dev; 55 struct hsu_dma_chip *chip; 56 int ret; 57 58 ret = pcim_enable_device(pdev); 59 if (ret) 60 return ret; 61 62 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); 63 if (ret) { 64 dev_err(&pdev->dev, "I/O memory remapping failed\n"); 65 return ret; 66 } 67 68 pci_set_master(pdev); 69 pci_try_set_mwi(pdev); 70 71 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 72 if (ret) 73 return ret; 74 75 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 76 if (!chip) 77 return -ENOMEM; 78 79 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 80 if (ret < 0) 81 return ret; 82 83 chip->dev = &pdev->dev; 84 chip->regs = pcim_iomap_table(pdev)[0]; 85 chip->length = pci_resource_len(pdev, 0); 86 chip->offset = HSU_PCI_CHAN_OFFSET; 87 chip->irq = pci_irq_vector(pdev, 0); 88 89 ret = hsu_dma_probe(chip); 90 if (ret) 91 return ret; 92 93 ret = devm_add_action_or_reset(dev, hsu_pci_dma_remove, chip); 94 if (ret) 95 return ret; 96 97 ret = devm_request_irq(dev, chip->irq, hsu_pci_irq, 0, "hsu_dma_pci", chip); 98 if (ret) 99 return ret; 100 101 /* 102 * On Intel Tangier B0 and Anniedale the interrupt line, disregarding 103 * to have different numbers, is shared between HSU DMA and UART IPs. 104 * Thus on such SoCs we are expecting that IRQ handler is called in 105 * UART driver only. Instead of handling the spurious interrupt 106 * from HSU DMA here and waste CPU time and delay HSU UART interrupt 107 * handling, disable the interrupt entirely. 108 */ 109 if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA) 110 disable_irq_nosync(chip->irq); 111 112 pci_set_drvdata(pdev, chip); 113 114 return 0; 115 } 116 117 static const struct pci_device_id hsu_pci_id_table[] = { 118 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA), 0 }, 119 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA), 0 }, 120 { } 121 }; 122 MODULE_DEVICE_TABLE(pci, hsu_pci_id_table); 123 124 static struct pci_driver hsu_pci_driver = { 125 .name = "hsu_dma_pci", 126 .id_table = hsu_pci_id_table, 127 .probe = hsu_pci_probe, 128 }; 129 130 module_pci_driver(hsu_pci_driver); 131 132 MODULE_LICENSE("GPL v2"); 133 MODULE_DESCRIPTION("High Speed UART DMA PCI driver"); 134 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); 135