1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. 4 */ 5 6 /* 7 * This code implements the DMA subsystem. It provides a HW-neutral interface 8 * for other kernel code to use asynchronous memory copy capabilities, 9 * if present, and allows different HW DMA drivers to register as providing 10 * this capability. 11 * 12 * Due to the fact we are accelerating what is already a relatively fast 13 * operation, the code goes to great lengths to avoid additional overhead, 14 * such as locking. 15 * 16 * LOCKING: 17 * 18 * The subsystem keeps a global list of dma_device structs it is protected by a 19 * mutex, dma_list_mutex. 20 * 21 * A subsystem can get access to a channel by calling dmaengine_get() followed 22 * by dma_find_channel(), or if it has need for an exclusive channel it can call 23 * dma_request_channel(). Once a channel is allocated a reference is taken 24 * against its corresponding driver to disable removal. 25 * 26 * Each device has a channels list, which runs unlocked but is never modified 27 * once the device is registered, it's just setup by the driver. 28 * 29 * See Documentation/driver-api/dmaengine for more details 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/platform_device.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/init.h> 37 #include <linux/module.h> 38 #include <linux/mm.h> 39 #include <linux/device.h> 40 #include <linux/dmaengine.h> 41 #include <linux/hardirq.h> 42 #include <linux/spinlock.h> 43 #include <linux/percpu.h> 44 #include <linux/rcupdate.h> 45 #include <linux/mutex.h> 46 #include <linux/jiffies.h> 47 #include <linux/rculist.h> 48 #include <linux/idr.h> 49 #include <linux/slab.h> 50 #include <linux/acpi.h> 51 #include <linux/acpi_dma.h> 52 #include <linux/of_dma.h> 53 #include <linux/mempool.h> 54 #include <linux/numa.h> 55 56 static DEFINE_MUTEX(dma_list_mutex); 57 static DEFINE_IDA(dma_ida); 58 static LIST_HEAD(dma_device_list); 59 static long dmaengine_ref_count; 60 61 /* --- sysfs implementation --- */ 62 63 /** 64 * dev_to_dma_chan - convert a device pointer to the its sysfs container object 65 * @dev - device node 66 * 67 * Must be called under dma_list_mutex 68 */ 69 static struct dma_chan *dev_to_dma_chan(struct device *dev) 70 { 71 struct dma_chan_dev *chan_dev; 72 73 chan_dev = container_of(dev, typeof(*chan_dev), device); 74 return chan_dev->chan; 75 } 76 77 static ssize_t memcpy_count_show(struct device *dev, 78 struct device_attribute *attr, char *buf) 79 { 80 struct dma_chan *chan; 81 unsigned long count = 0; 82 int i; 83 int err; 84 85 mutex_lock(&dma_list_mutex); 86 chan = dev_to_dma_chan(dev); 87 if (chan) { 88 for_each_possible_cpu(i) 89 count += per_cpu_ptr(chan->local, i)->memcpy_count; 90 err = sprintf(buf, "%lu\n", count); 91 } else 92 err = -ENODEV; 93 mutex_unlock(&dma_list_mutex); 94 95 return err; 96 } 97 static DEVICE_ATTR_RO(memcpy_count); 98 99 static ssize_t bytes_transferred_show(struct device *dev, 100 struct device_attribute *attr, char *buf) 101 { 102 struct dma_chan *chan; 103 unsigned long count = 0; 104 int i; 105 int err; 106 107 mutex_lock(&dma_list_mutex); 108 chan = dev_to_dma_chan(dev); 109 if (chan) { 110 for_each_possible_cpu(i) 111 count += per_cpu_ptr(chan->local, i)->bytes_transferred; 112 err = sprintf(buf, "%lu\n", count); 113 } else 114 err = -ENODEV; 115 mutex_unlock(&dma_list_mutex); 116 117 return err; 118 } 119 static DEVICE_ATTR_RO(bytes_transferred); 120 121 static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, 122 char *buf) 123 { 124 struct dma_chan *chan; 125 int err; 126 127 mutex_lock(&dma_list_mutex); 128 chan = dev_to_dma_chan(dev); 129 if (chan) 130 err = sprintf(buf, "%d\n", chan->client_count); 131 else 132 err = -ENODEV; 133 mutex_unlock(&dma_list_mutex); 134 135 return err; 136 } 137 static DEVICE_ATTR_RO(in_use); 138 139 static struct attribute *dma_dev_attrs[] = { 140 &dev_attr_memcpy_count.attr, 141 &dev_attr_bytes_transferred.attr, 142 &dev_attr_in_use.attr, 143 NULL, 144 }; 145 ATTRIBUTE_GROUPS(dma_dev); 146 147 static void chan_dev_release(struct device *dev) 148 { 149 struct dma_chan_dev *chan_dev; 150 151 chan_dev = container_of(dev, typeof(*chan_dev), device); 152 if (atomic_dec_and_test(chan_dev->idr_ref)) { 153 ida_free(&dma_ida, chan_dev->dev_id); 154 kfree(chan_dev->idr_ref); 155 } 156 kfree(chan_dev); 157 } 158 159 static struct class dma_devclass = { 160 .name = "dma", 161 .dev_groups = dma_dev_groups, 162 .dev_release = chan_dev_release, 163 }; 164 165 /* --- client and device registration --- */ 166 167 #define dma_device_satisfies_mask(device, mask) \ 168 __dma_device_satisfies_mask((device), &(mask)) 169 static int 170 __dma_device_satisfies_mask(struct dma_device *device, 171 const dma_cap_mask_t *want) 172 { 173 dma_cap_mask_t has; 174 175 bitmap_and(has.bits, want->bits, device->cap_mask.bits, 176 DMA_TX_TYPE_END); 177 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); 178 } 179 180 static struct module *dma_chan_to_owner(struct dma_chan *chan) 181 { 182 return chan->device->dev->driver->owner; 183 } 184 185 /** 186 * balance_ref_count - catch up the channel reference count 187 * @chan - channel to balance ->client_count versus dmaengine_ref_count 188 * 189 * balance_ref_count must be called under dma_list_mutex 190 */ 191 static void balance_ref_count(struct dma_chan *chan) 192 { 193 struct module *owner = dma_chan_to_owner(chan); 194 195 while (chan->client_count < dmaengine_ref_count) { 196 __module_get(owner); 197 chan->client_count++; 198 } 199 } 200 201 /** 202 * dma_chan_get - try to grab a dma channel's parent driver module 203 * @chan - channel to grab 204 * 205 * Must be called under dma_list_mutex 206 */ 207 static int dma_chan_get(struct dma_chan *chan) 208 { 209 struct module *owner = dma_chan_to_owner(chan); 210 int ret; 211 212 /* The channel is already in use, update client count */ 213 if (chan->client_count) { 214 __module_get(owner); 215 goto out; 216 } 217 218 if (!try_module_get(owner)) 219 return -ENODEV; 220 221 /* allocate upon first client reference */ 222 if (chan->device->device_alloc_chan_resources) { 223 ret = chan->device->device_alloc_chan_resources(chan); 224 if (ret < 0) 225 goto err_out; 226 } 227 228 if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) 229 balance_ref_count(chan); 230 231 out: 232 chan->client_count++; 233 return 0; 234 235 err_out: 236 module_put(owner); 237 return ret; 238 } 239 240 /** 241 * dma_chan_put - drop a reference to a dma channel's parent driver module 242 * @chan - channel to release 243 * 244 * Must be called under dma_list_mutex 245 */ 246 static void dma_chan_put(struct dma_chan *chan) 247 { 248 /* This channel is not in use, bail out */ 249 if (!chan->client_count) 250 return; 251 252 chan->client_count--; 253 module_put(dma_chan_to_owner(chan)); 254 255 /* This channel is not in use anymore, free it */ 256 if (!chan->client_count && chan->device->device_free_chan_resources) { 257 /* Make sure all operations have completed */ 258 dmaengine_synchronize(chan); 259 chan->device->device_free_chan_resources(chan); 260 } 261 262 /* If the channel is used via a DMA request router, free the mapping */ 263 if (chan->router && chan->router->route_free) { 264 chan->router->route_free(chan->router->dev, chan->route_data); 265 chan->router = NULL; 266 chan->route_data = NULL; 267 } 268 } 269 270 enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) 271 { 272 enum dma_status status; 273 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 274 275 dma_async_issue_pending(chan); 276 do { 277 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); 278 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 279 dev_err(chan->device->dev, "%s: timeout!\n", __func__); 280 return DMA_ERROR; 281 } 282 if (status != DMA_IN_PROGRESS) 283 break; 284 cpu_relax(); 285 } while (1); 286 287 return status; 288 } 289 EXPORT_SYMBOL(dma_sync_wait); 290 291 /** 292 * dma_cap_mask_all - enable iteration over all operation types 293 */ 294 static dma_cap_mask_t dma_cap_mask_all; 295 296 /** 297 * dma_chan_tbl_ent - tracks channel allocations per core/operation 298 * @chan - associated channel for this entry 299 */ 300 struct dma_chan_tbl_ent { 301 struct dma_chan *chan; 302 }; 303 304 /** 305 * channel_table - percpu lookup table for memory-to-memory offload providers 306 */ 307 static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; 308 309 static int __init dma_channel_table_init(void) 310 { 311 enum dma_transaction_type cap; 312 int err = 0; 313 314 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); 315 316 /* 'interrupt', 'private', and 'slave' are channel capabilities, 317 * but are not associated with an operation so they do not need 318 * an entry in the channel_table 319 */ 320 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); 321 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); 322 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); 323 324 for_each_dma_cap_mask(cap, dma_cap_mask_all) { 325 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); 326 if (!channel_table[cap]) { 327 err = -ENOMEM; 328 break; 329 } 330 } 331 332 if (err) { 333 pr_err("initialization failure\n"); 334 for_each_dma_cap_mask(cap, dma_cap_mask_all) 335 free_percpu(channel_table[cap]); 336 } 337 338 return err; 339 } 340 arch_initcall(dma_channel_table_init); 341 342 /** 343 * dma_find_channel - find a channel to carry out the operation 344 * @tx_type: transaction type 345 */ 346 struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) 347 { 348 return this_cpu_read(channel_table[tx_type]->chan); 349 } 350 EXPORT_SYMBOL(dma_find_channel); 351 352 /** 353 * dma_issue_pending_all - flush all pending operations across all channels 354 */ 355 void dma_issue_pending_all(void) 356 { 357 struct dma_device *device; 358 struct dma_chan *chan; 359 360 rcu_read_lock(); 361 list_for_each_entry_rcu(device, &dma_device_list, global_node) { 362 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 363 continue; 364 list_for_each_entry(chan, &device->channels, device_node) 365 if (chan->client_count) 366 device->device_issue_pending(chan); 367 } 368 rcu_read_unlock(); 369 } 370 EXPORT_SYMBOL(dma_issue_pending_all); 371 372 /** 373 * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu 374 */ 375 static bool dma_chan_is_local(struct dma_chan *chan, int cpu) 376 { 377 int node = dev_to_node(chan->device->dev); 378 return node == NUMA_NO_NODE || 379 cpumask_test_cpu(cpu, cpumask_of_node(node)); 380 } 381 382 /** 383 * min_chan - returns the channel with min count and in the same numa-node as the cpu 384 * @cap: capability to match 385 * @cpu: cpu index which the channel should be close to 386 * 387 * If some channels are close to the given cpu, the one with the lowest 388 * reference count is returned. Otherwise, cpu is ignored and only the 389 * reference count is taken into account. 390 * Must be called under dma_list_mutex. 391 */ 392 static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) 393 { 394 struct dma_device *device; 395 struct dma_chan *chan; 396 struct dma_chan *min = NULL; 397 struct dma_chan *localmin = NULL; 398 399 list_for_each_entry(device, &dma_device_list, global_node) { 400 if (!dma_has_cap(cap, device->cap_mask) || 401 dma_has_cap(DMA_PRIVATE, device->cap_mask)) 402 continue; 403 list_for_each_entry(chan, &device->channels, device_node) { 404 if (!chan->client_count) 405 continue; 406 if (!min || chan->table_count < min->table_count) 407 min = chan; 408 409 if (dma_chan_is_local(chan, cpu)) 410 if (!localmin || 411 chan->table_count < localmin->table_count) 412 localmin = chan; 413 } 414 } 415 416 chan = localmin ? localmin : min; 417 418 if (chan) 419 chan->table_count++; 420 421 return chan; 422 } 423 424 /** 425 * dma_channel_rebalance - redistribute the available channels 426 * 427 * Optimize for cpu isolation (each cpu gets a dedicated channel for an 428 * operation type) in the SMP case, and operation isolation (avoid 429 * multi-tasking channels) in the non-SMP case. Must be called under 430 * dma_list_mutex. 431 */ 432 static void dma_channel_rebalance(void) 433 { 434 struct dma_chan *chan; 435 struct dma_device *device; 436 int cpu; 437 int cap; 438 439 /* undo the last distribution */ 440 for_each_dma_cap_mask(cap, dma_cap_mask_all) 441 for_each_possible_cpu(cpu) 442 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; 443 444 list_for_each_entry(device, &dma_device_list, global_node) { 445 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 446 continue; 447 list_for_each_entry(chan, &device->channels, device_node) 448 chan->table_count = 0; 449 } 450 451 /* don't populate the channel_table if no clients are available */ 452 if (!dmaengine_ref_count) 453 return; 454 455 /* redistribute available channels */ 456 for_each_dma_cap_mask(cap, dma_cap_mask_all) 457 for_each_online_cpu(cpu) { 458 chan = min_chan(cap, cpu); 459 per_cpu_ptr(channel_table[cap], cpu)->chan = chan; 460 } 461 } 462 463 int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) 464 { 465 struct dma_device *device; 466 467 if (!chan || !caps) 468 return -EINVAL; 469 470 device = chan->device; 471 472 /* check if the channel supports slave transactions */ 473 if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) || 474 test_bit(DMA_CYCLIC, device->cap_mask.bits))) 475 return -ENXIO; 476 477 /* 478 * Check whether it reports it uses the generic slave 479 * capabilities, if not, that means it doesn't support any 480 * kind of slave capabilities reporting. 481 */ 482 if (!device->directions) 483 return -ENXIO; 484 485 caps->src_addr_widths = device->src_addr_widths; 486 caps->dst_addr_widths = device->dst_addr_widths; 487 caps->directions = device->directions; 488 caps->max_burst = device->max_burst; 489 caps->residue_granularity = device->residue_granularity; 490 caps->descriptor_reuse = device->descriptor_reuse; 491 caps->cmd_pause = !!device->device_pause; 492 caps->cmd_resume = !!device->device_resume; 493 caps->cmd_terminate = !!device->device_terminate_all; 494 495 return 0; 496 } 497 EXPORT_SYMBOL_GPL(dma_get_slave_caps); 498 499 static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, 500 struct dma_device *dev, 501 dma_filter_fn fn, void *fn_param) 502 { 503 struct dma_chan *chan; 504 505 if (mask && !__dma_device_satisfies_mask(dev, mask)) { 506 dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__); 507 return NULL; 508 } 509 /* devices with multiple channels need special handling as we need to 510 * ensure that all channels are either private or public. 511 */ 512 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) 513 list_for_each_entry(chan, &dev->channels, device_node) { 514 /* some channels are already publicly allocated */ 515 if (chan->client_count) 516 return NULL; 517 } 518 519 list_for_each_entry(chan, &dev->channels, device_node) { 520 if (chan->client_count) { 521 dev_dbg(dev->dev, "%s: %s busy\n", 522 __func__, dma_chan_name(chan)); 523 continue; 524 } 525 if (fn && !fn(chan, fn_param)) { 526 dev_dbg(dev->dev, "%s: %s filter said false\n", 527 __func__, dma_chan_name(chan)); 528 continue; 529 } 530 return chan; 531 } 532 533 return NULL; 534 } 535 536 static struct dma_chan *find_candidate(struct dma_device *device, 537 const dma_cap_mask_t *mask, 538 dma_filter_fn fn, void *fn_param) 539 { 540 struct dma_chan *chan = private_candidate(mask, device, fn, fn_param); 541 int err; 542 543 if (chan) { 544 /* Found a suitable channel, try to grab, prep, and return it. 545 * We first set DMA_PRIVATE to disable balance_ref_count as this 546 * channel will not be published in the general-purpose 547 * allocator 548 */ 549 dma_cap_set(DMA_PRIVATE, device->cap_mask); 550 device->privatecnt++; 551 err = dma_chan_get(chan); 552 553 if (err) { 554 if (err == -ENODEV) { 555 dev_dbg(device->dev, "%s: %s module removed\n", 556 __func__, dma_chan_name(chan)); 557 list_del_rcu(&device->global_node); 558 } else 559 dev_dbg(device->dev, 560 "%s: failed to get %s: (%d)\n", 561 __func__, dma_chan_name(chan), err); 562 563 if (--device->privatecnt == 0) 564 dma_cap_clear(DMA_PRIVATE, device->cap_mask); 565 566 chan = ERR_PTR(err); 567 } 568 } 569 570 return chan ? chan : ERR_PTR(-EPROBE_DEFER); 571 } 572 573 /** 574 * dma_get_slave_channel - try to get specific channel exclusively 575 * @chan: target channel 576 */ 577 struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) 578 { 579 int err = -EBUSY; 580 581 /* lock against __dma_request_channel */ 582 mutex_lock(&dma_list_mutex); 583 584 if (chan->client_count == 0) { 585 struct dma_device *device = chan->device; 586 587 dma_cap_set(DMA_PRIVATE, device->cap_mask); 588 device->privatecnt++; 589 err = dma_chan_get(chan); 590 if (err) { 591 dev_dbg(chan->device->dev, 592 "%s: failed to get %s: (%d)\n", 593 __func__, dma_chan_name(chan), err); 594 chan = NULL; 595 if (--device->privatecnt == 0) 596 dma_cap_clear(DMA_PRIVATE, device->cap_mask); 597 } 598 } else 599 chan = NULL; 600 601 mutex_unlock(&dma_list_mutex); 602 603 604 return chan; 605 } 606 EXPORT_SYMBOL_GPL(dma_get_slave_channel); 607 608 struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) 609 { 610 dma_cap_mask_t mask; 611 struct dma_chan *chan; 612 613 dma_cap_zero(mask); 614 dma_cap_set(DMA_SLAVE, mask); 615 616 /* lock against __dma_request_channel */ 617 mutex_lock(&dma_list_mutex); 618 619 chan = find_candidate(device, &mask, NULL, NULL); 620 621 mutex_unlock(&dma_list_mutex); 622 623 return IS_ERR(chan) ? NULL : chan; 624 } 625 EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); 626 627 /** 628 * __dma_request_channel - try to allocate an exclusive channel 629 * @mask: capabilities that the channel must satisfy 630 * @fn: optional callback to disposition available channels 631 * @fn_param: opaque parameter to pass to dma_filter_fn 632 * 633 * Returns pointer to appropriate DMA channel on success or NULL. 634 */ 635 struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, 636 dma_filter_fn fn, void *fn_param) 637 { 638 struct dma_device *device, *_d; 639 struct dma_chan *chan = NULL; 640 641 /* Find a channel */ 642 mutex_lock(&dma_list_mutex); 643 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 644 chan = find_candidate(device, mask, fn, fn_param); 645 if (!IS_ERR(chan)) 646 break; 647 648 chan = NULL; 649 } 650 mutex_unlock(&dma_list_mutex); 651 652 pr_debug("%s: %s (%s)\n", 653 __func__, 654 chan ? "success" : "fail", 655 chan ? dma_chan_name(chan) : NULL); 656 657 return chan; 658 } 659 EXPORT_SYMBOL_GPL(__dma_request_channel); 660 661 static const struct dma_slave_map *dma_filter_match(struct dma_device *device, 662 const char *name, 663 struct device *dev) 664 { 665 int i; 666 667 if (!device->filter.mapcnt) 668 return NULL; 669 670 for (i = 0; i < device->filter.mapcnt; i++) { 671 const struct dma_slave_map *map = &device->filter.map[i]; 672 673 if (!strcmp(map->devname, dev_name(dev)) && 674 !strcmp(map->slave, name)) 675 return map; 676 } 677 678 return NULL; 679 } 680 681 /** 682 * dma_request_chan - try to allocate an exclusive slave channel 683 * @dev: pointer to client device structure 684 * @name: slave channel name 685 * 686 * Returns pointer to appropriate DMA channel on success or an error pointer. 687 */ 688 struct dma_chan *dma_request_chan(struct device *dev, const char *name) 689 { 690 struct dma_device *d, *_d; 691 struct dma_chan *chan = NULL; 692 693 /* If device-tree is present get slave info from here */ 694 if (dev->of_node) 695 chan = of_dma_request_slave_channel(dev->of_node, name); 696 697 /* If device was enumerated by ACPI get slave info from here */ 698 if (has_acpi_companion(dev) && !chan) 699 chan = acpi_dma_request_slave_chan_by_name(dev, name); 700 701 if (chan) { 702 /* Valid channel found or requester need to be deferred */ 703 if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER) 704 return chan; 705 } 706 707 /* Try to find the channel via the DMA filter map(s) */ 708 mutex_lock(&dma_list_mutex); 709 list_for_each_entry_safe(d, _d, &dma_device_list, global_node) { 710 dma_cap_mask_t mask; 711 const struct dma_slave_map *map = dma_filter_match(d, name, dev); 712 713 if (!map) 714 continue; 715 716 dma_cap_zero(mask); 717 dma_cap_set(DMA_SLAVE, mask); 718 719 chan = find_candidate(d, &mask, d->filter.fn, map->param); 720 if (!IS_ERR(chan)) 721 break; 722 } 723 mutex_unlock(&dma_list_mutex); 724 725 return chan ? chan : ERR_PTR(-EPROBE_DEFER); 726 } 727 EXPORT_SYMBOL_GPL(dma_request_chan); 728 729 /** 730 * dma_request_slave_channel - try to allocate an exclusive slave channel 731 * @dev: pointer to client device structure 732 * @name: slave channel name 733 * 734 * Returns pointer to appropriate DMA channel on success or NULL. 735 */ 736 struct dma_chan *dma_request_slave_channel(struct device *dev, 737 const char *name) 738 { 739 struct dma_chan *ch = dma_request_chan(dev, name); 740 if (IS_ERR(ch)) 741 return NULL; 742 743 return ch; 744 } 745 EXPORT_SYMBOL_GPL(dma_request_slave_channel); 746 747 /** 748 * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities 749 * @mask: capabilities that the channel must satisfy 750 * 751 * Returns pointer to appropriate DMA channel on success or an error pointer. 752 */ 753 struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask) 754 { 755 struct dma_chan *chan; 756 757 if (!mask) 758 return ERR_PTR(-ENODEV); 759 760 chan = __dma_request_channel(mask, NULL, NULL); 761 if (!chan) { 762 mutex_lock(&dma_list_mutex); 763 if (list_empty(&dma_device_list)) 764 chan = ERR_PTR(-EPROBE_DEFER); 765 else 766 chan = ERR_PTR(-ENODEV); 767 mutex_unlock(&dma_list_mutex); 768 } 769 770 return chan; 771 } 772 EXPORT_SYMBOL_GPL(dma_request_chan_by_mask); 773 774 void dma_release_channel(struct dma_chan *chan) 775 { 776 mutex_lock(&dma_list_mutex); 777 WARN_ONCE(chan->client_count != 1, 778 "chan reference count %d != 1\n", chan->client_count); 779 dma_chan_put(chan); 780 /* drop PRIVATE cap enabled by __dma_request_channel() */ 781 if (--chan->device->privatecnt == 0) 782 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); 783 mutex_unlock(&dma_list_mutex); 784 } 785 EXPORT_SYMBOL_GPL(dma_release_channel); 786 787 /** 788 * dmaengine_get - register interest in dma_channels 789 */ 790 void dmaengine_get(void) 791 { 792 struct dma_device *device, *_d; 793 struct dma_chan *chan; 794 int err; 795 796 mutex_lock(&dma_list_mutex); 797 dmaengine_ref_count++; 798 799 /* try to grab channels */ 800 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 801 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 802 continue; 803 list_for_each_entry(chan, &device->channels, device_node) { 804 err = dma_chan_get(chan); 805 if (err == -ENODEV) { 806 /* module removed before we could use it */ 807 list_del_rcu(&device->global_node); 808 break; 809 } else if (err) 810 dev_dbg(chan->device->dev, 811 "%s: failed to get %s: (%d)\n", 812 __func__, dma_chan_name(chan), err); 813 } 814 } 815 816 /* if this is the first reference and there were channels 817 * waiting we need to rebalance to get those channels 818 * incorporated into the channel table 819 */ 820 if (dmaengine_ref_count == 1) 821 dma_channel_rebalance(); 822 mutex_unlock(&dma_list_mutex); 823 } 824 EXPORT_SYMBOL(dmaengine_get); 825 826 /** 827 * dmaengine_put - let dma drivers be removed when ref_count == 0 828 */ 829 void dmaengine_put(void) 830 { 831 struct dma_device *device; 832 struct dma_chan *chan; 833 834 mutex_lock(&dma_list_mutex); 835 dmaengine_ref_count--; 836 BUG_ON(dmaengine_ref_count < 0); 837 /* drop channel references */ 838 list_for_each_entry(device, &dma_device_list, global_node) { 839 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 840 continue; 841 list_for_each_entry(chan, &device->channels, device_node) 842 dma_chan_put(chan); 843 } 844 mutex_unlock(&dma_list_mutex); 845 } 846 EXPORT_SYMBOL(dmaengine_put); 847 848 static bool device_has_all_tx_types(struct dma_device *device) 849 { 850 /* A device that satisfies this test has channels that will never cause 851 * an async_tx channel switch event as all possible operation types can 852 * be handled. 853 */ 854 #ifdef CONFIG_ASYNC_TX_DMA 855 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) 856 return false; 857 #endif 858 859 #if IS_ENABLED(CONFIG_ASYNC_MEMCPY) 860 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) 861 return false; 862 #endif 863 864 #if IS_ENABLED(CONFIG_ASYNC_XOR) 865 if (!dma_has_cap(DMA_XOR, device->cap_mask)) 866 return false; 867 868 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA 869 if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) 870 return false; 871 #endif 872 #endif 873 874 #if IS_ENABLED(CONFIG_ASYNC_PQ) 875 if (!dma_has_cap(DMA_PQ, device->cap_mask)) 876 return false; 877 878 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA 879 if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) 880 return false; 881 #endif 882 #endif 883 884 return true; 885 } 886 887 static int get_dma_id(struct dma_device *device) 888 { 889 int rc = ida_alloc(&dma_ida, GFP_KERNEL); 890 891 if (rc < 0) 892 return rc; 893 device->dev_id = rc; 894 return 0; 895 } 896 897 /** 898 * dma_async_device_register - registers DMA devices found 899 * @device: &dma_device 900 */ 901 int dma_async_device_register(struct dma_device *device) 902 { 903 int chancnt = 0, rc; 904 struct dma_chan* chan; 905 atomic_t *idr_ref; 906 907 if (!device) 908 return -ENODEV; 909 910 /* validate device routines */ 911 if (!device->dev) { 912 pr_err("DMAdevice must have dev\n"); 913 return -EIO; 914 } 915 916 if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) { 917 dev_err(device->dev, 918 "Device claims capability %s, but op is not defined\n", 919 "DMA_MEMCPY"); 920 return -EIO; 921 } 922 923 if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) { 924 dev_err(device->dev, 925 "Device claims capability %s, but op is not defined\n", 926 "DMA_XOR"); 927 return -EIO; 928 } 929 930 if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) { 931 dev_err(device->dev, 932 "Device claims capability %s, but op is not defined\n", 933 "DMA_XOR_VAL"); 934 return -EIO; 935 } 936 937 if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) { 938 dev_err(device->dev, 939 "Device claims capability %s, but op is not defined\n", 940 "DMA_PQ"); 941 return -EIO; 942 } 943 944 if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) { 945 dev_err(device->dev, 946 "Device claims capability %s, but op is not defined\n", 947 "DMA_PQ_VAL"); 948 return -EIO; 949 } 950 951 if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) { 952 dev_err(device->dev, 953 "Device claims capability %s, but op is not defined\n", 954 "DMA_MEMSET"); 955 return -EIO; 956 } 957 958 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) { 959 dev_err(device->dev, 960 "Device claims capability %s, but op is not defined\n", 961 "DMA_INTERRUPT"); 962 return -EIO; 963 } 964 965 if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) { 966 dev_err(device->dev, 967 "Device claims capability %s, but op is not defined\n", 968 "DMA_CYCLIC"); 969 return -EIO; 970 } 971 972 if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) { 973 dev_err(device->dev, 974 "Device claims capability %s, but op is not defined\n", 975 "DMA_INTERLEAVE"); 976 return -EIO; 977 } 978 979 980 if (!device->device_tx_status) { 981 dev_err(device->dev, "Device tx_status is not defined\n"); 982 return -EIO; 983 } 984 985 986 if (!device->device_issue_pending) { 987 dev_err(device->dev, "Device issue_pending is not defined\n"); 988 return -EIO; 989 } 990 991 /* note: this only matters in the 992 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case 993 */ 994 if (device_has_all_tx_types(device)) 995 dma_cap_set(DMA_ASYNC_TX, device->cap_mask); 996 997 idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); 998 if (!idr_ref) 999 return -ENOMEM; 1000 rc = get_dma_id(device); 1001 if (rc != 0) { 1002 kfree(idr_ref); 1003 return rc; 1004 } 1005 1006 atomic_set(idr_ref, 0); 1007 1008 /* represent channels in sysfs. Probably want devs too */ 1009 list_for_each_entry(chan, &device->channels, device_node) { 1010 rc = -ENOMEM; 1011 chan->local = alloc_percpu(typeof(*chan->local)); 1012 if (chan->local == NULL) 1013 goto err_out; 1014 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); 1015 if (chan->dev == NULL) { 1016 free_percpu(chan->local); 1017 chan->local = NULL; 1018 goto err_out; 1019 } 1020 1021 chan->chan_id = chancnt++; 1022 chan->dev->device.class = &dma_devclass; 1023 chan->dev->device.parent = device->dev; 1024 chan->dev->chan = chan; 1025 chan->dev->idr_ref = idr_ref; 1026 chan->dev->dev_id = device->dev_id; 1027 atomic_inc(idr_ref); 1028 dev_set_name(&chan->dev->device, "dma%dchan%d", 1029 device->dev_id, chan->chan_id); 1030 1031 rc = device_register(&chan->dev->device); 1032 if (rc) { 1033 free_percpu(chan->local); 1034 chan->local = NULL; 1035 kfree(chan->dev); 1036 atomic_dec(idr_ref); 1037 goto err_out; 1038 } 1039 chan->client_count = 0; 1040 } 1041 1042 if (!chancnt) { 1043 dev_err(device->dev, "%s: device has no channels!\n", __func__); 1044 rc = -ENODEV; 1045 goto err_out; 1046 } 1047 1048 device->chancnt = chancnt; 1049 1050 mutex_lock(&dma_list_mutex); 1051 /* take references on public channels */ 1052 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) 1053 list_for_each_entry(chan, &device->channels, device_node) { 1054 /* if clients are already waiting for channels we need 1055 * to take references on their behalf 1056 */ 1057 if (dma_chan_get(chan) == -ENODEV) { 1058 /* note we can only get here for the first 1059 * channel as the remaining channels are 1060 * guaranteed to get a reference 1061 */ 1062 rc = -ENODEV; 1063 mutex_unlock(&dma_list_mutex); 1064 goto err_out; 1065 } 1066 } 1067 list_add_tail_rcu(&device->global_node, &dma_device_list); 1068 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 1069 device->privatecnt++; /* Always private */ 1070 dma_channel_rebalance(); 1071 mutex_unlock(&dma_list_mutex); 1072 1073 return 0; 1074 1075 err_out: 1076 /* if we never registered a channel just release the idr */ 1077 if (atomic_read(idr_ref) == 0) { 1078 ida_free(&dma_ida, device->dev_id); 1079 kfree(idr_ref); 1080 return rc; 1081 } 1082 1083 list_for_each_entry(chan, &device->channels, device_node) { 1084 if (chan->local == NULL) 1085 continue; 1086 mutex_lock(&dma_list_mutex); 1087 chan->dev->chan = NULL; 1088 mutex_unlock(&dma_list_mutex); 1089 device_unregister(&chan->dev->device); 1090 free_percpu(chan->local); 1091 } 1092 return rc; 1093 } 1094 EXPORT_SYMBOL(dma_async_device_register); 1095 1096 /** 1097 * dma_async_device_unregister - unregister a DMA device 1098 * @device: &dma_device 1099 * 1100 * This routine is called by dma driver exit routines, dmaengine holds module 1101 * references to prevent it being called while channels are in use. 1102 */ 1103 void dma_async_device_unregister(struct dma_device *device) 1104 { 1105 struct dma_chan *chan; 1106 1107 mutex_lock(&dma_list_mutex); 1108 list_del_rcu(&device->global_node); 1109 dma_channel_rebalance(); 1110 mutex_unlock(&dma_list_mutex); 1111 1112 list_for_each_entry(chan, &device->channels, device_node) { 1113 WARN_ONCE(chan->client_count, 1114 "%s called while %d clients hold a reference\n", 1115 __func__, chan->client_count); 1116 mutex_lock(&dma_list_mutex); 1117 chan->dev->chan = NULL; 1118 mutex_unlock(&dma_list_mutex); 1119 device_unregister(&chan->dev->device); 1120 free_percpu(chan->local); 1121 } 1122 } 1123 EXPORT_SYMBOL(dma_async_device_unregister); 1124 1125 static void dmam_device_release(struct device *dev, void *res) 1126 { 1127 struct dma_device *device; 1128 1129 device = *(struct dma_device **)res; 1130 dma_async_device_unregister(device); 1131 } 1132 1133 /** 1134 * dmaenginem_async_device_register - registers DMA devices found 1135 * @device: &dma_device 1136 * 1137 * The operation is managed and will be undone on driver detach. 1138 */ 1139 int dmaenginem_async_device_register(struct dma_device *device) 1140 { 1141 void *p; 1142 int ret; 1143 1144 p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL); 1145 if (!p) 1146 return -ENOMEM; 1147 1148 ret = dma_async_device_register(device); 1149 if (!ret) { 1150 *(struct dma_device **)p = device; 1151 devres_add(device->dev, p); 1152 } else { 1153 devres_free(p); 1154 } 1155 1156 return ret; 1157 } 1158 EXPORT_SYMBOL(dmaenginem_async_device_register); 1159 1160 struct dmaengine_unmap_pool { 1161 struct kmem_cache *cache; 1162 const char *name; 1163 mempool_t *pool; 1164 size_t size; 1165 }; 1166 1167 #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } 1168 static struct dmaengine_unmap_pool unmap_pool[] = { 1169 __UNMAP_POOL(2), 1170 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) 1171 __UNMAP_POOL(16), 1172 __UNMAP_POOL(128), 1173 __UNMAP_POOL(256), 1174 #endif 1175 }; 1176 1177 static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) 1178 { 1179 int order = get_count_order(nr); 1180 1181 switch (order) { 1182 case 0 ... 1: 1183 return &unmap_pool[0]; 1184 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) 1185 case 2 ... 4: 1186 return &unmap_pool[1]; 1187 case 5 ... 7: 1188 return &unmap_pool[2]; 1189 case 8: 1190 return &unmap_pool[3]; 1191 #endif 1192 default: 1193 BUG(); 1194 return NULL; 1195 } 1196 } 1197 1198 static void dmaengine_unmap(struct kref *kref) 1199 { 1200 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); 1201 struct device *dev = unmap->dev; 1202 int cnt, i; 1203 1204 cnt = unmap->to_cnt; 1205 for (i = 0; i < cnt; i++) 1206 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1207 DMA_TO_DEVICE); 1208 cnt += unmap->from_cnt; 1209 for (; i < cnt; i++) 1210 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1211 DMA_FROM_DEVICE); 1212 cnt += unmap->bidi_cnt; 1213 for (; i < cnt; i++) { 1214 if (unmap->addr[i] == 0) 1215 continue; 1216 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1217 DMA_BIDIRECTIONAL); 1218 } 1219 cnt = unmap->map_cnt; 1220 mempool_free(unmap, __get_unmap_pool(cnt)->pool); 1221 } 1222 1223 void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) 1224 { 1225 if (unmap) 1226 kref_put(&unmap->kref, dmaengine_unmap); 1227 } 1228 EXPORT_SYMBOL_GPL(dmaengine_unmap_put); 1229 1230 static void dmaengine_destroy_unmap_pool(void) 1231 { 1232 int i; 1233 1234 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1235 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1236 1237 mempool_destroy(p->pool); 1238 p->pool = NULL; 1239 kmem_cache_destroy(p->cache); 1240 p->cache = NULL; 1241 } 1242 } 1243 1244 static int __init dmaengine_init_unmap_pool(void) 1245 { 1246 int i; 1247 1248 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1249 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1250 size_t size; 1251 1252 size = sizeof(struct dmaengine_unmap_data) + 1253 sizeof(dma_addr_t) * p->size; 1254 1255 p->cache = kmem_cache_create(p->name, size, 0, 1256 SLAB_HWCACHE_ALIGN, NULL); 1257 if (!p->cache) 1258 break; 1259 p->pool = mempool_create_slab_pool(1, p->cache); 1260 if (!p->pool) 1261 break; 1262 } 1263 1264 if (i == ARRAY_SIZE(unmap_pool)) 1265 return 0; 1266 1267 dmaengine_destroy_unmap_pool(); 1268 return -ENOMEM; 1269 } 1270 1271 struct dmaengine_unmap_data * 1272 dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) 1273 { 1274 struct dmaengine_unmap_data *unmap; 1275 1276 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); 1277 if (!unmap) 1278 return NULL; 1279 1280 memset(unmap, 0, sizeof(*unmap)); 1281 kref_init(&unmap->kref); 1282 unmap->dev = dev; 1283 unmap->map_cnt = nr; 1284 1285 return unmap; 1286 } 1287 EXPORT_SYMBOL(dmaengine_get_unmap_data); 1288 1289 void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, 1290 struct dma_chan *chan) 1291 { 1292 tx->chan = chan; 1293 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH 1294 spin_lock_init(&tx->lock); 1295 #endif 1296 } 1297 EXPORT_SYMBOL(dma_async_tx_descriptor_init); 1298 1299 /* dma_wait_for_async_tx - spin wait for a transaction to complete 1300 * @tx: in-flight transaction to wait on 1301 */ 1302 enum dma_status 1303 dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) 1304 { 1305 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 1306 1307 if (!tx) 1308 return DMA_COMPLETE; 1309 1310 while (tx->cookie == -EBUSY) { 1311 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 1312 dev_err(tx->chan->device->dev, 1313 "%s timeout waiting for descriptor submission\n", 1314 __func__); 1315 return DMA_ERROR; 1316 } 1317 cpu_relax(); 1318 } 1319 return dma_sync_wait(tx->chan, tx->cookie); 1320 } 1321 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); 1322 1323 /* dma_run_dependencies - helper routine for dma drivers to process 1324 * (start) dependent operations on their target channel 1325 * @tx: transaction with dependencies 1326 */ 1327 void dma_run_dependencies(struct dma_async_tx_descriptor *tx) 1328 { 1329 struct dma_async_tx_descriptor *dep = txd_next(tx); 1330 struct dma_async_tx_descriptor *dep_next; 1331 struct dma_chan *chan; 1332 1333 if (!dep) 1334 return; 1335 1336 /* we'll submit tx->next now, so clear the link */ 1337 txd_clear_next(tx); 1338 chan = dep->chan; 1339 1340 /* keep submitting up until a channel switch is detected 1341 * in that case we will be called again as a result of 1342 * processing the interrupt from async_tx_channel_switch 1343 */ 1344 for (; dep; dep = dep_next) { 1345 txd_lock(dep); 1346 txd_clear_parent(dep); 1347 dep_next = txd_next(dep); 1348 if (dep_next && dep_next->chan == chan) 1349 txd_clear_next(dep); /* ->next will be submitted */ 1350 else 1351 dep_next = NULL; /* submit current dep and terminate */ 1352 txd_unlock(dep); 1353 1354 dep->tx_submit(dep); 1355 } 1356 1357 chan->device->device_issue_pending(chan); 1358 } 1359 EXPORT_SYMBOL_GPL(dma_run_dependencies); 1360 1361 static int __init dma_bus_init(void) 1362 { 1363 int err = dmaengine_init_unmap_pool(); 1364 1365 if (err) 1366 return err; 1367 return class_register(&dma_devclass); 1368 } 1369 arch_initcall(dma_bus_init); 1370 1371 1372