1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. 4 */ 5 6 /* 7 * This code implements the DMA subsystem. It provides a HW-neutral interface 8 * for other kernel code to use asynchronous memory copy capabilities, 9 * if present, and allows different HW DMA drivers to register as providing 10 * this capability. 11 * 12 * Due to the fact we are accelerating what is already a relatively fast 13 * operation, the code goes to great lengths to avoid additional overhead, 14 * such as locking. 15 * 16 * LOCKING: 17 * 18 * The subsystem keeps a global list of dma_device structs it is protected by a 19 * mutex, dma_list_mutex. 20 * 21 * A subsystem can get access to a channel by calling dmaengine_get() followed 22 * by dma_find_channel(), or if it has need for an exclusive channel it can call 23 * dma_request_channel(). Once a channel is allocated a reference is taken 24 * against its corresponding driver to disable removal. 25 * 26 * Each device has a channels list, which runs unlocked but is never modified 27 * once the device is registered, it's just setup by the driver. 28 * 29 * See Documentation/driver-api/dmaengine for more details 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/platform_device.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/init.h> 37 #include <linux/module.h> 38 #include <linux/mm.h> 39 #include <linux/device.h> 40 #include <linux/dmaengine.h> 41 #include <linux/hardirq.h> 42 #include <linux/spinlock.h> 43 #include <linux/percpu.h> 44 #include <linux/rcupdate.h> 45 #include <linux/mutex.h> 46 #include <linux/jiffies.h> 47 #include <linux/rculist.h> 48 #include <linux/idr.h> 49 #include <linux/slab.h> 50 #include <linux/acpi.h> 51 #include <linux/acpi_dma.h> 52 #include <linux/of_dma.h> 53 #include <linux/mempool.h> 54 #include <linux/numa.h> 55 56 static DEFINE_MUTEX(dma_list_mutex); 57 static DEFINE_IDA(dma_ida); 58 static LIST_HEAD(dma_device_list); 59 static long dmaengine_ref_count; 60 61 /* --- sysfs implementation --- */ 62 63 #define DMA_SLAVE_NAME "slave" 64 65 /** 66 * dev_to_dma_chan - convert a device pointer to its sysfs container object 67 * @dev - device node 68 * 69 * Must be called under dma_list_mutex 70 */ 71 static struct dma_chan *dev_to_dma_chan(struct device *dev) 72 { 73 struct dma_chan_dev *chan_dev; 74 75 chan_dev = container_of(dev, typeof(*chan_dev), device); 76 return chan_dev->chan; 77 } 78 79 static ssize_t memcpy_count_show(struct device *dev, 80 struct device_attribute *attr, char *buf) 81 { 82 struct dma_chan *chan; 83 unsigned long count = 0; 84 int i; 85 int err; 86 87 mutex_lock(&dma_list_mutex); 88 chan = dev_to_dma_chan(dev); 89 if (chan) { 90 for_each_possible_cpu(i) 91 count += per_cpu_ptr(chan->local, i)->memcpy_count; 92 err = sprintf(buf, "%lu\n", count); 93 } else 94 err = -ENODEV; 95 mutex_unlock(&dma_list_mutex); 96 97 return err; 98 } 99 static DEVICE_ATTR_RO(memcpy_count); 100 101 static ssize_t bytes_transferred_show(struct device *dev, 102 struct device_attribute *attr, char *buf) 103 { 104 struct dma_chan *chan; 105 unsigned long count = 0; 106 int i; 107 int err; 108 109 mutex_lock(&dma_list_mutex); 110 chan = dev_to_dma_chan(dev); 111 if (chan) { 112 for_each_possible_cpu(i) 113 count += per_cpu_ptr(chan->local, i)->bytes_transferred; 114 err = sprintf(buf, "%lu\n", count); 115 } else 116 err = -ENODEV; 117 mutex_unlock(&dma_list_mutex); 118 119 return err; 120 } 121 static DEVICE_ATTR_RO(bytes_transferred); 122 123 static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, 124 char *buf) 125 { 126 struct dma_chan *chan; 127 int err; 128 129 mutex_lock(&dma_list_mutex); 130 chan = dev_to_dma_chan(dev); 131 if (chan) 132 err = sprintf(buf, "%d\n", chan->client_count); 133 else 134 err = -ENODEV; 135 mutex_unlock(&dma_list_mutex); 136 137 return err; 138 } 139 static DEVICE_ATTR_RO(in_use); 140 141 static struct attribute *dma_dev_attrs[] = { 142 &dev_attr_memcpy_count.attr, 143 &dev_attr_bytes_transferred.attr, 144 &dev_attr_in_use.attr, 145 NULL, 146 }; 147 ATTRIBUTE_GROUPS(dma_dev); 148 149 static void chan_dev_release(struct device *dev) 150 { 151 struct dma_chan_dev *chan_dev; 152 153 chan_dev = container_of(dev, typeof(*chan_dev), device); 154 if (atomic_dec_and_test(chan_dev->idr_ref)) { 155 ida_free(&dma_ida, chan_dev->dev_id); 156 kfree(chan_dev->idr_ref); 157 } 158 kfree(chan_dev); 159 } 160 161 static struct class dma_devclass = { 162 .name = "dma", 163 .dev_groups = dma_dev_groups, 164 .dev_release = chan_dev_release, 165 }; 166 167 /* --- client and device registration --- */ 168 169 /** 170 * dma_cap_mask_all - enable iteration over all operation types 171 */ 172 static dma_cap_mask_t dma_cap_mask_all; 173 174 /** 175 * dma_chan_tbl_ent - tracks channel allocations per core/operation 176 * @chan - associated channel for this entry 177 */ 178 struct dma_chan_tbl_ent { 179 struct dma_chan *chan; 180 }; 181 182 /** 183 * channel_table - percpu lookup table for memory-to-memory offload providers 184 */ 185 static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; 186 187 static int __init dma_channel_table_init(void) 188 { 189 enum dma_transaction_type cap; 190 int err = 0; 191 192 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); 193 194 /* 'interrupt', 'private', and 'slave' are channel capabilities, 195 * but are not associated with an operation so they do not need 196 * an entry in the channel_table 197 */ 198 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); 199 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); 200 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); 201 202 for_each_dma_cap_mask(cap, dma_cap_mask_all) { 203 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); 204 if (!channel_table[cap]) { 205 err = -ENOMEM; 206 break; 207 } 208 } 209 210 if (err) { 211 pr_err("dmaengine dma_channel_table_init failure: %d\n", err); 212 for_each_dma_cap_mask(cap, dma_cap_mask_all) 213 free_percpu(channel_table[cap]); 214 } 215 216 return err; 217 } 218 arch_initcall(dma_channel_table_init); 219 220 /** 221 * dma_chan_is_local - returns true if the channel is in the same numa-node as 222 * the cpu 223 */ 224 static bool dma_chan_is_local(struct dma_chan *chan, int cpu) 225 { 226 int node = dev_to_node(chan->device->dev); 227 return node == NUMA_NO_NODE || 228 cpumask_test_cpu(cpu, cpumask_of_node(node)); 229 } 230 231 /** 232 * min_chan - returns the channel with min count and in the same numa-node as 233 * the cpu 234 * @cap: capability to match 235 * @cpu: cpu index which the channel should be close to 236 * 237 * If some channels are close to the given cpu, the one with the lowest 238 * reference count is returned. Otherwise, cpu is ignored and only the 239 * reference count is taken into account. 240 * Must be called under dma_list_mutex. 241 */ 242 static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) 243 { 244 struct dma_device *device; 245 struct dma_chan *chan; 246 struct dma_chan *min = NULL; 247 struct dma_chan *localmin = NULL; 248 249 list_for_each_entry(device, &dma_device_list, global_node) { 250 if (!dma_has_cap(cap, device->cap_mask) || 251 dma_has_cap(DMA_PRIVATE, device->cap_mask)) 252 continue; 253 list_for_each_entry(chan, &device->channels, device_node) { 254 if (!chan->client_count) 255 continue; 256 if (!min || chan->table_count < min->table_count) 257 min = chan; 258 259 if (dma_chan_is_local(chan, cpu)) 260 if (!localmin || 261 chan->table_count < localmin->table_count) 262 localmin = chan; 263 } 264 } 265 266 chan = localmin ? localmin : min; 267 268 if (chan) 269 chan->table_count++; 270 271 return chan; 272 } 273 274 /** 275 * dma_channel_rebalance - redistribute the available channels 276 * 277 * Optimize for cpu isolation (each cpu gets a dedicated channel for an 278 * operation type) in the SMP case, and operation isolation (avoid 279 * multi-tasking channels) in the non-SMP case. Must be called under 280 * dma_list_mutex. 281 */ 282 static void dma_channel_rebalance(void) 283 { 284 struct dma_chan *chan; 285 struct dma_device *device; 286 int cpu; 287 int cap; 288 289 /* undo the last distribution */ 290 for_each_dma_cap_mask(cap, dma_cap_mask_all) 291 for_each_possible_cpu(cpu) 292 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; 293 294 list_for_each_entry(device, &dma_device_list, global_node) { 295 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 296 continue; 297 list_for_each_entry(chan, &device->channels, device_node) 298 chan->table_count = 0; 299 } 300 301 /* don't populate the channel_table if no clients are available */ 302 if (!dmaengine_ref_count) 303 return; 304 305 /* redistribute available channels */ 306 for_each_dma_cap_mask(cap, dma_cap_mask_all) 307 for_each_online_cpu(cpu) { 308 chan = min_chan(cap, cpu); 309 per_cpu_ptr(channel_table[cap], cpu)->chan = chan; 310 } 311 } 312 313 static int dma_device_satisfies_mask(struct dma_device *device, 314 const dma_cap_mask_t *want) 315 { 316 dma_cap_mask_t has; 317 318 bitmap_and(has.bits, want->bits, device->cap_mask.bits, 319 DMA_TX_TYPE_END); 320 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); 321 } 322 323 static struct module *dma_chan_to_owner(struct dma_chan *chan) 324 { 325 return chan->device->owner; 326 } 327 328 /** 329 * balance_ref_count - catch up the channel reference count 330 * @chan - channel to balance ->client_count versus dmaengine_ref_count 331 * 332 * balance_ref_count must be called under dma_list_mutex 333 */ 334 static void balance_ref_count(struct dma_chan *chan) 335 { 336 struct module *owner = dma_chan_to_owner(chan); 337 338 while (chan->client_count < dmaengine_ref_count) { 339 __module_get(owner); 340 chan->client_count++; 341 } 342 } 343 344 static void dma_device_release(struct kref *ref) 345 { 346 struct dma_device *device = container_of(ref, struct dma_device, ref); 347 348 list_del_rcu(&device->global_node); 349 dma_channel_rebalance(); 350 351 if (device->device_release) 352 device->device_release(device); 353 } 354 355 static void dma_device_put(struct dma_device *device) 356 { 357 lockdep_assert_held(&dma_list_mutex); 358 kref_put(&device->ref, dma_device_release); 359 } 360 361 /** 362 * dma_chan_get - try to grab a dma channel's parent driver module 363 * @chan - channel to grab 364 * 365 * Must be called under dma_list_mutex 366 */ 367 static int dma_chan_get(struct dma_chan *chan) 368 { 369 struct module *owner = dma_chan_to_owner(chan); 370 int ret; 371 372 /* The channel is already in use, update client count */ 373 if (chan->client_count) { 374 __module_get(owner); 375 goto out; 376 } 377 378 if (!try_module_get(owner)) 379 return -ENODEV; 380 381 ret = kref_get_unless_zero(&chan->device->ref); 382 if (!ret) { 383 ret = -ENODEV; 384 goto module_put_out; 385 } 386 387 /* allocate upon first client reference */ 388 if (chan->device->device_alloc_chan_resources) { 389 ret = chan->device->device_alloc_chan_resources(chan); 390 if (ret < 0) 391 goto err_out; 392 } 393 394 if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) 395 balance_ref_count(chan); 396 397 out: 398 chan->client_count++; 399 return 0; 400 401 err_out: 402 dma_device_put(chan->device); 403 module_put_out: 404 module_put(owner); 405 return ret; 406 } 407 408 /** 409 * dma_chan_put - drop a reference to a dma channel's parent driver module 410 * @chan - channel to release 411 * 412 * Must be called under dma_list_mutex 413 */ 414 static void dma_chan_put(struct dma_chan *chan) 415 { 416 /* This channel is not in use, bail out */ 417 if (!chan->client_count) 418 return; 419 420 chan->client_count--; 421 422 /* This channel is not in use anymore, free it */ 423 if (!chan->client_count && chan->device->device_free_chan_resources) { 424 /* Make sure all operations have completed */ 425 dmaengine_synchronize(chan); 426 chan->device->device_free_chan_resources(chan); 427 } 428 429 /* If the channel is used via a DMA request router, free the mapping */ 430 if (chan->router && chan->router->route_free) { 431 chan->router->route_free(chan->router->dev, chan->route_data); 432 chan->router = NULL; 433 chan->route_data = NULL; 434 } 435 436 dma_device_put(chan->device); 437 module_put(dma_chan_to_owner(chan)); 438 } 439 440 enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) 441 { 442 enum dma_status status; 443 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 444 445 dma_async_issue_pending(chan); 446 do { 447 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); 448 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 449 dev_err(chan->device->dev, "%s: timeout!\n", __func__); 450 return DMA_ERROR; 451 } 452 if (status != DMA_IN_PROGRESS) 453 break; 454 cpu_relax(); 455 } while (1); 456 457 return status; 458 } 459 EXPORT_SYMBOL(dma_sync_wait); 460 461 /** 462 * dma_find_channel - find a channel to carry out the operation 463 * @tx_type: transaction type 464 */ 465 struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) 466 { 467 return this_cpu_read(channel_table[tx_type]->chan); 468 } 469 EXPORT_SYMBOL(dma_find_channel); 470 471 /** 472 * dma_issue_pending_all - flush all pending operations across all channels 473 */ 474 void dma_issue_pending_all(void) 475 { 476 struct dma_device *device; 477 struct dma_chan *chan; 478 479 rcu_read_lock(); 480 list_for_each_entry_rcu(device, &dma_device_list, global_node) { 481 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 482 continue; 483 list_for_each_entry(chan, &device->channels, device_node) 484 if (chan->client_count) 485 device->device_issue_pending(chan); 486 } 487 rcu_read_unlock(); 488 } 489 EXPORT_SYMBOL(dma_issue_pending_all); 490 491 int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) 492 { 493 struct dma_device *device; 494 495 if (!chan || !caps) 496 return -EINVAL; 497 498 device = chan->device; 499 500 /* check if the channel supports slave transactions */ 501 if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) || 502 test_bit(DMA_CYCLIC, device->cap_mask.bits))) 503 return -ENXIO; 504 505 /* 506 * Check whether it reports it uses the generic slave 507 * capabilities, if not, that means it doesn't support any 508 * kind of slave capabilities reporting. 509 */ 510 if (!device->directions) 511 return -ENXIO; 512 513 caps->src_addr_widths = device->src_addr_widths; 514 caps->dst_addr_widths = device->dst_addr_widths; 515 caps->directions = device->directions; 516 caps->max_burst = device->max_burst; 517 caps->residue_granularity = device->residue_granularity; 518 caps->descriptor_reuse = device->descriptor_reuse; 519 caps->cmd_pause = !!device->device_pause; 520 caps->cmd_resume = !!device->device_resume; 521 caps->cmd_terminate = !!device->device_terminate_all; 522 523 return 0; 524 } 525 EXPORT_SYMBOL_GPL(dma_get_slave_caps); 526 527 static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, 528 struct dma_device *dev, 529 dma_filter_fn fn, void *fn_param) 530 { 531 struct dma_chan *chan; 532 533 if (mask && !dma_device_satisfies_mask(dev, mask)) { 534 dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__); 535 return NULL; 536 } 537 /* devices with multiple channels need special handling as we need to 538 * ensure that all channels are either private or public. 539 */ 540 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) 541 list_for_each_entry(chan, &dev->channels, device_node) { 542 /* some channels are already publicly allocated */ 543 if (chan->client_count) 544 return NULL; 545 } 546 547 list_for_each_entry(chan, &dev->channels, device_node) { 548 if (chan->client_count) { 549 dev_dbg(dev->dev, "%s: %s busy\n", 550 __func__, dma_chan_name(chan)); 551 continue; 552 } 553 if (fn && !fn(chan, fn_param)) { 554 dev_dbg(dev->dev, "%s: %s filter said false\n", 555 __func__, dma_chan_name(chan)); 556 continue; 557 } 558 return chan; 559 } 560 561 return NULL; 562 } 563 564 static struct dma_chan *find_candidate(struct dma_device *device, 565 const dma_cap_mask_t *mask, 566 dma_filter_fn fn, void *fn_param) 567 { 568 struct dma_chan *chan = private_candidate(mask, device, fn, fn_param); 569 int err; 570 571 if (chan) { 572 /* Found a suitable channel, try to grab, prep, and return it. 573 * We first set DMA_PRIVATE to disable balance_ref_count as this 574 * channel will not be published in the general-purpose 575 * allocator 576 */ 577 dma_cap_set(DMA_PRIVATE, device->cap_mask); 578 device->privatecnt++; 579 err = dma_chan_get(chan); 580 581 if (err) { 582 if (err == -ENODEV) { 583 dev_dbg(device->dev, "%s: %s module removed\n", 584 __func__, dma_chan_name(chan)); 585 list_del_rcu(&device->global_node); 586 } else 587 dev_dbg(device->dev, 588 "%s: failed to get %s: (%d)\n", 589 __func__, dma_chan_name(chan), err); 590 591 if (--device->privatecnt == 0) 592 dma_cap_clear(DMA_PRIVATE, device->cap_mask); 593 594 chan = ERR_PTR(err); 595 } 596 } 597 598 return chan ? chan : ERR_PTR(-EPROBE_DEFER); 599 } 600 601 /** 602 * dma_get_slave_channel - try to get specific channel exclusively 603 * @chan: target channel 604 */ 605 struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) 606 { 607 int err = -EBUSY; 608 609 /* lock against __dma_request_channel */ 610 mutex_lock(&dma_list_mutex); 611 612 if (chan->client_count == 0) { 613 struct dma_device *device = chan->device; 614 615 dma_cap_set(DMA_PRIVATE, device->cap_mask); 616 device->privatecnt++; 617 err = dma_chan_get(chan); 618 if (err) { 619 dev_dbg(chan->device->dev, 620 "%s: failed to get %s: (%d)\n", 621 __func__, dma_chan_name(chan), err); 622 chan = NULL; 623 if (--device->privatecnt == 0) 624 dma_cap_clear(DMA_PRIVATE, device->cap_mask); 625 } 626 } else 627 chan = NULL; 628 629 mutex_unlock(&dma_list_mutex); 630 631 632 return chan; 633 } 634 EXPORT_SYMBOL_GPL(dma_get_slave_channel); 635 636 struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) 637 { 638 dma_cap_mask_t mask; 639 struct dma_chan *chan; 640 641 dma_cap_zero(mask); 642 dma_cap_set(DMA_SLAVE, mask); 643 644 /* lock against __dma_request_channel */ 645 mutex_lock(&dma_list_mutex); 646 647 chan = find_candidate(device, &mask, NULL, NULL); 648 649 mutex_unlock(&dma_list_mutex); 650 651 return IS_ERR(chan) ? NULL : chan; 652 } 653 EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); 654 655 /** 656 * __dma_request_channel - try to allocate an exclusive channel 657 * @mask: capabilities that the channel must satisfy 658 * @fn: optional callback to disposition available channels 659 * @fn_param: opaque parameter to pass to dma_filter_fn 660 * @np: device node to look for DMA channels 661 * 662 * Returns pointer to appropriate DMA channel on success or NULL. 663 */ 664 struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, 665 dma_filter_fn fn, void *fn_param, 666 struct device_node *np) 667 { 668 struct dma_device *device, *_d; 669 struct dma_chan *chan = NULL; 670 671 /* Find a channel */ 672 mutex_lock(&dma_list_mutex); 673 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 674 /* Finds a DMA controller with matching device node */ 675 if (np && device->dev->of_node && np != device->dev->of_node) 676 continue; 677 678 chan = find_candidate(device, mask, fn, fn_param); 679 if (!IS_ERR(chan)) 680 break; 681 682 chan = NULL; 683 } 684 mutex_unlock(&dma_list_mutex); 685 686 pr_debug("%s: %s (%s)\n", 687 __func__, 688 chan ? "success" : "fail", 689 chan ? dma_chan_name(chan) : NULL); 690 691 return chan; 692 } 693 EXPORT_SYMBOL_GPL(__dma_request_channel); 694 695 static const struct dma_slave_map *dma_filter_match(struct dma_device *device, 696 const char *name, 697 struct device *dev) 698 { 699 int i; 700 701 if (!device->filter.mapcnt) 702 return NULL; 703 704 for (i = 0; i < device->filter.mapcnt; i++) { 705 const struct dma_slave_map *map = &device->filter.map[i]; 706 707 if (!strcmp(map->devname, dev_name(dev)) && 708 !strcmp(map->slave, name)) 709 return map; 710 } 711 712 return NULL; 713 } 714 715 /** 716 * dma_request_chan - try to allocate an exclusive slave channel 717 * @dev: pointer to client device structure 718 * @name: slave channel name 719 * 720 * Returns pointer to appropriate DMA channel on success or an error pointer. 721 */ 722 struct dma_chan *dma_request_chan(struct device *dev, const char *name) 723 { 724 struct dma_device *d, *_d; 725 struct dma_chan *chan = NULL; 726 727 /* If device-tree is present get slave info from here */ 728 if (dev->of_node) 729 chan = of_dma_request_slave_channel(dev->of_node, name); 730 731 /* If device was enumerated by ACPI get slave info from here */ 732 if (has_acpi_companion(dev) && !chan) 733 chan = acpi_dma_request_slave_chan_by_name(dev, name); 734 735 if (PTR_ERR(chan) == -EPROBE_DEFER) 736 return chan; 737 738 if (!IS_ERR_OR_NULL(chan)) 739 goto found; 740 741 /* Try to find the channel via the DMA filter map(s) */ 742 mutex_lock(&dma_list_mutex); 743 list_for_each_entry_safe(d, _d, &dma_device_list, global_node) { 744 dma_cap_mask_t mask; 745 const struct dma_slave_map *map = dma_filter_match(d, name, dev); 746 747 if (!map) 748 continue; 749 750 dma_cap_zero(mask); 751 dma_cap_set(DMA_SLAVE, mask); 752 753 chan = find_candidate(d, &mask, d->filter.fn, map->param); 754 if (!IS_ERR(chan)) 755 break; 756 } 757 mutex_unlock(&dma_list_mutex); 758 759 if (!IS_ERR_OR_NULL(chan)) 760 goto found; 761 762 return ERR_PTR(-EPROBE_DEFER); 763 764 found: 765 chan->slave = dev; 766 chan->name = kasprintf(GFP_KERNEL, "dma:%s", name); 767 if (!chan->name) 768 return ERR_PTR(-ENOMEM); 769 770 if (sysfs_create_link(&chan->dev->device.kobj, &dev->kobj, 771 DMA_SLAVE_NAME)) 772 dev_err(dev, "Cannot create DMA %s symlink\n", DMA_SLAVE_NAME); 773 if (sysfs_create_link(&dev->kobj, &chan->dev->device.kobj, chan->name)) 774 dev_err(dev, "Cannot create DMA %s symlink\n", chan->name); 775 return chan; 776 } 777 EXPORT_SYMBOL_GPL(dma_request_chan); 778 779 /** 780 * dma_request_slave_channel - try to allocate an exclusive slave channel 781 * @dev: pointer to client device structure 782 * @name: slave channel name 783 * 784 * Returns pointer to appropriate DMA channel on success or NULL. 785 */ 786 struct dma_chan *dma_request_slave_channel(struct device *dev, 787 const char *name) 788 { 789 struct dma_chan *ch = dma_request_chan(dev, name); 790 if (IS_ERR(ch)) 791 return NULL; 792 793 return ch; 794 } 795 EXPORT_SYMBOL_GPL(dma_request_slave_channel); 796 797 /** 798 * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities 799 * @mask: capabilities that the channel must satisfy 800 * 801 * Returns pointer to appropriate DMA channel on success or an error pointer. 802 */ 803 struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask) 804 { 805 struct dma_chan *chan; 806 807 if (!mask) 808 return ERR_PTR(-ENODEV); 809 810 chan = __dma_request_channel(mask, NULL, NULL, NULL); 811 if (!chan) { 812 mutex_lock(&dma_list_mutex); 813 if (list_empty(&dma_device_list)) 814 chan = ERR_PTR(-EPROBE_DEFER); 815 else 816 chan = ERR_PTR(-ENODEV); 817 mutex_unlock(&dma_list_mutex); 818 } 819 820 return chan; 821 } 822 EXPORT_SYMBOL_GPL(dma_request_chan_by_mask); 823 824 void dma_release_channel(struct dma_chan *chan) 825 { 826 mutex_lock(&dma_list_mutex); 827 WARN_ONCE(chan->client_count != 1, 828 "chan reference count %d != 1\n", chan->client_count); 829 dma_chan_put(chan); 830 /* drop PRIVATE cap enabled by __dma_request_channel() */ 831 if (--chan->device->privatecnt == 0) 832 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); 833 if (chan->slave) { 834 sysfs_remove_link(&chan->slave->kobj, chan->name); 835 kfree(chan->name); 836 chan->name = NULL; 837 chan->slave = NULL; 838 } 839 sysfs_remove_link(&chan->dev->device.kobj, DMA_SLAVE_NAME); 840 mutex_unlock(&dma_list_mutex); 841 } 842 EXPORT_SYMBOL_GPL(dma_release_channel); 843 844 /** 845 * dmaengine_get - register interest in dma_channels 846 */ 847 void dmaengine_get(void) 848 { 849 struct dma_device *device, *_d; 850 struct dma_chan *chan; 851 int err; 852 853 mutex_lock(&dma_list_mutex); 854 dmaengine_ref_count++; 855 856 /* try to grab channels */ 857 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 858 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 859 continue; 860 list_for_each_entry(chan, &device->channels, device_node) { 861 err = dma_chan_get(chan); 862 if (err == -ENODEV) { 863 /* module removed before we could use it */ 864 list_del_rcu(&device->global_node); 865 break; 866 } else if (err) 867 dev_dbg(chan->device->dev, 868 "%s: failed to get %s: (%d)\n", 869 __func__, dma_chan_name(chan), err); 870 } 871 } 872 873 /* if this is the first reference and there were channels 874 * waiting we need to rebalance to get those channels 875 * incorporated into the channel table 876 */ 877 if (dmaengine_ref_count == 1) 878 dma_channel_rebalance(); 879 mutex_unlock(&dma_list_mutex); 880 } 881 EXPORT_SYMBOL(dmaengine_get); 882 883 /** 884 * dmaengine_put - let dma drivers be removed when ref_count == 0 885 */ 886 void dmaengine_put(void) 887 { 888 struct dma_device *device, *_d; 889 struct dma_chan *chan; 890 891 mutex_lock(&dma_list_mutex); 892 dmaengine_ref_count--; 893 BUG_ON(dmaengine_ref_count < 0); 894 /* drop channel references */ 895 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 896 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 897 continue; 898 list_for_each_entry(chan, &device->channels, device_node) 899 dma_chan_put(chan); 900 } 901 mutex_unlock(&dma_list_mutex); 902 } 903 EXPORT_SYMBOL(dmaengine_put); 904 905 static bool device_has_all_tx_types(struct dma_device *device) 906 { 907 /* A device that satisfies this test has channels that will never cause 908 * an async_tx channel switch event as all possible operation types can 909 * be handled. 910 */ 911 #ifdef CONFIG_ASYNC_TX_DMA 912 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) 913 return false; 914 #endif 915 916 #if IS_ENABLED(CONFIG_ASYNC_MEMCPY) 917 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) 918 return false; 919 #endif 920 921 #if IS_ENABLED(CONFIG_ASYNC_XOR) 922 if (!dma_has_cap(DMA_XOR, device->cap_mask)) 923 return false; 924 925 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA 926 if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) 927 return false; 928 #endif 929 #endif 930 931 #if IS_ENABLED(CONFIG_ASYNC_PQ) 932 if (!dma_has_cap(DMA_PQ, device->cap_mask)) 933 return false; 934 935 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA 936 if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) 937 return false; 938 #endif 939 #endif 940 941 return true; 942 } 943 944 static int get_dma_id(struct dma_device *device) 945 { 946 int rc = ida_alloc(&dma_ida, GFP_KERNEL); 947 948 if (rc < 0) 949 return rc; 950 device->dev_id = rc; 951 return 0; 952 } 953 954 static int __dma_async_device_channel_register(struct dma_device *device, 955 struct dma_chan *chan, 956 int chan_id) 957 { 958 int rc = 0; 959 int chancnt = device->chancnt; 960 atomic_t *idr_ref; 961 struct dma_chan *tchan; 962 963 tchan = list_first_entry_or_null(&device->channels, 964 struct dma_chan, device_node); 965 if (tchan->dev) { 966 idr_ref = tchan->dev->idr_ref; 967 } else { 968 idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); 969 if (!idr_ref) 970 return -ENOMEM; 971 atomic_set(idr_ref, 0); 972 } 973 974 chan->local = alloc_percpu(typeof(*chan->local)); 975 if (!chan->local) 976 goto err_out; 977 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); 978 if (!chan->dev) { 979 free_percpu(chan->local); 980 chan->local = NULL; 981 goto err_out; 982 } 983 984 /* 985 * When the chan_id is a negative value, we are dynamically adding 986 * the channel. Otherwise we are static enumerating. 987 */ 988 chan->chan_id = chan_id < 0 ? chancnt : chan_id; 989 chan->dev->device.class = &dma_devclass; 990 chan->dev->device.parent = device->dev; 991 chan->dev->chan = chan; 992 chan->dev->idr_ref = idr_ref; 993 chan->dev->dev_id = device->dev_id; 994 atomic_inc(idr_ref); 995 dev_set_name(&chan->dev->device, "dma%dchan%d", 996 device->dev_id, chan->chan_id); 997 998 rc = device_register(&chan->dev->device); 999 if (rc) 1000 goto err_out; 1001 chan->client_count = 0; 1002 device->chancnt = chan->chan_id + 1; 1003 1004 return 0; 1005 1006 err_out: 1007 free_percpu(chan->local); 1008 kfree(chan->dev); 1009 if (atomic_dec_return(idr_ref) == 0) 1010 kfree(idr_ref); 1011 return rc; 1012 } 1013 1014 int dma_async_device_channel_register(struct dma_device *device, 1015 struct dma_chan *chan) 1016 { 1017 int rc; 1018 1019 rc = __dma_async_device_channel_register(device, chan, -1); 1020 if (rc < 0) 1021 return rc; 1022 1023 dma_channel_rebalance(); 1024 return 0; 1025 } 1026 EXPORT_SYMBOL_GPL(dma_async_device_channel_register); 1027 1028 static void __dma_async_device_channel_unregister(struct dma_device *device, 1029 struct dma_chan *chan) 1030 { 1031 WARN_ONCE(!device->device_release && chan->client_count, 1032 "%s called while %d clients hold a reference\n", 1033 __func__, chan->client_count); 1034 mutex_lock(&dma_list_mutex); 1035 list_del(&chan->device_node); 1036 device->chancnt--; 1037 chan->dev->chan = NULL; 1038 mutex_unlock(&dma_list_mutex); 1039 device_unregister(&chan->dev->device); 1040 free_percpu(chan->local); 1041 } 1042 1043 void dma_async_device_channel_unregister(struct dma_device *device, 1044 struct dma_chan *chan) 1045 { 1046 __dma_async_device_channel_unregister(device, chan); 1047 dma_channel_rebalance(); 1048 } 1049 EXPORT_SYMBOL_GPL(dma_async_device_channel_unregister); 1050 1051 /** 1052 * dma_async_device_register - registers DMA devices found 1053 * @device: &dma_device 1054 * 1055 * After calling this routine the structure should not be freed except in the 1056 * device_release() callback which will be called after 1057 * dma_async_device_unregister() is called and no further references are taken. 1058 */ 1059 int dma_async_device_register(struct dma_device *device) 1060 { 1061 int rc, i = 0; 1062 struct dma_chan* chan; 1063 1064 if (!device) 1065 return -ENODEV; 1066 1067 /* validate device routines */ 1068 if (!device->dev) { 1069 pr_err("DMAdevice must have dev\n"); 1070 return -EIO; 1071 } 1072 1073 device->owner = device->dev->driver->owner; 1074 1075 if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) { 1076 dev_err(device->dev, 1077 "Device claims capability %s, but op is not defined\n", 1078 "DMA_MEMCPY"); 1079 return -EIO; 1080 } 1081 1082 if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) { 1083 dev_err(device->dev, 1084 "Device claims capability %s, but op is not defined\n", 1085 "DMA_XOR"); 1086 return -EIO; 1087 } 1088 1089 if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) { 1090 dev_err(device->dev, 1091 "Device claims capability %s, but op is not defined\n", 1092 "DMA_XOR_VAL"); 1093 return -EIO; 1094 } 1095 1096 if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) { 1097 dev_err(device->dev, 1098 "Device claims capability %s, but op is not defined\n", 1099 "DMA_PQ"); 1100 return -EIO; 1101 } 1102 1103 if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) { 1104 dev_err(device->dev, 1105 "Device claims capability %s, but op is not defined\n", 1106 "DMA_PQ_VAL"); 1107 return -EIO; 1108 } 1109 1110 if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) { 1111 dev_err(device->dev, 1112 "Device claims capability %s, but op is not defined\n", 1113 "DMA_MEMSET"); 1114 return -EIO; 1115 } 1116 1117 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) { 1118 dev_err(device->dev, 1119 "Device claims capability %s, but op is not defined\n", 1120 "DMA_INTERRUPT"); 1121 return -EIO; 1122 } 1123 1124 if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) { 1125 dev_err(device->dev, 1126 "Device claims capability %s, but op is not defined\n", 1127 "DMA_CYCLIC"); 1128 return -EIO; 1129 } 1130 1131 if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) { 1132 dev_err(device->dev, 1133 "Device claims capability %s, but op is not defined\n", 1134 "DMA_INTERLEAVE"); 1135 return -EIO; 1136 } 1137 1138 1139 if (!device->device_tx_status) { 1140 dev_err(device->dev, "Device tx_status is not defined\n"); 1141 return -EIO; 1142 } 1143 1144 1145 if (!device->device_issue_pending) { 1146 dev_err(device->dev, "Device issue_pending is not defined\n"); 1147 return -EIO; 1148 } 1149 1150 if (!device->device_release) 1151 dev_warn(device->dev, 1152 "WARN: Device release is not defined so it is not safe to unbind this driver while in use\n"); 1153 1154 kref_init(&device->ref); 1155 1156 /* note: this only matters in the 1157 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case 1158 */ 1159 if (device_has_all_tx_types(device)) 1160 dma_cap_set(DMA_ASYNC_TX, device->cap_mask); 1161 1162 rc = get_dma_id(device); 1163 if (rc != 0) 1164 return rc; 1165 1166 /* represent channels in sysfs. Probably want devs too */ 1167 list_for_each_entry(chan, &device->channels, device_node) { 1168 rc = __dma_async_device_channel_register(device, chan, i++); 1169 if (rc < 0) 1170 goto err_out; 1171 } 1172 1173 mutex_lock(&dma_list_mutex); 1174 /* take references on public channels */ 1175 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) 1176 list_for_each_entry(chan, &device->channels, device_node) { 1177 /* if clients are already waiting for channels we need 1178 * to take references on their behalf 1179 */ 1180 if (dma_chan_get(chan) == -ENODEV) { 1181 /* note we can only get here for the first 1182 * channel as the remaining channels are 1183 * guaranteed to get a reference 1184 */ 1185 rc = -ENODEV; 1186 mutex_unlock(&dma_list_mutex); 1187 goto err_out; 1188 } 1189 } 1190 list_add_tail_rcu(&device->global_node, &dma_device_list); 1191 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 1192 device->privatecnt++; /* Always private */ 1193 dma_channel_rebalance(); 1194 mutex_unlock(&dma_list_mutex); 1195 1196 return 0; 1197 1198 err_out: 1199 /* if we never registered a channel just release the idr */ 1200 if (!device->chancnt) { 1201 ida_free(&dma_ida, device->dev_id); 1202 return rc; 1203 } 1204 1205 list_for_each_entry(chan, &device->channels, device_node) { 1206 if (chan->local == NULL) 1207 continue; 1208 mutex_lock(&dma_list_mutex); 1209 chan->dev->chan = NULL; 1210 mutex_unlock(&dma_list_mutex); 1211 device_unregister(&chan->dev->device); 1212 free_percpu(chan->local); 1213 } 1214 return rc; 1215 } 1216 EXPORT_SYMBOL(dma_async_device_register); 1217 1218 /** 1219 * dma_async_device_unregister - unregister a DMA device 1220 * @device: &dma_device 1221 * 1222 * This routine is called by dma driver exit routines, dmaengine holds module 1223 * references to prevent it being called while channels are in use. 1224 */ 1225 void dma_async_device_unregister(struct dma_device *device) 1226 { 1227 struct dma_chan *chan, *n; 1228 1229 list_for_each_entry_safe(chan, n, &device->channels, device_node) 1230 __dma_async_device_channel_unregister(device, chan); 1231 1232 mutex_lock(&dma_list_mutex); 1233 /* 1234 * setting DMA_PRIVATE ensures the device being torn down will not 1235 * be used in the channel_table 1236 */ 1237 dma_cap_set(DMA_PRIVATE, device->cap_mask); 1238 dma_channel_rebalance(); 1239 dma_device_put(device); 1240 mutex_unlock(&dma_list_mutex); 1241 } 1242 EXPORT_SYMBOL(dma_async_device_unregister); 1243 1244 static void dmam_device_release(struct device *dev, void *res) 1245 { 1246 struct dma_device *device; 1247 1248 device = *(struct dma_device **)res; 1249 dma_async_device_unregister(device); 1250 } 1251 1252 /** 1253 * dmaenginem_async_device_register - registers DMA devices found 1254 * @device: &dma_device 1255 * 1256 * The operation is managed and will be undone on driver detach. 1257 */ 1258 int dmaenginem_async_device_register(struct dma_device *device) 1259 { 1260 void *p; 1261 int ret; 1262 1263 p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL); 1264 if (!p) 1265 return -ENOMEM; 1266 1267 ret = dma_async_device_register(device); 1268 if (!ret) { 1269 *(struct dma_device **)p = device; 1270 devres_add(device->dev, p); 1271 } else { 1272 devres_free(p); 1273 } 1274 1275 return ret; 1276 } 1277 EXPORT_SYMBOL(dmaenginem_async_device_register); 1278 1279 struct dmaengine_unmap_pool { 1280 struct kmem_cache *cache; 1281 const char *name; 1282 mempool_t *pool; 1283 size_t size; 1284 }; 1285 1286 #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } 1287 static struct dmaengine_unmap_pool unmap_pool[] = { 1288 __UNMAP_POOL(2), 1289 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) 1290 __UNMAP_POOL(16), 1291 __UNMAP_POOL(128), 1292 __UNMAP_POOL(256), 1293 #endif 1294 }; 1295 1296 static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) 1297 { 1298 int order = get_count_order(nr); 1299 1300 switch (order) { 1301 case 0 ... 1: 1302 return &unmap_pool[0]; 1303 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) 1304 case 2 ... 4: 1305 return &unmap_pool[1]; 1306 case 5 ... 7: 1307 return &unmap_pool[2]; 1308 case 8: 1309 return &unmap_pool[3]; 1310 #endif 1311 default: 1312 BUG(); 1313 return NULL; 1314 } 1315 } 1316 1317 static void dmaengine_unmap(struct kref *kref) 1318 { 1319 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); 1320 struct device *dev = unmap->dev; 1321 int cnt, i; 1322 1323 cnt = unmap->to_cnt; 1324 for (i = 0; i < cnt; i++) 1325 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1326 DMA_TO_DEVICE); 1327 cnt += unmap->from_cnt; 1328 for (; i < cnt; i++) 1329 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1330 DMA_FROM_DEVICE); 1331 cnt += unmap->bidi_cnt; 1332 for (; i < cnt; i++) { 1333 if (unmap->addr[i] == 0) 1334 continue; 1335 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1336 DMA_BIDIRECTIONAL); 1337 } 1338 cnt = unmap->map_cnt; 1339 mempool_free(unmap, __get_unmap_pool(cnt)->pool); 1340 } 1341 1342 void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) 1343 { 1344 if (unmap) 1345 kref_put(&unmap->kref, dmaengine_unmap); 1346 } 1347 EXPORT_SYMBOL_GPL(dmaengine_unmap_put); 1348 1349 static void dmaengine_destroy_unmap_pool(void) 1350 { 1351 int i; 1352 1353 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1354 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1355 1356 mempool_destroy(p->pool); 1357 p->pool = NULL; 1358 kmem_cache_destroy(p->cache); 1359 p->cache = NULL; 1360 } 1361 } 1362 1363 static int __init dmaengine_init_unmap_pool(void) 1364 { 1365 int i; 1366 1367 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1368 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1369 size_t size; 1370 1371 size = sizeof(struct dmaengine_unmap_data) + 1372 sizeof(dma_addr_t) * p->size; 1373 1374 p->cache = kmem_cache_create(p->name, size, 0, 1375 SLAB_HWCACHE_ALIGN, NULL); 1376 if (!p->cache) 1377 break; 1378 p->pool = mempool_create_slab_pool(1, p->cache); 1379 if (!p->pool) 1380 break; 1381 } 1382 1383 if (i == ARRAY_SIZE(unmap_pool)) 1384 return 0; 1385 1386 dmaengine_destroy_unmap_pool(); 1387 return -ENOMEM; 1388 } 1389 1390 struct dmaengine_unmap_data * 1391 dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) 1392 { 1393 struct dmaengine_unmap_data *unmap; 1394 1395 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); 1396 if (!unmap) 1397 return NULL; 1398 1399 memset(unmap, 0, sizeof(*unmap)); 1400 kref_init(&unmap->kref); 1401 unmap->dev = dev; 1402 unmap->map_cnt = nr; 1403 1404 return unmap; 1405 } 1406 EXPORT_SYMBOL(dmaengine_get_unmap_data); 1407 1408 void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, 1409 struct dma_chan *chan) 1410 { 1411 tx->chan = chan; 1412 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH 1413 spin_lock_init(&tx->lock); 1414 #endif 1415 } 1416 EXPORT_SYMBOL(dma_async_tx_descriptor_init); 1417 1418 static inline int desc_check_and_set_metadata_mode( 1419 struct dma_async_tx_descriptor *desc, enum dma_desc_metadata_mode mode) 1420 { 1421 /* Make sure that the metadata mode is not mixed */ 1422 if (!desc->desc_metadata_mode) { 1423 if (dmaengine_is_metadata_mode_supported(desc->chan, mode)) 1424 desc->desc_metadata_mode = mode; 1425 else 1426 return -ENOTSUPP; 1427 } else if (desc->desc_metadata_mode != mode) { 1428 return -EINVAL; 1429 } 1430 1431 return 0; 1432 } 1433 1434 int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc, 1435 void *data, size_t len) 1436 { 1437 int ret; 1438 1439 if (!desc) 1440 return -EINVAL; 1441 1442 ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_CLIENT); 1443 if (ret) 1444 return ret; 1445 1446 if (!desc->metadata_ops || !desc->metadata_ops->attach) 1447 return -ENOTSUPP; 1448 1449 return desc->metadata_ops->attach(desc, data, len); 1450 } 1451 EXPORT_SYMBOL_GPL(dmaengine_desc_attach_metadata); 1452 1453 void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc, 1454 size_t *payload_len, size_t *max_len) 1455 { 1456 int ret; 1457 1458 if (!desc) 1459 return ERR_PTR(-EINVAL); 1460 1461 ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE); 1462 if (ret) 1463 return ERR_PTR(ret); 1464 1465 if (!desc->metadata_ops || !desc->metadata_ops->get_ptr) 1466 return ERR_PTR(-ENOTSUPP); 1467 1468 return desc->metadata_ops->get_ptr(desc, payload_len, max_len); 1469 } 1470 EXPORT_SYMBOL_GPL(dmaengine_desc_get_metadata_ptr); 1471 1472 int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc, 1473 size_t payload_len) 1474 { 1475 int ret; 1476 1477 if (!desc) 1478 return -EINVAL; 1479 1480 ret = desc_check_and_set_metadata_mode(desc, DESC_METADATA_ENGINE); 1481 if (ret) 1482 return ret; 1483 1484 if (!desc->metadata_ops || !desc->metadata_ops->set_len) 1485 return -ENOTSUPP; 1486 1487 return desc->metadata_ops->set_len(desc, payload_len); 1488 } 1489 EXPORT_SYMBOL_GPL(dmaengine_desc_set_metadata_len); 1490 1491 /* dma_wait_for_async_tx - spin wait for a transaction to complete 1492 * @tx: in-flight transaction to wait on 1493 */ 1494 enum dma_status 1495 dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) 1496 { 1497 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 1498 1499 if (!tx) 1500 return DMA_COMPLETE; 1501 1502 while (tx->cookie == -EBUSY) { 1503 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 1504 dev_err(tx->chan->device->dev, 1505 "%s timeout waiting for descriptor submission\n", 1506 __func__); 1507 return DMA_ERROR; 1508 } 1509 cpu_relax(); 1510 } 1511 return dma_sync_wait(tx->chan, tx->cookie); 1512 } 1513 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); 1514 1515 /* dma_run_dependencies - helper routine for dma drivers to process 1516 * (start) dependent operations on their target channel 1517 * @tx: transaction with dependencies 1518 */ 1519 void dma_run_dependencies(struct dma_async_tx_descriptor *tx) 1520 { 1521 struct dma_async_tx_descriptor *dep = txd_next(tx); 1522 struct dma_async_tx_descriptor *dep_next; 1523 struct dma_chan *chan; 1524 1525 if (!dep) 1526 return; 1527 1528 /* we'll submit tx->next now, so clear the link */ 1529 txd_clear_next(tx); 1530 chan = dep->chan; 1531 1532 /* keep submitting up until a channel switch is detected 1533 * in that case we will be called again as a result of 1534 * processing the interrupt from async_tx_channel_switch 1535 */ 1536 for (; dep; dep = dep_next) { 1537 txd_lock(dep); 1538 txd_clear_parent(dep); 1539 dep_next = txd_next(dep); 1540 if (dep_next && dep_next->chan == chan) 1541 txd_clear_next(dep); /* ->next will be submitted */ 1542 else 1543 dep_next = NULL; /* submit current dep and terminate */ 1544 txd_unlock(dep); 1545 1546 dep->tx_submit(dep); 1547 } 1548 1549 chan->device->device_issue_pending(chan); 1550 } 1551 EXPORT_SYMBOL_GPL(dma_run_dependencies); 1552 1553 static int __init dma_bus_init(void) 1554 { 1555 int err = dmaengine_init_unmap_pool(); 1556 1557 if (err) 1558 return err; 1559 return class_register(&dma_devclass); 1560 } 1561 arch_initcall(dma_bus_init); 1562