1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Bestcomm ATA task microcode 4 * 5 * Copyright (c) 2004 Freescale Semiconductor, Inc. 6 * 7 * Created based on bestcom/code_dma/image_rtos1/dma_image.hex 8 */ 9 10 #include <asm/types.h> 11 12 /* 13 * The header consists of the following fields: 14 * u32 magic; 15 * u8 desc_size; 16 * u8 var_size; 17 * u8 inc_size; 18 * u8 first_var; 19 * u8 reserved[8]; 20 * 21 * The size fields contain the number of 32-bit words. 22 */ 23 24 u32 bcom_ata_task[] = { 25 /* header */ 26 0x4243544b, 27 0x0e060709, 28 0x00000000, 29 0x00000000, 30 31 /* Task descriptors */ 32 0x8198009b, /* LCD: idx0 = var3; idx0 <= var2; idx0 += inc3 */ 33 0x13e00c08, /* DRD1A: var3 = var1; FN=0 MORE init=31 WS=0 RS=0 */ 34 0xb8000264, /* LCD: idx1 = *idx0, idx2 = var0; idx1 < var9; idx1 += inc4, idx2 += inc4 */ 35 0x10000f00, /* DRD1A: var3 = idx0; FN=0 MORE init=0 WS=0 RS=0 */ 36 0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */ 37 0x0c8cfc8a, /* DRD2B1: *idx2 = EU3(); EU3(*idx2,var10) */ 38 0xd8988240, /* LCDEXT: idx1 = idx1; idx1 > var9; idx1 += inc0 */ 39 0xf845e011, /* LCDEXT: idx2 = *(idx0 + var00000015); ; idx2 += inc2 */ 40 0xb845e00a, /* LCD: idx3 = *(idx0 + var00000019); ; idx3 += inc1 */ 41 0x0bfecf90, /* DRD1A: *idx3 = *idx2; FN=0 TFD init=31 WS=3 RS=3 */ 42 0x9898802d, /* LCD: idx1 = idx1; idx1 once var0; idx1 += inc5 */ 43 0x64000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 INT EXT init=0 WS=0 RS=0 */ 44 0x0c0cf849, /* DRD2B1: *idx0 = EU3(); EU3(idx1,var9) */ 45 0x000001f8, /* NOP */ 46 47 /* VAR[9]-VAR[14] */ 48 0x40000000, 49 0x7fff7fff, 50 0x00000000, 51 0x00000000, 52 0x00000000, 53 0x00000000, 54 55 /* INC[0]-INC[6] */ 56 0x40000000, 57 0xe0000000, 58 0xe0000000, 59 0xa000000c, 60 0x20000000, 61 0x00000000, 62 0x00000000, 63 }; 64 65