xref: /linux/drivers/dma/Kconfig (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1#
2# DMA engine configuration
3#
4
5menuconfig DMADEVICES
6	bool "DMA Engine support"
7	depends on HAS_DMA
8	help
9	  DMA engines can do asynchronous data transfers without
10	  involving the host CPU.  Currently, this framework can be
11	  used to offload memory copies in the network stack and
12	  RAID operations in the MD driver.  This menu only presents
13	  DMA Device drivers supported by the configured arch, it may
14	  be empty in some cases.
15
16config DMADEVICES_DEBUG
17        bool "DMA Engine debugging"
18        depends on DMADEVICES != n
19        help
20          This is an option for use by developers; most people should
21          say N here.  This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24        bool "DMA Engine verbose debugging"
25        depends on DMADEVICES_DEBUG != n
26        help
27          This is an option for use by developers; most people should
28          say N here.  This enables deeper (more verbose) debugging of
29          the DMA engine core and drivers.
30
31
32if DMADEVICES
33
34comment "DMA Devices"
35
36config INTEL_MIC_X100_DMA
37	tristate "Intel MIC X100 DMA Driver"
38	depends on 64BIT && X86 && INTEL_MIC_BUS
39	select DMA_ENGINE
40	help
41	  This enables DMA support for the Intel Many Integrated Core
42	  (MIC) family of PCIe form factor coprocessor X100 devices that
43	  run a 64 bit Linux OS. This driver will be used by both MIC
44	  host and card drivers.
45
46	  If you are building host kernel with a MIC device or a card
47	  kernel for a MIC device, then say M (recommended) or Y, else
48	  say N. If unsure say N.
49
50	  More information about the Intel MIC family as well as the Linux
51	  OS and tools for MIC to use with this driver are available from
52	  <http://software.intel.com/en-us/mic-developer>.
53
54config INTEL_MID_DMAC
55	tristate "Intel MID DMA support for Peripheral DMA controllers"
56	depends on PCI && X86
57	select DMA_ENGINE
58	default n
59	help
60	  Enable support for the Intel(R) MID DMA engine present
61	  in Intel MID chipsets.
62
63	  Say Y here if you have such a chipset.
64
65	  If unsure, say N.
66
67config ASYNC_TX_ENABLE_CHANNEL_SWITCH
68	bool
69
70config AMBA_PL08X
71	bool "ARM PrimeCell PL080 or PL081 support"
72	depends on ARM_AMBA
73	select DMA_ENGINE
74	select DMA_VIRTUAL_CHANNELS
75	help
76	  Platform has a PL08x DMAC device
77	  which can provide DMA engine support
78
79config INTEL_IOATDMA
80	tristate "Intel I/OAT DMA support"
81	depends on PCI && X86
82	select DMA_ENGINE
83	select DMA_ENGINE_RAID
84	select DCA
85	help
86	  Enable support for the Intel(R) I/OAT DMA engine present
87	  in recent Intel Xeon chipsets.
88
89	  Say Y here if you have such a chipset.
90
91	  If unsure, say N.
92
93config INTEL_IOP_ADMA
94	tristate "Intel IOP ADMA support"
95	depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
96	select DMA_ENGINE
97	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
98	help
99	  Enable support for the Intel(R) IOP Series RAID engines.
100
101source "drivers/dma/dw/Kconfig"
102
103config AT_HDMAC
104	tristate "Atmel AHB DMA support"
105	depends on ARCH_AT91
106	select DMA_ENGINE
107	help
108	  Support the Atmel AHB DMA controller.
109
110config AT_XDMAC
111	tristate "Atmel XDMA support"
112	depends on ARCH_AT91
113	select DMA_ENGINE
114	help
115	  Support the Atmel XDMA controller.
116
117config FSL_DMA
118	tristate "Freescale Elo series DMA support"
119	depends on FSL_SOC
120	select DMA_ENGINE
121	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
122	---help---
123	  Enable support for the Freescale Elo series DMA controllers.
124	  The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
125	  EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
126	  some Txxx and Bxxx parts.
127
128config MPC512X_DMA
129	tristate "Freescale MPC512x built-in DMA engine support"
130	depends on PPC_MPC512x || PPC_MPC831x
131	select DMA_ENGINE
132	---help---
133	  Enable support for the Freescale MPC512x built-in DMA engine.
134
135source "drivers/dma/bestcomm/Kconfig"
136
137config MV_XOR
138	bool "Marvell XOR engine support"
139	depends on PLAT_ORION
140	select DMA_ENGINE
141	select DMA_ENGINE_RAID
142	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
143	---help---
144	  Enable support for the Marvell XOR engine.
145
146config MX3_IPU
147	bool "MX3x Image Processing Unit support"
148	depends on ARCH_MXC
149	select DMA_ENGINE
150	default y
151	help
152	  If you plan to use the Image Processing unit in the i.MX3x, say
153	  Y here. If unsure, select Y.
154
155config MX3_IPU_IRQS
156	int "Number of dynamically mapped interrupts for IPU"
157	depends on MX3_IPU
158	range 2 137
159	default 4
160	help
161	  Out of 137 interrupt sources on i.MX31 IPU only very few are used.
162	  To avoid bloating the irq_desc[] array we allocate a sufficient
163	  number of IRQ slots and map them dynamically to specific sources.
164
165config TXX9_DMAC
166	tristate "Toshiba TXx9 SoC DMA support"
167	depends on MACH_TX49XX || MACH_TX39XX
168	select DMA_ENGINE
169	help
170	  Support the TXx9 SoC internal DMA controller.  This can be
171	  integrated in chips such as the Toshiba TX4927/38/39.
172
173config TEGRA20_APB_DMA
174	bool "NVIDIA Tegra20 APB DMA support"
175	depends on ARCH_TEGRA
176	select DMA_ENGINE
177	help
178	  Support for the NVIDIA Tegra20 APB DMA controller driver. The
179	  DMA controller is having multiple DMA channel which can be
180	  configured for different peripherals like audio, UART, SPI,
181	  I2C etc which is in APB bus.
182	  This DMA controller transfers data from memory to peripheral fifo
183	  or vice versa. It does not support memory to memory data transfer.
184
185config S3C24XX_DMAC
186	tristate "Samsung S3C24XX DMA support"
187	depends on ARCH_S3C24XX
188	select DMA_ENGINE
189	select DMA_VIRTUAL_CHANNELS
190	help
191	  Support for the Samsung S3C24XX DMA controller driver. The
192	  DMA controller is having multiple DMA channels which can be
193	  configured for different peripherals like audio, UART, SPI.
194	  The DMA controller can transfer data from memory to peripheral,
195	  periphal to memory, periphal to periphal and memory to memory.
196
197source "drivers/dma/sh/Kconfig"
198
199config COH901318
200	bool "ST-Ericsson COH901318 DMA support"
201	select DMA_ENGINE
202	depends on ARCH_U300
203	help
204	  Enable support for ST-Ericsson COH 901 318 DMA.
205
206config STE_DMA40
207	bool "ST-Ericsson DMA40 support"
208	depends on ARCH_U8500
209	select DMA_ENGINE
210	help
211	  Support for ST-Ericsson DMA40 controller
212
213config AMCC_PPC440SPE_ADMA
214	tristate "AMCC PPC440SPe ADMA support"
215	depends on 440SPe || 440SP
216	select DMA_ENGINE
217	select DMA_ENGINE_RAID
218	select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
219	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
220	help
221	  Enable support for the AMCC PPC440SPe RAID engines.
222
223config TIMB_DMA
224	tristate "Timberdale FPGA DMA support"
225	depends on MFD_TIMBERDALE
226	select DMA_ENGINE
227	help
228	  Enable support for the Timberdale FPGA DMA engine.
229
230config SIRF_DMA
231	tristate "CSR SiRFprimaII/SiRFmarco DMA support"
232	depends on ARCH_SIRF
233	select DMA_ENGINE
234	help
235	  Enable support for the CSR SiRFprimaII DMA engine.
236
237config TI_EDMA
238	bool "TI EDMA support"
239	depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE
240	select DMA_ENGINE
241	select DMA_VIRTUAL_CHANNELS
242	select TI_PRIV_EDMA
243	default n
244	help
245	  Enable support for the TI EDMA controller. This DMA
246	  engine is found on TI DaVinci and AM33xx parts.
247
248config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
249	bool
250
251config PL330_DMA
252	tristate "DMA API Driver for PL330"
253	select DMA_ENGINE
254	depends on ARM_AMBA
255	help
256	  Select if your platform has one or more PL330 DMACs.
257	  You need to provide platform specific settings via
258	  platform_data for a dma-pl330 device.
259
260config PCH_DMA
261	tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
262	depends on PCI && (X86_32 || COMPILE_TEST)
263	select DMA_ENGINE
264	help
265	  Enable support for Intel EG20T PCH DMA engine.
266
267	  This driver also can be used for LAPIS Semiconductor IOH(Input/
268	  Output Hub), ML7213, ML7223 and ML7831.
269	  ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
270	  for MP(Media Phone) use and ML7831 IOH is for general purpose use.
271	  ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
272	  ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
273
274config IMX_SDMA
275	tristate "i.MX SDMA support"
276	depends on ARCH_MXC
277	select DMA_ENGINE
278	help
279	  Support the i.MX SDMA engine. This engine is integrated into
280	  Freescale i.MX25/31/35/51/53/6 chips.
281
282config IMX_DMA
283	tristate "i.MX DMA support"
284	depends on ARCH_MXC
285	select DMA_ENGINE
286	help
287	  Support the i.MX DMA engine. This engine is integrated into
288	  Freescale i.MX1/21/27 chips.
289
290config MXS_DMA
291	bool "MXS DMA support"
292	depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
293	select STMP_DEVICE
294	select DMA_ENGINE
295	help
296	  Support the MXS DMA engine. This engine including APBH-DMA
297	  and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips.
298
299config EP93XX_DMA
300	bool "Cirrus Logic EP93xx DMA support"
301	depends on ARCH_EP93XX
302	select DMA_ENGINE
303	help
304	  Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
305
306config DMA_SA11X0
307	tristate "SA-11x0 DMA support"
308	depends on ARCH_SA1100
309	select DMA_ENGINE
310	select DMA_VIRTUAL_CHANNELS
311	help
312	  Support the DMA engine found on Intel StrongARM SA-1100 and
313	  SA-1110 SoCs.  This DMA engine can only be used with on-chip
314	  devices.
315
316config MMP_TDMA
317	bool "MMP Two-Channel DMA support"
318	depends on ARCH_MMP
319	select DMA_ENGINE
320	select MMP_SRAM
321	help
322	  Support the MMP Two-Channel DMA engine.
323	  This engine used for MMP Audio DMA and pxa910 SQU.
324	  It needs sram driver under mach-mmp.
325
326	  Say Y here if you enabled MMP ADMA, otherwise say N.
327
328config DMA_OMAP
329	tristate "OMAP DMA support"
330	depends on ARCH_OMAP
331	select DMA_ENGINE
332	select DMA_VIRTUAL_CHANNELS
333
334config DMA_BCM2835
335	tristate "BCM2835 DMA engine support"
336	depends on ARCH_BCM2835
337	select DMA_ENGINE
338	select DMA_VIRTUAL_CHANNELS
339
340config TI_CPPI41
341	tristate "AM33xx CPPI41 DMA support"
342	depends on ARCH_OMAP
343	select DMA_ENGINE
344	help
345	  The Communications Port Programming Interface (CPPI) 4.1 DMA engine
346	  is currently used by the USB driver on AM335x platforms.
347
348config MMP_PDMA
349	bool "MMP PDMA support"
350	depends on (ARCH_MMP || ARCH_PXA)
351	select DMA_ENGINE
352	help
353	  Support the MMP PDMA engine for PXA and MMP platform.
354
355config DMA_JZ4740
356	tristate "JZ4740 DMA support"
357	depends on MACH_JZ4740
358	select DMA_ENGINE
359	select DMA_VIRTUAL_CHANNELS
360
361config K3_DMA
362	tristate "Hisilicon K3 DMA support"
363	depends on ARCH_HI3xxx
364	select DMA_ENGINE
365	select DMA_VIRTUAL_CHANNELS
366	help
367	  Support the DMA engine for Hisilicon K3 platform
368	  devices.
369
370config MOXART_DMA
371	tristate "MOXART DMA support"
372	depends on ARCH_MOXART
373	select DMA_ENGINE
374	select DMA_OF
375	select DMA_VIRTUAL_CHANNELS
376	help
377	  Enable support for the MOXA ART SoC DMA controller.
378
379config FSL_EDMA
380	tristate "Freescale eDMA engine support"
381	depends on OF
382	select DMA_ENGINE
383	select DMA_VIRTUAL_CHANNELS
384	help
385	  Support the Freescale eDMA engine with programmable channel
386	  multiplexing capability for DMA request sources(slot).
387	  This module can be found on Freescale Vybrid and LS-1 SoCs.
388
389config XILINX_VDMA
390	tristate "Xilinx AXI VDMA Engine"
391	depends on (ARCH_ZYNQ || MICROBLAZE)
392	select DMA_ENGINE
393	help
394	  Enable support for Xilinx AXI VDMA Soft IP.
395
396	  This engine provides high-bandwidth direct memory access
397	  between memory and AXI4-Stream video type target
398	  peripherals including peripherals which support AXI4-
399	  Stream Video Protocol.  It has two stream interfaces/
400	  channels, Memory Mapped to Stream (MM2S) and Stream to
401	  Memory Mapped (S2MM) for the data transfers.
402
403config DMA_SUN6I
404	tristate "Allwinner A31 SoCs DMA support"
405	depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
406	depends on RESET_CONTROLLER
407	select DMA_ENGINE
408	select DMA_VIRTUAL_CHANNELS
409	help
410	  Support for the DMA engine first found in Allwinner A31 SoCs.
411
412config NBPFAXI_DMA
413	tristate "Renesas Type-AXI NBPF DMA support"
414	select DMA_ENGINE
415	depends on ARM || COMPILE_TEST
416	help
417	  Support for "Type-AXI" NBPF DMA IPs from Renesas
418
419config IMG_MDC_DMA
420	tristate "IMG MDC support"
421	depends on MIPS || COMPILE_TEST
422	depends on MFD_SYSCON
423	select DMA_ENGINE
424	select DMA_VIRTUAL_CHANNELS
425	help
426	  Enable support for the IMG multi-threaded DMA controller (MDC).
427
428config DMA_ENGINE
429	bool
430
431config DMA_VIRTUAL_CHANNELS
432	tristate
433
434config DMA_ACPI
435	def_bool y
436	depends on ACPI
437
438config DMA_OF
439	def_bool y
440	depends on OF
441	select DMA_ENGINE
442
443comment "DMA Clients"
444	depends on DMA_ENGINE
445
446config ASYNC_TX_DMA
447	bool "Async_tx: Offload support for the async_tx api"
448	depends on DMA_ENGINE
449	help
450	  This allows the async_tx api to take advantage of offload engines for
451	  memcpy, memset, xor, and raid6 p+q operations.  If your platform has
452	  a dma engine that can perform raid operations and you have enabled
453	  MD_RAID456 say Y.
454
455	  If unsure, say N.
456
457config DMATEST
458	tristate "DMA Test client"
459	depends on DMA_ENGINE
460	help
461	  Simple DMA test client. Say N unless you're debugging a
462	  DMA Device driver.
463
464config DMA_ENGINE_RAID
465	bool
466
467config QCOM_BAM_DMA
468	tristate "QCOM BAM DMA support"
469	depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
470	select DMA_ENGINE
471	select DMA_VIRTUAL_CHANNELS
472	---help---
473	  Enable support for the QCOM BAM DMA controller.  This controller
474	  provides DMA capabilities for a variety of on-chip devices.
475
476endif
477