xref: /linux/drivers/dma/Kconfig (revision c75c5ab575af7db707689cdbb5a5c458e9a034bb)
1#
2# DMA engine configuration
3#
4
5menuconfig DMADEVICES
6	bool "DMA Engine support"
7	depends on HAS_DMA
8	help
9	  DMA engines can do asynchronous data transfers without
10	  involving the host CPU.  Currently, this framework can be
11	  used to offload memory copies in the network stack and
12	  RAID operations in the MD driver.  This menu only presents
13	  DMA Device drivers supported by the configured arch, it may
14	  be empty in some cases.
15
16config DMADEVICES_DEBUG
17        bool "DMA Engine debugging"
18        depends on DMADEVICES != n
19        help
20          This is an option for use by developers; most people should
21          say N here.  This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24        bool "DMA Engine verbose debugging"
25        depends on DMADEVICES_DEBUG != n
26        help
27          This is an option for use by developers; most people should
28          say N here.  This enables deeper (more verbose) debugging of
29          the DMA engine core and drivers.
30
31
32if DMADEVICES
33
34comment "DMA Devices"
35
36config INTEL_MID_DMAC
37	tristate "Intel MID DMA support for Peripheral DMA controllers"
38	depends on PCI && X86
39	select DMA_ENGINE
40	default n
41	help
42	  Enable support for the Intel(R) MID DMA engine present
43	  in Intel MID chipsets.
44
45	  Say Y here if you have such a chipset.
46
47	  If unsure, say N.
48
49config ASYNC_TX_ENABLE_CHANNEL_SWITCH
50	bool
51
52config AMBA_PL08X
53	bool "ARM PrimeCell PL080 or PL081 support"
54	depends on ARM_AMBA
55	select DMA_ENGINE
56	select DMA_VIRTUAL_CHANNELS
57	help
58	  Platform has a PL08x DMAC device
59	  which can provide DMA engine support
60
61config INTEL_IOATDMA
62	tristate "Intel I/OAT DMA support"
63	depends on PCI && X86
64	select DMA_ENGINE
65	select DCA
66	select ASYNC_TX_DISABLE_PQ_VAL_DMA
67	select ASYNC_TX_DISABLE_XOR_VAL_DMA
68	help
69	  Enable support for the Intel(R) I/OAT DMA engine present
70	  in recent Intel Xeon chipsets.
71
72	  Say Y here if you have such a chipset.
73
74	  If unsure, say N.
75
76config INTEL_IOP_ADMA
77	tristate "Intel IOP ADMA support"
78	depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
79	select DMA_ENGINE
80	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
81	help
82	  Enable support for the Intel(R) IOP Series RAID engines.
83
84config DW_DMAC
85	tristate "Synopsys DesignWare AHB DMA support"
86	depends on GENERIC_HARDIRQS
87	select DMA_ENGINE
88	default y if CPU_AT32AP7000
89	help
90	  Support the Synopsys DesignWare AHB DMA controller.  This
91	  can be integrated in chips such as the Atmel AT32ap7000.
92
93config DW_DMAC_BIG_ENDIAN_IO
94	bool "Use big endian I/O register access"
95	default y if AVR32
96	depends on DW_DMAC
97	help
98	  Say yes here to use big endian I/O access when reading and writing
99	  to the DMA controller registers. This is needed on some platforms,
100	  like the Atmel AVR32 architecture.
101
102	  If unsure, use the default setting.
103
104config AT_HDMAC
105	tristate "Atmel AHB DMA support"
106	depends on ARCH_AT91
107	select DMA_ENGINE
108	help
109	  Support the Atmel AHB DMA controller.
110
111config FSL_DMA
112	tristate "Freescale Elo and Elo Plus DMA support"
113	depends on FSL_SOC
114	select DMA_ENGINE
115	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
116	---help---
117	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
118	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
119	  Elo Plus is the DMA controller on 85xx and 86xx parts.
120
121config MPC512X_DMA
122	tristate "Freescale MPC512x built-in DMA engine support"
123	depends on PPC_MPC512x || PPC_MPC831x
124	select DMA_ENGINE
125	---help---
126	  Enable support for the Freescale MPC512x built-in DMA engine.
127
128source "drivers/dma/bestcomm/Kconfig"
129
130config MV_XOR
131	bool "Marvell XOR engine support"
132	depends on PLAT_ORION
133	select DMA_ENGINE
134	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
135	---help---
136	  Enable support for the Marvell XOR engine.
137
138config MX3_IPU
139	bool "MX3x Image Processing Unit support"
140	depends on ARCH_MXC
141	select DMA_ENGINE
142	default y
143	help
144	  If you plan to use the Image Processing unit in the i.MX3x, say
145	  Y here. If unsure, select Y.
146
147config MX3_IPU_IRQS
148	int "Number of dynamically mapped interrupts for IPU"
149	depends on MX3_IPU
150	range 2 137
151	default 4
152	help
153	  Out of 137 interrupt sources on i.MX31 IPU only very few are used.
154	  To avoid bloating the irq_desc[] array we allocate a sufficient
155	  number of IRQ slots and map them dynamically to specific sources.
156
157config TXX9_DMAC
158	tristate "Toshiba TXx9 SoC DMA support"
159	depends on MACH_TX49XX || MACH_TX39XX
160	select DMA_ENGINE
161	help
162	  Support the TXx9 SoC internal DMA controller.  This can be
163	  integrated in chips such as the Toshiba TX4927/38/39.
164
165config TEGRA20_APB_DMA
166	bool "NVIDIA Tegra20 APB DMA support"
167	depends on ARCH_TEGRA
168	select DMA_ENGINE
169	help
170	  Support for the NVIDIA Tegra20 APB DMA controller driver. The
171	  DMA controller is having multiple DMA channel which can be
172	  configured for different peripherals like audio, UART, SPI,
173	  I2C etc which is in APB bus.
174	  This DMA controller transfers data from memory to peripheral fifo
175	  or vice versa. It does not support memory to memory data transfer.
176
177
178
179config SH_DMAE
180	tristate "Renesas SuperH DMAC support"
181	depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
182	depends on !SH_DMA_API
183	select DMA_ENGINE
184	help
185	  Enable support for the Renesas SuperH DMA controllers.
186
187config COH901318
188	bool "ST-Ericsson COH901318 DMA support"
189	select DMA_ENGINE
190	depends on ARCH_U300
191	help
192	  Enable support for ST-Ericsson COH 901 318 DMA.
193
194config STE_DMA40
195	bool "ST-Ericsson DMA40 support"
196	depends on ARCH_U8500
197	select DMA_ENGINE
198	help
199	  Support for ST-Ericsson DMA40 controller
200
201config AMCC_PPC440SPE_ADMA
202	tristate "AMCC PPC440SPe ADMA support"
203	depends on 440SPe || 440SP
204	select DMA_ENGINE
205	select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
206	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
207	help
208	  Enable support for the AMCC PPC440SPe RAID engines.
209
210config TIMB_DMA
211	tristate "Timberdale FPGA DMA support"
212	depends on MFD_TIMBERDALE || HAS_IOMEM
213	select DMA_ENGINE
214	help
215	  Enable support for the Timberdale FPGA DMA engine.
216
217config SIRF_DMA
218	tristate "CSR SiRFprimaII/SiRFmarco DMA support"
219	depends on ARCH_SIRF
220	select DMA_ENGINE
221	help
222	  Enable support for the CSR SiRFprimaII DMA engine.
223
224config TI_EDMA
225	tristate "TI EDMA support"
226	depends on ARCH_DAVINCI
227	select DMA_ENGINE
228	select DMA_VIRTUAL_CHANNELS
229	default n
230	help
231	  Enable support for the TI EDMA controller. This DMA
232	  engine is found on TI DaVinci and AM33xx parts.
233
234config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
235	bool
236
237config PL330_DMA
238	tristate "DMA API Driver for PL330"
239	select DMA_ENGINE
240	depends on ARM_AMBA
241	help
242	  Select if your platform has one or more PL330 DMACs.
243	  You need to provide platform specific settings via
244	  platform_data for a dma-pl330 device.
245
246config PCH_DMA
247	tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
248	depends on PCI && X86
249	select DMA_ENGINE
250	help
251	  Enable support for Intel EG20T PCH DMA engine.
252
253	  This driver also can be used for LAPIS Semiconductor IOH(Input/
254	  Output Hub), ML7213, ML7223 and ML7831.
255	  ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
256	  for MP(Media Phone) use and ML7831 IOH is for general purpose use.
257	  ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
258	  ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
259
260config IMX_SDMA
261	tristate "i.MX SDMA support"
262	depends on ARCH_MXC
263	select DMA_ENGINE
264	help
265	  Support the i.MX SDMA engine. This engine is integrated into
266	  Freescale i.MX25/31/35/51/53 chips.
267
268config IMX_DMA
269	tristate "i.MX DMA support"
270	depends on ARCH_MXC
271	select DMA_ENGINE
272	help
273	  Support the i.MX DMA engine. This engine is integrated into
274	  Freescale i.MX1/21/27 chips.
275
276config MXS_DMA
277	bool "MXS DMA support"
278	depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
279	select STMP_DEVICE
280	select DMA_ENGINE
281	help
282	  Support the MXS DMA engine. This engine including APBH-DMA
283	  and APBX-DMA is integrated into Freescale i.MX23/28 chips.
284
285config EP93XX_DMA
286	bool "Cirrus Logic EP93xx DMA support"
287	depends on ARCH_EP93XX
288	select DMA_ENGINE
289	help
290	  Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
291
292config DMA_SA11X0
293	tristate "SA-11x0 DMA support"
294	depends on ARCH_SA1100
295	select DMA_ENGINE
296	select DMA_VIRTUAL_CHANNELS
297	help
298	  Support the DMA engine found on Intel StrongARM SA-1100 and
299	  SA-1110 SoCs.  This DMA engine can only be used with on-chip
300	  devices.
301
302config MMP_TDMA
303	bool "MMP Two-Channel DMA support"
304	depends on ARCH_MMP
305	select DMA_ENGINE
306	help
307	  Support the MMP Two-Channel DMA engine.
308	  This engine used for MMP Audio DMA and pxa910 SQU.
309
310	  Say Y here if you enabled MMP ADMA, otherwise say N.
311
312config DMA_OMAP
313	tristate "OMAP DMA support"
314	depends on ARCH_OMAP
315	select DMA_ENGINE
316	select DMA_VIRTUAL_CHANNELS
317
318config MMP_PDMA
319	bool "MMP PDMA support"
320	depends on (ARCH_MMP || ARCH_PXA)
321	select DMA_ENGINE
322	help
323	  Support the MMP PDMA engine for PXA and MMP platfrom.
324
325config DMA_ENGINE
326	bool
327
328config DMA_VIRTUAL_CHANNELS
329	tristate
330
331config DMA_OF
332	def_bool y
333	depends on OF
334
335comment "DMA Clients"
336	depends on DMA_ENGINE
337
338config NET_DMA
339	bool "Network: TCP receive copy offload"
340	depends on DMA_ENGINE && NET
341	default (INTEL_IOATDMA || FSL_DMA)
342	help
343	  This enables the use of DMA engines in the network stack to
344	  offload receive copy-to-user operations, freeing CPU cycles.
345
346	  Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
347	  say N.
348
349config ASYNC_TX_DMA
350	bool "Async_tx: Offload support for the async_tx api"
351	depends on DMA_ENGINE
352	help
353	  This allows the async_tx api to take advantage of offload engines for
354	  memcpy, memset, xor, and raid6 p+q operations.  If your platform has
355	  a dma engine that can perform raid operations and you have enabled
356	  MD_RAID456 say Y.
357
358	  If unsure, say N.
359
360config DMATEST
361	tristate "DMA Test client"
362	depends on DMA_ENGINE
363	help
364	  Simple DMA test client. Say N unless you're debugging a
365	  DMA Device driver.
366
367endif
368