1# 2# DMA engine configuration 3# 4 5menuconfig DMADEVICES 6 bool "DMA Engine support" 7 depends on HAS_DMA 8 help 9 DMA engines can do asynchronous data transfers without 10 involving the host CPU. Currently, this framework can be 11 used to offload memory copies in the network stack and 12 RAID operations in the MD driver. This menu only presents 13 DMA Device drivers supported by the configured arch, it may 14 be empty in some cases. 15 16config DMADEVICES_DEBUG 17 bool "DMA Engine debugging" 18 depends on DMADEVICES != n 19 help 20 This is an option for use by developers; most people should 21 say N here. This enables DMA engine core and driver debugging. 22 23config DMADEVICES_VDEBUG 24 bool "DMA Engine verbose debugging" 25 depends on DMADEVICES_DEBUG != n 26 help 27 This is an option for use by developers; most people should 28 say N here. This enables deeper (more verbose) debugging of 29 the DMA engine core and drivers. 30 31 32if DMADEVICES 33 34comment "DMA Devices" 35 36config INTEL_MID_DMAC 37 tristate "Intel MID DMA support for Peripheral DMA controllers" 38 depends on PCI && X86 39 select DMA_ENGINE 40 default n 41 help 42 Enable support for the Intel(R) MID DMA engine present 43 in Intel MID chipsets. 44 45 Say Y here if you have such a chipset. 46 47 If unsure, say N. 48 49config ASYNC_TX_ENABLE_CHANNEL_SWITCH 50 bool 51 52config AMBA_PL08X 53 bool "ARM PrimeCell PL080 or PL081 support" 54 depends on ARM_AMBA 55 select DMA_ENGINE 56 select DMA_VIRTUAL_CHANNELS 57 help 58 Platform has a PL08x DMAC device 59 which can provide DMA engine support 60 61config INTEL_IOATDMA 62 tristate "Intel I/OAT DMA support" 63 depends on PCI && X86 64 select DMA_ENGINE 65 select DCA 66 select ASYNC_TX_DISABLE_PQ_VAL_DMA 67 select ASYNC_TX_DISABLE_XOR_VAL_DMA 68 help 69 Enable support for the Intel(R) I/OAT DMA engine present 70 in recent Intel Xeon chipsets. 71 72 Say Y here if you have such a chipset. 73 74 If unsure, say N. 75 76config INTEL_IOP_ADMA 77 tristate "Intel IOP ADMA support" 78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX 79 select DMA_ENGINE 80 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 81 help 82 Enable support for the Intel(R) IOP Series RAID engines. 83 84config DW_DMAC 85 tristate "Synopsys DesignWare AHB DMA support" 86 select DMA_ENGINE 87 default y if CPU_AT32AP7000 88 help 89 Support the Synopsys DesignWare AHB DMA controller. This 90 can be integrated in chips such as the Atmel AT32ap7000. 91 92config DW_DMAC_BIG_ENDIAN_IO 93 bool "Use big endian I/O register access" 94 default y if AVR32 95 depends on DW_DMAC 96 help 97 Say yes here to use big endian I/O access when reading and writing 98 to the DMA controller registers. This is needed on some platforms, 99 like the Atmel AVR32 architecture. 100 101 If unsure, use the default setting. 102 103config AT_HDMAC 104 tristate "Atmel AHB DMA support" 105 depends on ARCH_AT91 106 select DMA_ENGINE 107 help 108 Support the Atmel AHB DMA controller. 109 110config FSL_DMA 111 tristate "Freescale Elo and Elo Plus DMA support" 112 depends on FSL_SOC 113 select DMA_ENGINE 114 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 115 ---help--- 116 Enable support for the Freescale Elo and Elo Plus DMA controllers. 117 The Elo is the DMA controller on some 82xx and 83xx parts, and the 118 Elo Plus is the DMA controller on 85xx and 86xx parts. 119 120config MPC512X_DMA 121 tristate "Freescale MPC512x built-in DMA engine support" 122 depends on PPC_MPC512x || PPC_MPC831x 123 select DMA_ENGINE 124 ---help--- 125 Enable support for the Freescale MPC512x built-in DMA engine. 126 127config MV_XOR 128 bool "Marvell XOR engine support" 129 depends on PLAT_ORION 130 select DMA_ENGINE 131 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 132 ---help--- 133 Enable support for the Marvell XOR engine. 134 135config MX3_IPU 136 bool "MX3x Image Processing Unit support" 137 depends on ARCH_MXC 138 select DMA_ENGINE 139 default y 140 help 141 If you plan to use the Image Processing unit in the i.MX3x, say 142 Y here. If unsure, select Y. 143 144config MX3_IPU_IRQS 145 int "Number of dynamically mapped interrupts for IPU" 146 depends on MX3_IPU 147 range 2 137 148 default 4 149 help 150 Out of 137 interrupt sources on i.MX31 IPU only very few are used. 151 To avoid bloating the irq_desc[] array we allocate a sufficient 152 number of IRQ slots and map them dynamically to specific sources. 153 154config TXX9_DMAC 155 tristate "Toshiba TXx9 SoC DMA support" 156 depends on MACH_TX49XX || MACH_TX39XX 157 select DMA_ENGINE 158 help 159 Support the TXx9 SoC internal DMA controller. This can be 160 integrated in chips such as the Toshiba TX4927/38/39. 161 162config TEGRA20_APB_DMA 163 bool "NVIDIA Tegra20 APB DMA support" 164 depends on ARCH_TEGRA 165 select DMA_ENGINE 166 help 167 Support for the NVIDIA Tegra20 APB DMA controller driver. The 168 DMA controller is having multiple DMA channel which can be 169 configured for different peripherals like audio, UART, SPI, 170 I2C etc which is in APB bus. 171 This DMA controller transfers data from memory to peripheral fifo 172 or vice versa. It does not support memory to memory data transfer. 173 174 175 176config SH_DMAE 177 tristate "Renesas SuperH DMAC support" 178 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE) 179 depends on !SH_DMA_API 180 select DMA_ENGINE 181 help 182 Enable support for the Renesas SuperH DMA controllers. 183 184config COH901318 185 bool "ST-Ericsson COH901318 DMA support" 186 select DMA_ENGINE 187 depends on ARCH_U300 188 help 189 Enable support for ST-Ericsson COH 901 318 DMA. 190 191config STE_DMA40 192 bool "ST-Ericsson DMA40 support" 193 depends on ARCH_U8500 194 select DMA_ENGINE 195 help 196 Support for ST-Ericsson DMA40 controller 197 198config AMCC_PPC440SPE_ADMA 199 tristate "AMCC PPC440SPe ADMA support" 200 depends on 440SPe || 440SP 201 select DMA_ENGINE 202 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL 203 select ASYNC_TX_ENABLE_CHANNEL_SWITCH 204 help 205 Enable support for the AMCC PPC440SPe RAID engines. 206 207config TIMB_DMA 208 tristate "Timberdale FPGA DMA support" 209 depends on MFD_TIMBERDALE || HAS_IOMEM 210 select DMA_ENGINE 211 help 212 Enable support for the Timberdale FPGA DMA engine. 213 214config SIRF_DMA 215 tristate "CSR SiRFprimaII/SiRFmarco DMA support" 216 depends on ARCH_SIRF 217 select DMA_ENGINE 218 help 219 Enable support for the CSR SiRFprimaII DMA engine. 220 221config TI_EDMA 222 tristate "TI EDMA support" 223 depends on ARCH_DAVINCI 224 select DMA_ENGINE 225 select DMA_VIRTUAL_CHANNELS 226 default n 227 help 228 Enable support for the TI EDMA controller. This DMA 229 engine is found on TI DaVinci and AM33xx parts. 230 231config ARCH_HAS_ASYNC_TX_FIND_CHANNEL 232 bool 233 234config PL330_DMA 235 tristate "DMA API Driver for PL330" 236 select DMA_ENGINE 237 depends on ARM_AMBA 238 help 239 Select if your platform has one or more PL330 DMACs. 240 You need to provide platform specific settings via 241 platform_data for a dma-pl330 device. 242 243config PCH_DMA 244 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" 245 depends on PCI && X86 246 select DMA_ENGINE 247 help 248 Enable support for Intel EG20T PCH DMA engine. 249 250 This driver also can be used for LAPIS Semiconductor IOH(Input/ 251 Output Hub), ML7213, ML7223 and ML7831. 252 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is 253 for MP(Media Phone) use and ML7831 IOH is for general purpose use. 254 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. 255 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. 256 257config IMX_SDMA 258 tristate "i.MX SDMA support" 259 depends on ARCH_MXC 260 select DMA_ENGINE 261 help 262 Support the i.MX SDMA engine. This engine is integrated into 263 Freescale i.MX25/31/35/51/53 chips. 264 265config IMX_DMA 266 tristate "i.MX DMA support" 267 depends on ARCH_MXC 268 select DMA_ENGINE 269 help 270 Support the i.MX DMA engine. This engine is integrated into 271 Freescale i.MX1/21/27 chips. 272 273config MXS_DMA 274 bool "MXS DMA support" 275 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q 276 select STMP_DEVICE 277 select DMA_ENGINE 278 help 279 Support the MXS DMA engine. This engine including APBH-DMA 280 and APBX-DMA is integrated into Freescale i.MX23/28 chips. 281 282config EP93XX_DMA 283 bool "Cirrus Logic EP93xx DMA support" 284 depends on ARCH_EP93XX 285 select DMA_ENGINE 286 help 287 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. 288 289config DMA_SA11X0 290 tristate "SA-11x0 DMA support" 291 depends on ARCH_SA1100 292 select DMA_ENGINE 293 select DMA_VIRTUAL_CHANNELS 294 help 295 Support the DMA engine found on Intel StrongARM SA-1100 and 296 SA-1110 SoCs. This DMA engine can only be used with on-chip 297 devices. 298 299config MMP_TDMA 300 bool "MMP Two-Channel DMA support" 301 depends on ARCH_MMP 302 select DMA_ENGINE 303 help 304 Support the MMP Two-Channel DMA engine. 305 This engine used for MMP Audio DMA and pxa910 SQU. 306 307 Say Y here if you enabled MMP ADMA, otherwise say N. 308 309config DMA_OMAP 310 tristate "OMAP DMA support" 311 depends on ARCH_OMAP 312 select DMA_ENGINE 313 select DMA_VIRTUAL_CHANNELS 314 315config MMP_PDMA 316 bool "MMP PDMA support" 317 depends on (ARCH_MMP || ARCH_PXA) 318 select DMA_ENGINE 319 help 320 Support the MMP PDMA engine for PXA and MMP platfrom. 321 322config DMA_ENGINE 323 bool 324 325config DMA_VIRTUAL_CHANNELS 326 tristate 327 328comment "DMA Clients" 329 depends on DMA_ENGINE 330 331config NET_DMA 332 bool "Network: TCP receive copy offload" 333 depends on DMA_ENGINE && NET 334 default (INTEL_IOATDMA || FSL_DMA) 335 help 336 This enables the use of DMA engines in the network stack to 337 offload receive copy-to-user operations, freeing CPU cycles. 338 339 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise 340 say N. 341 342config ASYNC_TX_DMA 343 bool "Async_tx: Offload support for the async_tx api" 344 depends on DMA_ENGINE 345 help 346 This allows the async_tx api to take advantage of offload engines for 347 memcpy, memset, xor, and raid6 p+q operations. If your platform has 348 a dma engine that can perform raid operations and you have enabled 349 MD_RAID456 say Y. 350 351 If unsure, say N. 352 353config DMATEST 354 tristate "DMA Test client" 355 depends on DMA_ENGINE 356 help 357 Simple DMA test client. Say N unless you're debugging a 358 DMA Device driver. 359 360endif 361