xref: /linux/drivers/dma/Kconfig (revision 0d456bad36d42d16022be045c8a53ddbb59ee478)
1#
2# DMA engine configuration
3#
4
5menuconfig DMADEVICES
6	bool "DMA Engine support"
7	depends on HAS_DMA
8	help
9	  DMA engines can do asynchronous data transfers without
10	  involving the host CPU.  Currently, this framework can be
11	  used to offload memory copies in the network stack and
12	  RAID operations in the MD driver.  This menu only presents
13	  DMA Device drivers supported by the configured arch, it may
14	  be empty in some cases.
15
16config DMADEVICES_DEBUG
17        bool "DMA Engine debugging"
18        depends on DMADEVICES != n
19        help
20          This is an option for use by developers; most people should
21          say N here.  This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24        bool "DMA Engine verbose debugging"
25        depends on DMADEVICES_DEBUG != n
26        help
27          This is an option for use by developers; most people should
28          say N here.  This enables deeper (more verbose) debugging of
29          the DMA engine core and drivers.
30
31
32if DMADEVICES
33
34comment "DMA Devices"
35
36config INTEL_MID_DMAC
37	tristate "Intel MID DMA support for Peripheral DMA controllers"
38	depends on PCI && X86
39	select DMA_ENGINE
40	default n
41	help
42	  Enable support for the Intel(R) MID DMA engine present
43	  in Intel MID chipsets.
44
45	  Say Y here if you have such a chipset.
46
47	  If unsure, say N.
48
49config ASYNC_TX_ENABLE_CHANNEL_SWITCH
50	bool
51
52config AMBA_PL08X
53	bool "ARM PrimeCell PL080 or PL081 support"
54	depends on ARM_AMBA && EXPERIMENTAL
55	select DMA_ENGINE
56	select DMA_VIRTUAL_CHANNELS
57	help
58	  Platform has a PL08x DMAC device
59	  which can provide DMA engine support
60
61config INTEL_IOATDMA
62	tristate "Intel I/OAT DMA support"
63	depends on PCI && X86
64	select DMA_ENGINE
65	select DCA
66	select ASYNC_TX_DISABLE_PQ_VAL_DMA
67	select ASYNC_TX_DISABLE_XOR_VAL_DMA
68	help
69	  Enable support for the Intel(R) I/OAT DMA engine present
70	  in recent Intel Xeon chipsets.
71
72	  Say Y here if you have such a chipset.
73
74	  If unsure, say N.
75
76config INTEL_IOP_ADMA
77	tristate "Intel IOP ADMA support"
78	depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
79	select DMA_ENGINE
80	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
81	help
82	  Enable support for the Intel(R) IOP Series RAID engines.
83
84config DW_DMAC
85	tristate "Synopsys DesignWare AHB DMA support"
86	depends on HAVE_CLK
87	select DMA_ENGINE
88	default y if CPU_AT32AP7000
89	help
90	  Support the Synopsys DesignWare AHB DMA controller.  This
91	  can be integrated in chips such as the Atmel AT32ap7000.
92
93config DW_DMAC_BIG_ENDIAN_IO
94	bool "Use big endian I/O register access"
95	default y if AVR32
96	depends on DW_DMAC
97	help
98	  Say yes here to use big endian I/O access when reading and writing
99	  to the DMA controller registers. This is needed on some platforms,
100	  like the Atmel AVR32 architecture.
101
102	  If unsure, use the default setting.
103
104config AT_HDMAC
105	tristate "Atmel AHB DMA support"
106	depends on ARCH_AT91
107	select DMA_ENGINE
108	help
109	  Support the Atmel AHB DMA controller.
110
111config FSL_DMA
112	tristate "Freescale Elo and Elo Plus DMA support"
113	depends on FSL_SOC
114	select DMA_ENGINE
115	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
116	---help---
117	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
118	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
119	  Elo Plus is the DMA controller on 85xx and 86xx parts.
120
121config MPC512X_DMA
122	tristate "Freescale MPC512x built-in DMA engine support"
123	depends on PPC_MPC512x || PPC_MPC831x
124	select DMA_ENGINE
125	---help---
126	  Enable support for the Freescale MPC512x built-in DMA engine.
127
128config MV_XOR
129	bool "Marvell XOR engine support"
130	depends on PLAT_ORION
131	select DMA_ENGINE
132	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
133	---help---
134	  Enable support for the Marvell XOR engine.
135
136config MX3_IPU
137	bool "MX3x Image Processing Unit support"
138	depends on ARCH_MXC
139	select DMA_ENGINE
140	default y
141	help
142	  If you plan to use the Image Processing unit in the i.MX3x, say
143	  Y here. If unsure, select Y.
144
145config MX3_IPU_IRQS
146	int "Number of dynamically mapped interrupts for IPU"
147	depends on MX3_IPU
148	range 2 137
149	default 4
150	help
151	  Out of 137 interrupt sources on i.MX31 IPU only very few are used.
152	  To avoid bloating the irq_desc[] array we allocate a sufficient
153	  number of IRQ slots and map them dynamically to specific sources.
154
155config TXX9_DMAC
156	tristate "Toshiba TXx9 SoC DMA support"
157	depends on MACH_TX49XX || MACH_TX39XX
158	select DMA_ENGINE
159	help
160	  Support the TXx9 SoC internal DMA controller.  This can be
161	  integrated in chips such as the Toshiba TX4927/38/39.
162
163config TEGRA20_APB_DMA
164	bool "NVIDIA Tegra20 APB DMA support"
165	depends on ARCH_TEGRA
166	select DMA_ENGINE
167	help
168	  Support for the NVIDIA Tegra20 APB DMA controller driver. The
169	  DMA controller is having multiple DMA channel which can be
170	  configured for different peripherals like audio, UART, SPI,
171	  I2C etc which is in APB bus.
172	  This DMA controller transfers data from memory to peripheral fifo
173	  or vice versa. It does not support memory to memory data transfer.
174
175
176
177config SH_DMAE
178	tristate "Renesas SuperH DMAC support"
179	depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
180	depends on !SH_DMA_API
181	select DMA_ENGINE
182	help
183	  Enable support for the Renesas SuperH DMA controllers.
184
185config COH901318
186	bool "ST-Ericsson COH901318 DMA support"
187	select DMA_ENGINE
188	depends on ARCH_U300
189	help
190	  Enable support for ST-Ericsson COH 901 318 DMA.
191
192config STE_DMA40
193	bool "ST-Ericsson DMA40 support"
194	depends on ARCH_U8500
195	select DMA_ENGINE
196	help
197	  Support for ST-Ericsson DMA40 controller
198
199config AMCC_PPC440SPE_ADMA
200	tristate "AMCC PPC440SPe ADMA support"
201	depends on 440SPe || 440SP
202	select DMA_ENGINE
203	select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
204	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
205	help
206	  Enable support for the AMCC PPC440SPe RAID engines.
207
208config TIMB_DMA
209	tristate "Timberdale FPGA DMA support"
210	depends on MFD_TIMBERDALE || HAS_IOMEM
211	select DMA_ENGINE
212	help
213	  Enable support for the Timberdale FPGA DMA engine.
214
215config SIRF_DMA
216	tristate "CSR SiRFprimaII DMA support"
217	depends on ARCH_PRIMA2
218	select DMA_ENGINE
219	help
220	  Enable support for the CSR SiRFprimaII DMA engine.
221
222config TI_EDMA
223	tristate "TI EDMA support"
224	depends on ARCH_DAVINCI
225	select DMA_ENGINE
226	select DMA_VIRTUAL_CHANNELS
227	default n
228	help
229	  Enable support for the TI EDMA controller. This DMA
230	  engine is found on TI DaVinci and AM33xx parts.
231
232config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
233	bool
234
235config PL330_DMA
236	tristate "DMA API Driver for PL330"
237	select DMA_ENGINE
238	depends on ARM_AMBA
239	help
240	  Select if your platform has one or more PL330 DMACs.
241	  You need to provide platform specific settings via
242	  platform_data for a dma-pl330 device.
243
244config PCH_DMA
245	tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
246	depends on PCI && X86
247	select DMA_ENGINE
248	help
249	  Enable support for Intel EG20T PCH DMA engine.
250
251	  This driver also can be used for LAPIS Semiconductor IOH(Input/
252	  Output Hub), ML7213, ML7223 and ML7831.
253	  ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
254	  for MP(Media Phone) use and ML7831 IOH is for general purpose use.
255	  ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
256	  ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
257
258config IMX_SDMA
259	tristate "i.MX SDMA support"
260	depends on ARCH_MXC
261	select DMA_ENGINE
262	help
263	  Support the i.MX SDMA engine. This engine is integrated into
264	  Freescale i.MX25/31/35/51/53 chips.
265
266config IMX_DMA
267	tristate "i.MX DMA support"
268	depends on ARCH_MXC
269	select DMA_ENGINE
270	help
271	  Support the i.MX DMA engine. This engine is integrated into
272	  Freescale i.MX1/21/27 chips.
273
274config MXS_DMA
275	bool "MXS DMA support"
276	depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
277	select STMP_DEVICE
278	select DMA_ENGINE
279	help
280	  Support the MXS DMA engine. This engine including APBH-DMA
281	  and APBX-DMA is integrated into Freescale i.MX23/28 chips.
282
283config EP93XX_DMA
284	bool "Cirrus Logic EP93xx DMA support"
285	depends on ARCH_EP93XX
286	select DMA_ENGINE
287	help
288	  Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
289
290config DMA_SA11X0
291	tristate "SA-11x0 DMA support"
292	depends on ARCH_SA1100
293	select DMA_ENGINE
294	select DMA_VIRTUAL_CHANNELS
295	help
296	  Support the DMA engine found on Intel StrongARM SA-1100 and
297	  SA-1110 SoCs.  This DMA engine can only be used with on-chip
298	  devices.
299
300config MMP_TDMA
301	bool "MMP Two-Channel DMA support"
302	depends on ARCH_MMP
303	select DMA_ENGINE
304	help
305	  Support the MMP Two-Channel DMA engine.
306	  This engine used for MMP Audio DMA and pxa910 SQU.
307
308	  Say Y here if you enabled MMP ADMA, otherwise say N.
309
310config DMA_OMAP
311	tristate "OMAP DMA support"
312	depends on ARCH_OMAP
313	select DMA_ENGINE
314	select DMA_VIRTUAL_CHANNELS
315
316config MMP_PDMA
317	bool "MMP PDMA support"
318	depends on (ARCH_MMP || ARCH_PXA)
319	select DMA_ENGINE
320	help
321	  Support the MMP PDMA engine for PXA and MMP platfrom.
322
323config DMA_ENGINE
324	bool
325
326config DMA_VIRTUAL_CHANNELS
327	tristate
328
329comment "DMA Clients"
330	depends on DMA_ENGINE
331
332config NET_DMA
333	bool "Network: TCP receive copy offload"
334	depends on DMA_ENGINE && NET
335	default (INTEL_IOATDMA || FSL_DMA)
336	help
337	  This enables the use of DMA engines in the network stack to
338	  offload receive copy-to-user operations, freeing CPU cycles.
339
340	  Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
341	  say N.
342
343config ASYNC_TX_DMA
344	bool "Async_tx: Offload support for the async_tx api"
345	depends on DMA_ENGINE
346	help
347	  This allows the async_tx api to take advantage of offload engines for
348	  memcpy, memset, xor, and raid6 p+q operations.  If your platform has
349	  a dma engine that can perform raid operations and you have enabled
350	  MD_RAID456 say Y.
351
352	  If unsure, say N.
353
354config DMATEST
355	tristate "DMA Test client"
356	depends on DMA_ENGINE
357	help
358	  Simple DMA test client. Say N unless you're debugging a
359	  DMA Device driver.
360
361endif
362