1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright(c) 2022 Intel Corporation. All rights reserved. */ 3 #include <linux/debugfs.h> 4 #include <linux/device.h> 5 #include <linux/module.h> 6 #include <linux/pci.h> 7 8 #include "cxlmem.h" 9 #include "cxlpci.h" 10 11 /** 12 * DOC: cxl mem 13 * 14 * CXL memory endpoint devices and switches are CXL capable devices that are 15 * participating in CXL.mem protocol. Their functionality builds on top of the 16 * CXL.io protocol that allows enumerating and configuring components via 17 * standard PCI mechanisms. 18 * 19 * The cxl_mem driver owns kicking off the enumeration of this CXL.mem 20 * capability. With the detection of a CXL capable endpoint, the driver will 21 * walk up to find the platform specific port it is connected to, and determine 22 * if there are intervening switches in the path. If there are switches, a 23 * secondary action is to enumerate those (implemented in cxl_core). Finally the 24 * cxl_mem driver adds the device it is bound to as a CXL endpoint-port for use 25 * in higher level operations. 26 */ 27 28 static void enable_suspend(void *data) 29 { 30 cxl_mem_active_dec(); 31 } 32 33 static void remove_debugfs(void *dentry) 34 { 35 debugfs_remove_recursive(dentry); 36 } 37 38 static int cxl_mem_dpa_show(struct seq_file *file, void *data) 39 { 40 struct device *dev = file->private; 41 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); 42 43 cxl_dpa_debug(file, cxlmd->cxlds); 44 45 return 0; 46 } 47 48 static int cxl_debugfs_poison_inject(void *data, u64 dpa) 49 { 50 struct cxl_memdev *cxlmd = data; 51 52 return cxl_inject_poison(cxlmd, dpa); 53 } 54 55 DEFINE_DEBUGFS_ATTRIBUTE(cxl_poison_inject_fops, NULL, 56 cxl_debugfs_poison_inject, "%llx\n"); 57 58 static int cxl_debugfs_poison_clear(void *data, u64 dpa) 59 { 60 struct cxl_memdev *cxlmd = data; 61 62 return cxl_clear_poison(cxlmd, dpa); 63 } 64 65 DEFINE_DEBUGFS_ATTRIBUTE(cxl_poison_clear_fops, NULL, 66 cxl_debugfs_poison_clear, "%llx\n"); 67 68 static int cxl_mem_probe(struct device *dev) 69 { 70 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); 71 struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); 72 struct cxl_dev_state *cxlds = cxlmd->cxlds; 73 struct device *endpoint_parent; 74 struct cxl_dport *dport; 75 struct dentry *dentry; 76 int rc; 77 78 if (!cxlds->media_ready) 79 return -EBUSY; 80 81 /* 82 * Someone is trying to reattach this device after it lost its port 83 * connection (an endpoint port previously registered by this memdev was 84 * disabled). This racy check is ok because if the port is still gone, 85 * no harm done, and if the port hierarchy comes back it will re-trigger 86 * this probe. Port rescan and memdev detach work share the same 87 * single-threaded workqueue. 88 */ 89 if (work_pending(&cxlmd->detach_work)) 90 return -EBUSY; 91 92 dentry = cxl_debugfs_create_dir(dev_name(dev)); 93 debugfs_create_devm_seqfile(dev, "dpamem", dentry, cxl_mem_dpa_show); 94 95 if (test_bit(CXL_POISON_ENABLED_INJECT, mds->poison.enabled_cmds)) 96 debugfs_create_file("inject_poison", 0200, dentry, cxlmd, 97 &cxl_poison_inject_fops); 98 if (test_bit(CXL_POISON_ENABLED_CLEAR, mds->poison.enabled_cmds)) 99 debugfs_create_file("clear_poison", 0200, dentry, cxlmd, 100 &cxl_poison_clear_fops); 101 102 rc = devm_add_action_or_reset(dev, remove_debugfs, dentry); 103 if (rc) 104 return rc; 105 106 rc = devm_cxl_enumerate_ports(cxlmd); 107 if (rc) 108 return rc; 109 110 struct cxl_port *parent_port __free(put_cxl_port) = 111 cxl_mem_find_port(cxlmd, &dport); 112 if (!parent_port) { 113 dev_err(dev, "CXL port topology not found\n"); 114 return -ENXIO; 115 } 116 117 if (cxl_pmem_size(cxlds) && IS_ENABLED(CONFIG_CXL_PMEM)) { 118 rc = devm_cxl_add_nvdimm(parent_port, cxlmd); 119 if (rc) { 120 if (rc == -ENODEV) 121 dev_info(dev, "PMEM disabled by platform\n"); 122 return rc; 123 } 124 } 125 126 if (dport->rch) 127 endpoint_parent = parent_port->uport_dev; 128 else 129 endpoint_parent = &parent_port->dev; 130 131 cxl_dport_init_ras_reporting(dport, dev); 132 133 scoped_guard(device, endpoint_parent) { 134 if (!endpoint_parent->driver) { 135 dev_err(dev, "CXL port topology %s not enabled\n", 136 dev_name(endpoint_parent)); 137 return -ENXIO; 138 } 139 140 rc = devm_cxl_add_endpoint(endpoint_parent, cxlmd, dport); 141 if (rc) 142 return rc; 143 } 144 145 if (cxlmd->attach) { 146 rc = cxlmd->attach->probe(cxlmd); 147 if (rc) 148 return rc; 149 } 150 151 rc = devm_cxl_memdev_edac_register(cxlmd); 152 if (rc) 153 dev_dbg(dev, "CXL memdev EDAC registration failed rc=%d\n", rc); 154 155 /* 156 * The kernel may be operating out of CXL memory on this device, 157 * there is no spec defined way to determine whether this device 158 * preserves contents over suspend, and there is no simple way 159 * to arrange for the suspend image to avoid CXL memory which 160 * would setup a circular dependency between PCI resume and save 161 * state restoration. 162 * 163 * TODO: support suspend when all the regions this device is 164 * hosting are locked and covered by the system address map, 165 * i.e. platform firmware owns restoring the HDM configuration 166 * that it locked. 167 */ 168 cxl_mem_active_inc(); 169 return devm_add_action_or_reset(dev, enable_suspend, NULL); 170 } 171 172 /** 173 * devm_cxl_add_memdev - Add a CXL memory device 174 * @cxlds: CXL device state to associate with the memdev 175 * @attach: Caller depends on CXL topology attachment 176 * 177 * Upon return the device will have had a chance to attach to the 178 * cxl_mem driver, but may fail to attach if the CXL topology is not ready 179 * (hardware CXL link down, or software platform CXL root not attached). 180 * 181 * When @attach is NULL it indicates the caller wants the memdev to remain 182 * registered even if it does not immediately attach to the CXL hierarchy. When 183 * @attach is provided a cxl_mem_probe() failure leads to failure of this routine. 184 * 185 * The parent of the resulting device and the devm context for allocations is 186 * @cxlds->dev. 187 */ 188 struct cxl_memdev *devm_cxl_add_memdev(struct cxl_dev_state *cxlds, 189 const struct cxl_memdev_attach *attach) 190 { 191 return __devm_cxl_add_memdev(cxlds, attach); 192 } 193 EXPORT_SYMBOL_NS_GPL(devm_cxl_add_memdev, "CXL"); 194 195 static ssize_t trigger_poison_list_store(struct device *dev, 196 struct device_attribute *attr, 197 const char *buf, size_t len) 198 { 199 bool trigger; 200 int rc; 201 202 if (kstrtobool(buf, &trigger) || !trigger) 203 return -EINVAL; 204 205 rc = cxl_trigger_poison_list(to_cxl_memdev(dev)); 206 207 return rc ? rc : len; 208 } 209 static DEVICE_ATTR_WO(trigger_poison_list); 210 211 static umode_t cxl_mem_visible(struct kobject *kobj, struct attribute *a, int n) 212 { 213 struct device *dev = kobj_to_dev(kobj); 214 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); 215 struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); 216 217 if (a == &dev_attr_trigger_poison_list.attr) 218 if (!test_bit(CXL_POISON_ENABLED_LIST, 219 mds->poison.enabled_cmds)) 220 return 0; 221 222 return a->mode; 223 } 224 225 static struct attribute *cxl_mem_attrs[] = { 226 &dev_attr_trigger_poison_list.attr, 227 NULL 228 }; 229 230 static struct attribute_group cxl_mem_group = { 231 .attrs = cxl_mem_attrs, 232 .is_visible = cxl_mem_visible, 233 }; 234 235 __ATTRIBUTE_GROUPS(cxl_mem); 236 237 static struct cxl_driver cxl_mem_driver = { 238 .name = "cxl_mem", 239 .probe = cxl_mem_probe, 240 .id = CXL_DEVICE_MEMORY_EXPANDER, 241 .drv = { 242 .probe_type = PROBE_FORCE_SYNCHRONOUS, 243 .dev_groups = cxl_mem_groups, 244 }, 245 }; 246 247 module_cxl_driver(cxl_mem_driver); 248 249 MODULE_DESCRIPTION("CXL: Memory Expansion"); 250 MODULE_LICENSE("GPL v2"); 251 MODULE_IMPORT_NS("CXL"); 252 MODULE_ALIAS_CXL(CXL_DEVICE_MEMORY_EXPANDER); 253