1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright(c) 2022 Intel Corporation. All rights reserved. */ 3 #include <linux/debugfs.h> 4 #include <linux/device.h> 5 #include <linux/module.h> 6 #include <linux/pci.h> 7 8 #include "cxlmem.h" 9 #include "cxlpci.h" 10 11 /** 12 * DOC: cxl mem 13 * 14 * CXL memory endpoint devices and switches are CXL capable devices that are 15 * participating in CXL.mem protocol. Their functionality builds on top of the 16 * CXL.io protocol that allows enumerating and configuring components via 17 * standard PCI mechanisms. 18 * 19 * The cxl_mem driver owns kicking off the enumeration of this CXL.mem 20 * capability. With the detection of a CXL capable endpoint, the driver will 21 * walk up to find the platform specific port it is connected to, and determine 22 * if there are intervening switches in the path. If there are switches, a 23 * secondary action is to enumerate those (implemented in cxl_core). Finally the 24 * cxl_mem driver adds the device it is bound to as a CXL endpoint-port for use 25 * in higher level operations. 26 */ 27 28 static void enable_suspend(void *data) 29 { 30 cxl_mem_active_dec(); 31 } 32 33 static void remove_debugfs(void *dentry) 34 { 35 debugfs_remove_recursive(dentry); 36 } 37 38 static int cxl_mem_dpa_show(struct seq_file *file, void *data) 39 { 40 struct device *dev = file->private; 41 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); 42 43 cxl_dpa_debug(file, cxlmd->cxlds); 44 45 return 0; 46 } 47 48 static int cxl_debugfs_poison_inject(void *data, u64 dpa) 49 { 50 struct cxl_memdev *cxlmd = data; 51 int rc; 52 53 ACQUIRE(device_intr, devlock)(&cxlmd->dev); 54 if ((rc = ACQUIRE_ERR(device_intr, &devlock))) 55 return rc; 56 57 return cxl_inject_poison(cxlmd, dpa); 58 } 59 60 DEFINE_DEBUGFS_ATTRIBUTE(cxl_poison_inject_fops, NULL, 61 cxl_debugfs_poison_inject, "%llx\n"); 62 63 static int cxl_debugfs_poison_clear(void *data, u64 dpa) 64 { 65 struct cxl_memdev *cxlmd = data; 66 int rc; 67 68 ACQUIRE(device_intr, devlock)(&cxlmd->dev); 69 if ((rc = ACQUIRE_ERR(device_intr, &devlock))) 70 return rc; 71 72 return cxl_clear_poison(cxlmd, dpa); 73 } 74 75 DEFINE_DEBUGFS_ATTRIBUTE(cxl_poison_clear_fops, NULL, 76 cxl_debugfs_poison_clear, "%llx\n"); 77 78 static void cxl_memdev_poison_enable(struct cxl_memdev_state *mds, 79 struct cxl_memdev *cxlmd, 80 struct dentry *dentry) 81 { 82 /* 83 * Avoid poison debugfs for DEVMEM aka accelerators as they rely on 84 * cxl_memdev_state. 85 */ 86 if (!mds) 87 return; 88 89 if (test_bit(CXL_POISON_ENABLED_INJECT, mds->poison.enabled_cmds)) 90 debugfs_create_file("inject_poison", 0200, dentry, cxlmd, 91 &cxl_poison_inject_fops); 92 93 if (test_bit(CXL_POISON_ENABLED_CLEAR, mds->poison.enabled_cmds)) 94 debugfs_create_file("clear_poison", 0200, dentry, cxlmd, 95 &cxl_poison_clear_fops); 96 } 97 98 static int cxl_mem_probe(struct device *dev) 99 { 100 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); 101 struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); 102 struct cxl_dev_state *cxlds = cxlmd->cxlds; 103 struct device *endpoint_parent; 104 struct cxl_dport *dport; 105 struct dentry *dentry; 106 int rc; 107 108 if (!cxlds->media_ready) 109 return -EBUSY; 110 111 /* 112 * Someone is trying to reattach this device after it lost its port 113 * connection (an endpoint port previously registered by this memdev was 114 * disabled). This racy check is ok because if the port is still gone, 115 * no harm done, and if the port hierarchy comes back it will re-trigger 116 * this probe. Port rescan and memdev detach work share the same 117 * single-threaded workqueue. 118 */ 119 if (work_pending(&cxlmd->detach_work)) 120 return -EBUSY; 121 122 dentry = cxl_debugfs_create_dir(dev_name(dev)); 123 debugfs_create_devm_seqfile(dev, "dpamem", dentry, cxl_mem_dpa_show); 124 125 cxl_memdev_poison_enable(mds, cxlmd, dentry); 126 127 rc = devm_add_action_or_reset(dev, remove_debugfs, dentry); 128 if (rc) 129 return rc; 130 131 rc = devm_cxl_enumerate_ports(cxlmd); 132 if (rc) 133 return rc; 134 135 struct cxl_port *parent_port __free(put_cxl_port) = 136 cxl_mem_find_port(cxlmd, &dport); 137 if (!parent_port) { 138 dev_err(dev, "CXL port topology not found\n"); 139 return -ENXIO; 140 } 141 142 if (cxl_pmem_size(cxlds) && IS_ENABLED(CONFIG_CXL_PMEM)) { 143 rc = devm_cxl_add_nvdimm(dev, parent_port, cxlmd); 144 if (rc) { 145 if (rc == -ENODEV) 146 dev_info(dev, "PMEM disabled by platform\n"); 147 return rc; 148 } 149 } 150 151 if (dport->rch) 152 endpoint_parent = parent_port->uport_dev; 153 else 154 endpoint_parent = &parent_port->dev; 155 156 scoped_guard(device, endpoint_parent) { 157 if (!endpoint_parent->driver) { 158 dev_err(dev, "CXL port topology %s not enabled\n", 159 dev_name(endpoint_parent)); 160 return -ENXIO; 161 } 162 163 rc = devm_cxl_add_endpoint(endpoint_parent, cxlmd, dport); 164 if (rc) 165 return rc; 166 } 167 168 if (cxlmd->attach) { 169 rc = cxlmd->attach->probe(cxlmd); 170 if (rc) 171 return rc; 172 } 173 174 rc = devm_cxl_memdev_edac_register(cxlmd); 175 if (rc) 176 dev_dbg(dev, "CXL memdev EDAC registration failed rc=%d\n", rc); 177 178 /* 179 * The kernel may be operating out of CXL memory on this device, 180 * there is no spec defined way to determine whether this device 181 * preserves contents over suspend, and there is no simple way 182 * to arrange for the suspend image to avoid CXL memory which 183 * would setup a circular dependency between PCI resume and save 184 * state restoration. 185 * 186 * TODO: support suspend when all the regions this device is 187 * hosting are locked and covered by the system address map, 188 * i.e. platform firmware owns restoring the HDM configuration 189 * that it locked. 190 */ 191 cxl_mem_active_inc(); 192 return devm_add_action_or_reset(dev, enable_suspend, NULL); 193 } 194 195 /** 196 * devm_cxl_add_classdev - Add a CXL memory class-code device 197 * @cxlds: CXL device state to associate with the memdev 198 * 199 * Upon return the device will have had a chance to attach to the 200 * cxl_mem driver, but may fail to attach if the CXL topology is not ready 201 * (hardware CXL link down, or software platform CXL root not attached). 202 * 203 * The parent of the resulting device and the devm context for allocations is 204 * @cxlds->dev. 205 */ 206 struct cxl_memdev *devm_cxl_add_classdev(struct cxl_dev_state *cxlds) 207 { 208 return __devm_cxl_add_memdev(cxlds, NULL); 209 } 210 EXPORT_SYMBOL_NS_GPL(devm_cxl_add_classdev, "CXL"); 211 212 /** 213 * devm_cxl_probe_mem - Add a CXL memory device and probe its region 214 * @cxlds: CXL device state to associate with the memdev 215 * @hpa_range: CXL.mem physical address range result 216 * 217 * Upon return the device will have had a chance to attach to the 218 * cxl_mem driver, but may fail to attach if the CXL topology is not ready 219 * (hardware CXL link down, or software platform CXL root not attached). 220 * 221 * Failure to probe the memdev and/or setup a region for the memdev 222 * results in this function failing. 223 * 224 * The parent of the resulting device and the devm context for allocations is 225 * @cxlds->dev. 226 */ 227 struct cxl_memdev *devm_cxl_probe_mem(struct cxl_dev_state *cxlds, 228 struct range *hpa_range) 229 { 230 struct cxl_attach_region *attach = 231 devm_kmalloc(cxlds->dev, sizeof(*attach), GFP_KERNEL); 232 struct cxl_memdev *cxlmd; 233 234 if (!attach) 235 return ERR_PTR(-ENOMEM); 236 237 *attach = (struct cxl_attach_region) { 238 .attach = { 239 .probe = cxl_memdev_attach_region, 240 }, 241 .hpa_range = { 0, -1 }, 242 }; 243 244 cxlmd = __devm_cxl_add_memdev(cxlds, &attach->attach); 245 *hpa_range = attach->hpa_range; 246 return cxlmd; 247 } 248 EXPORT_SYMBOL_NS_GPL(devm_cxl_probe_mem, "CXL"); 249 250 static ssize_t trigger_poison_list_store(struct device *dev, 251 struct device_attribute *attr, 252 const char *buf, size_t len) 253 { 254 bool trigger; 255 int rc; 256 257 if (kstrtobool(buf, &trigger) || !trigger) 258 return -EINVAL; 259 260 rc = cxl_trigger_poison_list(to_cxl_memdev(dev)); 261 262 return rc ? rc : len; 263 } 264 static DEVICE_ATTR_WO(trigger_poison_list); 265 266 static bool cxl_poison_attr_visible(struct kobject *kobj, struct attribute *a) 267 { 268 struct device *dev = kobj_to_dev(kobj); 269 struct cxl_memdev *cxlmd = to_cxl_memdev(dev); 270 struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); 271 272 if (!mds || 273 !test_bit(CXL_POISON_ENABLED_LIST, mds->poison.enabled_cmds)) 274 return false; 275 276 return true; 277 } 278 279 static umode_t cxl_mem_visible(struct kobject *kobj, struct attribute *a, int n) 280 { 281 if (a == &dev_attr_trigger_poison_list.attr && 282 !cxl_poison_attr_visible(kobj, a)) 283 return 0; 284 285 return a->mode; 286 } 287 288 static struct attribute *cxl_mem_attrs[] = { 289 &dev_attr_trigger_poison_list.attr, 290 NULL 291 }; 292 293 static struct attribute_group cxl_mem_group = { 294 .attrs = cxl_mem_attrs, 295 .is_visible = cxl_mem_visible, 296 }; 297 298 __ATTRIBUTE_GROUPS(cxl_mem); 299 300 static struct cxl_driver cxl_mem_driver = { 301 .name = "cxl_mem", 302 .probe = cxl_mem_probe, 303 .id = CXL_DEVICE_MEMORY_EXPANDER, 304 .drv = { 305 .probe_type = PROBE_FORCE_SYNCHRONOUS, 306 .dev_groups = cxl_mem_groups, 307 }, 308 }; 309 310 module_cxl_driver(cxl_mem_driver); 311 312 MODULE_DESCRIPTION("CXL: Memory Expansion"); 313 MODULE_LICENSE("GPL v2"); 314 MODULE_IMPORT_NS("CXL"); 315 MODULE_ALIAS_CXL(CXL_DEVICE_MEMORY_EXPANDER); 316