xref: /linux/drivers/cxl/cxlmem.h (revision 9cc238c7a526dba9ee8c210fa2828886fc65db66)
15161a55cSBen Widawsky /* SPDX-License-Identifier: GPL-2.0-only */
25161a55cSBen Widawsky /* Copyright(c) 2020-2021 Intel Corporation. */
35161a55cSBen Widawsky #ifndef __CXL_MEM_H__
45161a55cSBen Widawsky #define __CXL_MEM_H__
55161a55cSBen Widawsky #include <linux/cdev.h>
65161a55cSBen Widawsky #include "cxl.h"
75161a55cSBen Widawsky 
85161a55cSBen Widawsky /* CXL 2.0 8.2.8.5.1.1 Memory Device Status Register */
95161a55cSBen Widawsky #define CXLMDEV_STATUS_OFFSET 0x0
105161a55cSBen Widawsky #define   CXLMDEV_DEV_FATAL BIT(0)
115161a55cSBen Widawsky #define   CXLMDEV_FW_HALT BIT(1)
125161a55cSBen Widawsky #define   CXLMDEV_STATUS_MEDIA_STATUS_MASK GENMASK(3, 2)
135161a55cSBen Widawsky #define     CXLMDEV_MS_NOT_READY 0
145161a55cSBen Widawsky #define     CXLMDEV_MS_READY 1
155161a55cSBen Widawsky #define     CXLMDEV_MS_ERROR 2
165161a55cSBen Widawsky #define     CXLMDEV_MS_DISABLED 3
175161a55cSBen Widawsky #define CXLMDEV_READY(status)                                                  \
185161a55cSBen Widawsky 	(FIELD_GET(CXLMDEV_STATUS_MEDIA_STATUS_MASK, status) ==                \
195161a55cSBen Widawsky 	 CXLMDEV_MS_READY)
205161a55cSBen Widawsky #define   CXLMDEV_MBOX_IF_READY BIT(4)
215161a55cSBen Widawsky #define   CXLMDEV_RESET_NEEDED_MASK GENMASK(7, 5)
225161a55cSBen Widawsky #define     CXLMDEV_RESET_NEEDED_NOT 0
235161a55cSBen Widawsky #define     CXLMDEV_RESET_NEEDED_COLD 1
245161a55cSBen Widawsky #define     CXLMDEV_RESET_NEEDED_WARM 2
255161a55cSBen Widawsky #define     CXLMDEV_RESET_NEEDED_HOT 3
265161a55cSBen Widawsky #define     CXLMDEV_RESET_NEEDED_CXL 4
275161a55cSBen Widawsky #define CXLMDEV_RESET_NEEDED(status)                                           \
285161a55cSBen Widawsky 	(FIELD_GET(CXLMDEV_RESET_NEEDED_MASK, status) !=                       \
295161a55cSBen Widawsky 	 CXLMDEV_RESET_NEEDED_NOT)
305161a55cSBen Widawsky 
315161a55cSBen Widawsky /*
325161a55cSBen Widawsky  * An entire PCI topology full of devices should be enough for any
335161a55cSBen Widawsky  * config
345161a55cSBen Widawsky  */
355161a55cSBen Widawsky #define CXL_MEM_MAX_DEVS 65536
365161a55cSBen Widawsky 
375161a55cSBen Widawsky /**
38*9cc238c7SDan Williams  * struct cdevm_file_operations - devm coordinated cdev file operations
39*9cc238c7SDan Williams  * @fops: file operations that are synchronized against @shutdown
40*9cc238c7SDan Williams  * @shutdown: disconnect driver data
41*9cc238c7SDan Williams  *
42*9cc238c7SDan Williams  * @shutdown is invoked in the devres release path to disconnect any
43*9cc238c7SDan Williams  * driver instance data from @dev. It assumes synchronization with any
44*9cc238c7SDan Williams  * fops operation that requires driver data. After @shutdown an
45*9cc238c7SDan Williams  * operation may only reference @device data.
46*9cc238c7SDan Williams  */
47*9cc238c7SDan Williams struct cdevm_file_operations {
48*9cc238c7SDan Williams 	struct file_operations fops;
49*9cc238c7SDan Williams 	void (*shutdown)(struct device *dev);
50*9cc238c7SDan Williams };
51*9cc238c7SDan Williams 
52*9cc238c7SDan Williams /**
535161a55cSBen Widawsky  * struct cxl_memdev - CXL bus object representing a Type-3 Memory Device
545161a55cSBen Widawsky  * @dev: driver core device object
555161a55cSBen Widawsky  * @cdev: char dev core object for ioctl operations
565161a55cSBen Widawsky  * @cxlm: pointer to the parent device driver data
575161a55cSBen Widawsky  * @id: id number of this memdev instance.
585161a55cSBen Widawsky  */
595161a55cSBen Widawsky struct cxl_memdev {
605161a55cSBen Widawsky 	struct device dev;
615161a55cSBen Widawsky 	struct cdev cdev;
625161a55cSBen Widawsky 	struct cxl_mem *cxlm;
635161a55cSBen Widawsky 	int id;
645161a55cSBen Widawsky };
655161a55cSBen Widawsky 
665161a55cSBen Widawsky /**
675161a55cSBen Widawsky  * struct cxl_mem - A CXL memory device
685161a55cSBen Widawsky  * @pdev: The PCI device associated with this CXL device.
695161a55cSBen Widawsky  * @cxlmd: Logical memory device chardev / interface
705161a55cSBen Widawsky  * @regs: Parsed register blocks
715161a55cSBen Widawsky  * @payload_size: Size of space for payload
725161a55cSBen Widawsky  *                (CXL 2.0 8.2.8.4.3 Mailbox Capabilities Register)
735161a55cSBen Widawsky  * @lsa_size: Size of Label Storage Area
745161a55cSBen Widawsky  *                (CXL 2.0 8.2.9.5.1.1 Identify Memory Device)
755161a55cSBen Widawsky  * @mbox_mutex: Mutex to synchronize mailbox access.
765161a55cSBen Widawsky  * @firmware_version: Firmware version for the memory device.
775161a55cSBen Widawsky  * @enabled_cmds: Hardware commands found enabled in CEL.
785161a55cSBen Widawsky  * @pmem_range: Persistent memory capacity information.
795161a55cSBen Widawsky  * @ram_range: Volatile memory capacity information.
805161a55cSBen Widawsky  */
815161a55cSBen Widawsky struct cxl_mem {
825161a55cSBen Widawsky 	struct pci_dev *pdev;
835161a55cSBen Widawsky 	struct cxl_memdev *cxlmd;
845161a55cSBen Widawsky 
855161a55cSBen Widawsky 	struct cxl_regs regs;
865161a55cSBen Widawsky 
875161a55cSBen Widawsky 	size_t payload_size;
885161a55cSBen Widawsky 	size_t lsa_size;
895161a55cSBen Widawsky 	struct mutex mbox_mutex; /* Protects device mailbox and firmware */
905161a55cSBen Widawsky 	char firmware_version[0x10];
915161a55cSBen Widawsky 	unsigned long *enabled_cmds;
925161a55cSBen Widawsky 
935161a55cSBen Widawsky 	struct range pmem_range;
945161a55cSBen Widawsky 	struct range ram_range;
955161a55cSBen Widawsky };
965161a55cSBen Widawsky #endif /* __CXL_MEM_H__ */
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