14a20bc3eSDan Williams // SPDX-License-Identifier: GPL-2.0 24a20bc3eSDan Williams /* Copyright(c) 2022 Intel Corporation. All rights reserved. */ 34a20bc3eSDan Williams #undef TRACE_SYSTEM 44a20bc3eSDan Williams #define TRACE_SYSTEM cxl 54a20bc3eSDan Williams 64a20bc3eSDan Williams #if !defined(_CXL_EVENTS_H) || defined(TRACE_HEADER_MULTI_READ) 74a20bc3eSDan Williams #define _CXL_EVENTS_H 84a20bc3eSDan Williams 94a20bc3eSDan Williams #include <linux/tracepoint.h> 10*ddf49d57SAlison Schofield #include <linux/pci.h> 116ebe28f9SIra Weiny #include <asm-generic/unaligned.h> 126ebe28f9SIra Weiny 136ebe28f9SIra Weiny #include <cxl.h> 146ebe28f9SIra Weiny #include <cxlmem.h> 15*ddf49d57SAlison Schofield #include "core.h" 164a20bc3eSDan Williams 174a20bc3eSDan Williams #define CXL_RAS_UC_CACHE_DATA_PARITY BIT(0) 184a20bc3eSDan Williams #define CXL_RAS_UC_CACHE_ADDR_PARITY BIT(1) 194a20bc3eSDan Williams #define CXL_RAS_UC_CACHE_BE_PARITY BIT(2) 204a20bc3eSDan Williams #define CXL_RAS_UC_CACHE_DATA_ECC BIT(3) 214a20bc3eSDan Williams #define CXL_RAS_UC_MEM_DATA_PARITY BIT(4) 224a20bc3eSDan Williams #define CXL_RAS_UC_MEM_ADDR_PARITY BIT(5) 234a20bc3eSDan Williams #define CXL_RAS_UC_MEM_BE_PARITY BIT(6) 244a20bc3eSDan Williams #define CXL_RAS_UC_MEM_DATA_ECC BIT(7) 254a20bc3eSDan Williams #define CXL_RAS_UC_REINIT_THRESH BIT(8) 264a20bc3eSDan Williams #define CXL_RAS_UC_RSVD_ENCODE BIT(9) 274a20bc3eSDan Williams #define CXL_RAS_UC_POISON BIT(10) 284a20bc3eSDan Williams #define CXL_RAS_UC_RECV_OVERFLOW BIT(11) 294a20bc3eSDan Williams #define CXL_RAS_UC_INTERNAL_ERR BIT(14) 304a20bc3eSDan Williams #define CXL_RAS_UC_IDE_TX_ERR BIT(15) 314a20bc3eSDan Williams #define CXL_RAS_UC_IDE_RX_ERR BIT(16) 324a20bc3eSDan Williams 334a20bc3eSDan Williams #define show_uc_errs(status) __print_flags(status, " | ", \ 344a20bc3eSDan Williams { CXL_RAS_UC_CACHE_DATA_PARITY, "Cache Data Parity Error" }, \ 354a20bc3eSDan Williams { CXL_RAS_UC_CACHE_ADDR_PARITY, "Cache Address Parity Error" }, \ 364a20bc3eSDan Williams { CXL_RAS_UC_CACHE_BE_PARITY, "Cache Byte Enable Parity Error" }, \ 374a20bc3eSDan Williams { CXL_RAS_UC_CACHE_DATA_ECC, "Cache Data ECC Error" }, \ 384a20bc3eSDan Williams { CXL_RAS_UC_MEM_DATA_PARITY, "Memory Data Parity Error" }, \ 394a20bc3eSDan Williams { CXL_RAS_UC_MEM_ADDR_PARITY, "Memory Address Parity Error" }, \ 404a20bc3eSDan Williams { CXL_RAS_UC_MEM_BE_PARITY, "Memory Byte Enable Parity Error" }, \ 414a20bc3eSDan Williams { CXL_RAS_UC_MEM_DATA_ECC, "Memory Data ECC Error" }, \ 424a20bc3eSDan Williams { CXL_RAS_UC_REINIT_THRESH, "REINIT Threshold Hit" }, \ 434a20bc3eSDan Williams { CXL_RAS_UC_RSVD_ENCODE, "Received Unrecognized Encoding" }, \ 444a20bc3eSDan Williams { CXL_RAS_UC_POISON, "Received Poison From Peer" }, \ 454a20bc3eSDan Williams { CXL_RAS_UC_RECV_OVERFLOW, "Receiver Overflow" }, \ 464a20bc3eSDan Williams { CXL_RAS_UC_INTERNAL_ERR, "Component Specific Error" }, \ 474a20bc3eSDan Williams { CXL_RAS_UC_IDE_TX_ERR, "IDE Tx Error" }, \ 484a20bc3eSDan Williams { CXL_RAS_UC_IDE_RX_ERR, "IDE Rx Error" } \ 494a20bc3eSDan Williams ) 504a20bc3eSDan Williams 514a20bc3eSDan Williams TRACE_EVENT(cxl_aer_uncorrectable_error, 520c8393dcSIra Weiny TP_PROTO(const struct cxl_memdev *cxlmd, u32 status, u32 fe, u32 *hl), 530c8393dcSIra Weiny TP_ARGS(cxlmd, status, fe, hl), 544a20bc3eSDan Williams TP_STRUCT__entry( 550c8393dcSIra Weiny __string(memdev, dev_name(&cxlmd->dev)) 56cd057017SIra Weiny __string(host, dev_name(cxlmd->dev.parent)) 57279676c9SIra Weiny __field(u64, serial) 584a20bc3eSDan Williams __field(u32, status) 594a20bc3eSDan Williams __field(u32, first_error) 604a20bc3eSDan Williams __array(u32, header_log, CXL_HEADERLOG_SIZE_U32) 614a20bc3eSDan Williams ), 624a20bc3eSDan Williams TP_fast_assign( 630c8393dcSIra Weiny __assign_str(memdev, dev_name(&cxlmd->dev)); 64cd057017SIra Weiny __assign_str(host, dev_name(cxlmd->dev.parent)); 65279676c9SIra Weiny __entry->serial = cxlmd->cxlds->serial; 664a20bc3eSDan Williams __entry->status = status; 674a20bc3eSDan Williams __entry->first_error = fe; 684a20bc3eSDan Williams /* 694a20bc3eSDan Williams * Embed the 512B headerlog data for user app retrieval and 704a20bc3eSDan Williams * parsing, but no need to print this in the trace buffer. 714a20bc3eSDan Williams */ 724a20bc3eSDan Williams memcpy(__entry->header_log, hl, CXL_HEADERLOG_SIZE); 734a20bc3eSDan Williams ), 74279676c9SIra Weiny TP_printk("memdev=%s host=%s serial=%lld: status: '%s' first_error: '%s'", 75279676c9SIra Weiny __get_str(memdev), __get_str(host), __entry->serial, 764a20bc3eSDan Williams show_uc_errs(__entry->status), 774a20bc3eSDan Williams show_uc_errs(__entry->first_error) 784a20bc3eSDan Williams ) 794a20bc3eSDan Williams ); 804a20bc3eSDan Williams 814a20bc3eSDan Williams #define CXL_RAS_CE_CACHE_DATA_ECC BIT(0) 824a20bc3eSDan Williams #define CXL_RAS_CE_MEM_DATA_ECC BIT(1) 834a20bc3eSDan Williams #define CXL_RAS_CE_CRC_THRESH BIT(2) 844a20bc3eSDan Williams #define CLX_RAS_CE_RETRY_THRESH BIT(3) 854a20bc3eSDan Williams #define CXL_RAS_CE_CACHE_POISON BIT(4) 864a20bc3eSDan Williams #define CXL_RAS_CE_MEM_POISON BIT(5) 874a20bc3eSDan Williams #define CXL_RAS_CE_PHYS_LAYER_ERR BIT(6) 884a20bc3eSDan Williams 894a20bc3eSDan Williams #define show_ce_errs(status) __print_flags(status, " | ", \ 904a20bc3eSDan Williams { CXL_RAS_CE_CACHE_DATA_ECC, "Cache Data ECC Error" }, \ 914a20bc3eSDan Williams { CXL_RAS_CE_MEM_DATA_ECC, "Memory Data ECC Error" }, \ 924a20bc3eSDan Williams { CXL_RAS_CE_CRC_THRESH, "CRC Threshold Hit" }, \ 934a20bc3eSDan Williams { CLX_RAS_CE_RETRY_THRESH, "Retry Threshold" }, \ 944a20bc3eSDan Williams { CXL_RAS_CE_CACHE_POISON, "Received Cache Poison From Peer" }, \ 954a20bc3eSDan Williams { CXL_RAS_CE_MEM_POISON, "Received Memory Poison From Peer" }, \ 964a20bc3eSDan Williams { CXL_RAS_CE_PHYS_LAYER_ERR, "Received Error From Physical Layer" } \ 974a20bc3eSDan Williams ) 984a20bc3eSDan Williams 994a20bc3eSDan Williams TRACE_EVENT(cxl_aer_correctable_error, 1000c8393dcSIra Weiny TP_PROTO(const struct cxl_memdev *cxlmd, u32 status), 1010c8393dcSIra Weiny TP_ARGS(cxlmd, status), 1024a20bc3eSDan Williams TP_STRUCT__entry( 1030c8393dcSIra Weiny __string(memdev, dev_name(&cxlmd->dev)) 104cd057017SIra Weiny __string(host, dev_name(cxlmd->dev.parent)) 105279676c9SIra Weiny __field(u64, serial) 1064a20bc3eSDan Williams __field(u32, status) 1074a20bc3eSDan Williams ), 1084a20bc3eSDan Williams TP_fast_assign( 1090c8393dcSIra Weiny __assign_str(memdev, dev_name(&cxlmd->dev)); 110cd057017SIra Weiny __assign_str(host, dev_name(cxlmd->dev.parent)); 111279676c9SIra Weiny __entry->serial = cxlmd->cxlds->serial; 1124a20bc3eSDan Williams __entry->status = status; 1134a20bc3eSDan Williams ), 114279676c9SIra Weiny TP_printk("memdev=%s host=%s serial=%lld: status: '%s'", 115279676c9SIra Weiny __get_str(memdev), __get_str(host), __entry->serial, 116cd057017SIra Weiny show_ce_errs(__entry->status) 1174a20bc3eSDan Williams ) 1184a20bc3eSDan Williams ); 1194a20bc3eSDan Williams 1206ebe28f9SIra Weiny #define cxl_event_log_type_str(type) \ 1216ebe28f9SIra Weiny __print_symbolic(type, \ 1226ebe28f9SIra Weiny { CXL_EVENT_TYPE_INFO, "Informational" }, \ 1236ebe28f9SIra Weiny { CXL_EVENT_TYPE_WARN, "Warning" }, \ 1246ebe28f9SIra Weiny { CXL_EVENT_TYPE_FAIL, "Failure" }, \ 1256ebe28f9SIra Weiny { CXL_EVENT_TYPE_FATAL, "Fatal" }) 1266ebe28f9SIra Weiny 1276ebe28f9SIra Weiny TRACE_EVENT(cxl_overflow, 1286ebe28f9SIra Weiny 1290c8393dcSIra Weiny TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log, 1306ebe28f9SIra Weiny struct cxl_get_event_payload *payload), 1316ebe28f9SIra Weiny 1320c8393dcSIra Weiny TP_ARGS(cxlmd, log, payload), 1336ebe28f9SIra Weiny 1346ebe28f9SIra Weiny TP_STRUCT__entry( 1350c8393dcSIra Weiny __string(memdev, dev_name(&cxlmd->dev)) 136cd057017SIra Weiny __string(host, dev_name(cxlmd->dev.parent)) 1376ebe28f9SIra Weiny __field(int, log) 138279676c9SIra Weiny __field(u64, serial) 1396ebe28f9SIra Weiny __field(u64, first_ts) 1406ebe28f9SIra Weiny __field(u64, last_ts) 1416ebe28f9SIra Weiny __field(u16, count) 1426ebe28f9SIra Weiny ), 1436ebe28f9SIra Weiny 1446ebe28f9SIra Weiny TP_fast_assign( 1450c8393dcSIra Weiny __assign_str(memdev, dev_name(&cxlmd->dev)); 146cd057017SIra Weiny __assign_str(host, dev_name(cxlmd->dev.parent)); 147279676c9SIra Weiny __entry->serial = cxlmd->cxlds->serial; 1486ebe28f9SIra Weiny __entry->log = log; 1496ebe28f9SIra Weiny __entry->count = le16_to_cpu(payload->overflow_err_count); 1506ebe28f9SIra Weiny __entry->first_ts = le64_to_cpu(payload->first_overflow_timestamp); 1516ebe28f9SIra Weiny __entry->last_ts = le64_to_cpu(payload->last_overflow_timestamp); 1526ebe28f9SIra Weiny ), 1536ebe28f9SIra Weiny 154279676c9SIra Weiny TP_printk("memdev=%s host=%s serial=%lld: log=%s : %u records from %llu to %llu", 155279676c9SIra Weiny __get_str(memdev), __get_str(host), __entry->serial, 156cd057017SIra Weiny cxl_event_log_type_str(__entry->log), __entry->count, 157cd057017SIra Weiny __entry->first_ts, __entry->last_ts) 1586ebe28f9SIra Weiny 1596ebe28f9SIra Weiny ); 1606ebe28f9SIra Weiny 1616ebe28f9SIra Weiny /* 1626ebe28f9SIra Weiny * Common Event Record Format 1636ebe28f9SIra Weiny * CXL 3.0 section 8.2.9.2.1; Table 8-42 1646ebe28f9SIra Weiny */ 1656ebe28f9SIra Weiny #define CXL_EVENT_RECORD_FLAG_PERMANENT BIT(2) 1666ebe28f9SIra Weiny #define CXL_EVENT_RECORD_FLAG_MAINT_NEEDED BIT(3) 1676ebe28f9SIra Weiny #define CXL_EVENT_RECORD_FLAG_PERF_DEGRADED BIT(4) 1686ebe28f9SIra Weiny #define CXL_EVENT_RECORD_FLAG_HW_REPLACE BIT(5) 1696ebe28f9SIra Weiny #define show_hdr_flags(flags) __print_flags(flags, " | ", \ 1706ebe28f9SIra Weiny { CXL_EVENT_RECORD_FLAG_PERMANENT, "PERMANENT_CONDITION" }, \ 1716ebe28f9SIra Weiny { CXL_EVENT_RECORD_FLAG_MAINT_NEEDED, "MAINTENANCE_NEEDED" }, \ 1726ebe28f9SIra Weiny { CXL_EVENT_RECORD_FLAG_PERF_DEGRADED, "PERFORMANCE_DEGRADED" }, \ 1736ebe28f9SIra Weiny { CXL_EVENT_RECORD_FLAG_HW_REPLACE, "HARDWARE_REPLACEMENT_NEEDED" } \ 1746ebe28f9SIra Weiny ) 1756ebe28f9SIra Weiny 1766ebe28f9SIra Weiny /* 1776ebe28f9SIra Weiny * Define macros for the common header of each CXL event. 1786ebe28f9SIra Weiny * 1796ebe28f9SIra Weiny * Tracepoints using these macros must do 3 things: 1806ebe28f9SIra Weiny * 1816ebe28f9SIra Weiny * 1) Add CXL_EVT_TP_entry to TP_STRUCT__entry 1826ebe28f9SIra Weiny * 2) Use CXL_EVT_TP_fast_assign within TP_fast_assign; 1836ebe28f9SIra Weiny * pass the dev, log, and CXL event header 1846ebe28f9SIra Weiny * 3) Use CXL_EVT_TP_printk() instead of TP_printk() 1856ebe28f9SIra Weiny * 1866ebe28f9SIra Weiny * See the generic_event tracepoint as an example. 1876ebe28f9SIra Weiny */ 1886ebe28f9SIra Weiny #define CXL_EVT_TP_entry \ 1890c8393dcSIra Weiny __string(memdev, dev_name(&cxlmd->dev)) \ 190cd057017SIra Weiny __string(host, dev_name(cxlmd->dev.parent)) \ 1916ebe28f9SIra Weiny __field(int, log) \ 1926ebe28f9SIra Weiny __field_struct(uuid_t, hdr_uuid) \ 193279676c9SIra Weiny __field(u64, serial) \ 1946ebe28f9SIra Weiny __field(u32, hdr_flags) \ 1956ebe28f9SIra Weiny __field(u16, hdr_handle) \ 1966ebe28f9SIra Weiny __field(u16, hdr_related_handle) \ 1976ebe28f9SIra Weiny __field(u64, hdr_timestamp) \ 1986ebe28f9SIra Weiny __field(u8, hdr_length) \ 1996ebe28f9SIra Weiny __field(u8, hdr_maint_op_class) 2006ebe28f9SIra Weiny 2010c8393dcSIra Weiny #define CXL_EVT_TP_fast_assign(cxlmd, l, hdr) \ 2020c8393dcSIra Weiny __assign_str(memdev, dev_name(&(cxlmd)->dev)); \ 203cd057017SIra Weiny __assign_str(host, dev_name((cxlmd)->dev.parent)); \ 2046ebe28f9SIra Weiny __entry->log = (l); \ 205279676c9SIra Weiny __entry->serial = (cxlmd)->cxlds->serial; \ 2066ebe28f9SIra Weiny memcpy(&__entry->hdr_uuid, &(hdr).id, sizeof(uuid_t)); \ 2076ebe28f9SIra Weiny __entry->hdr_length = (hdr).length; \ 2086ebe28f9SIra Weiny __entry->hdr_flags = get_unaligned_le24((hdr).flags); \ 2096ebe28f9SIra Weiny __entry->hdr_handle = le16_to_cpu((hdr).handle); \ 2106ebe28f9SIra Weiny __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle); \ 2116ebe28f9SIra Weiny __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp); \ 2126ebe28f9SIra Weiny __entry->hdr_maint_op_class = (hdr).maint_op_class 2136ebe28f9SIra Weiny 2146ebe28f9SIra Weiny #define CXL_EVT_TP_printk(fmt, ...) \ 215279676c9SIra Weiny TP_printk("memdev=%s host=%s serial=%lld log=%s : time=%llu uuid=%pUb " \ 216279676c9SIra Weiny "len=%d flags='%s' handle=%x related_handle=%x " \ 217279676c9SIra Weiny "maint_op_class=%u : " fmt, \ 218279676c9SIra Weiny __get_str(memdev), __get_str(host), __entry->serial, \ 219cd057017SIra Weiny cxl_event_log_type_str(__entry->log), \ 2206ebe28f9SIra Weiny __entry->hdr_timestamp, &__entry->hdr_uuid, __entry->hdr_length,\ 2216ebe28f9SIra Weiny show_hdr_flags(__entry->hdr_flags), __entry->hdr_handle, \ 2226ebe28f9SIra Weiny __entry->hdr_related_handle, __entry->hdr_maint_op_class, \ 2236ebe28f9SIra Weiny ##__VA_ARGS__) 2246ebe28f9SIra Weiny 2256ebe28f9SIra Weiny TRACE_EVENT(cxl_generic_event, 2266ebe28f9SIra Weiny 2270c8393dcSIra Weiny TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log, 2286ebe28f9SIra Weiny struct cxl_event_record_raw *rec), 2296ebe28f9SIra Weiny 2300c8393dcSIra Weiny TP_ARGS(cxlmd, log, rec), 2316ebe28f9SIra Weiny 2326ebe28f9SIra Weiny TP_STRUCT__entry( 2336ebe28f9SIra Weiny CXL_EVT_TP_entry 2346ebe28f9SIra Weiny __array(u8, data, CXL_EVENT_RECORD_DATA_LENGTH) 2356ebe28f9SIra Weiny ), 2366ebe28f9SIra Weiny 2376ebe28f9SIra Weiny TP_fast_assign( 2380c8393dcSIra Weiny CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr); 2396ebe28f9SIra Weiny memcpy(__entry->data, &rec->data, CXL_EVENT_RECORD_DATA_LENGTH); 2406ebe28f9SIra Weiny ), 2416ebe28f9SIra Weiny 2426ebe28f9SIra Weiny CXL_EVT_TP_printk("%s", 2436ebe28f9SIra Weiny __print_hex(__entry->data, CXL_EVENT_RECORD_DATA_LENGTH)) 2446ebe28f9SIra Weiny ); 2456ebe28f9SIra Weiny 246d54a531aSIra Weiny /* 247d54a531aSIra Weiny * Physical Address field masks 248d54a531aSIra Weiny * 249d54a531aSIra Weiny * General Media Event Record 250d54a531aSIra Weiny * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43 251d54a531aSIra Weiny * 252d54a531aSIra Weiny * DRAM Event Record 253d54a531aSIra Weiny * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44 254d54a531aSIra Weiny */ 255d54a531aSIra Weiny #define CXL_DPA_FLAGS_MASK 0x3F 256d54a531aSIra Weiny #define CXL_DPA_MASK (~CXL_DPA_FLAGS_MASK) 257d54a531aSIra Weiny 258d54a531aSIra Weiny #define CXL_DPA_VOLATILE BIT(0) 259d54a531aSIra Weiny #define CXL_DPA_NOT_REPAIRABLE BIT(1) 260d54a531aSIra Weiny #define show_dpa_flags(flags) __print_flags(flags, "|", \ 261d54a531aSIra Weiny { CXL_DPA_VOLATILE, "VOLATILE" }, \ 262d54a531aSIra Weiny { CXL_DPA_NOT_REPAIRABLE, "NOT_REPAIRABLE" } \ 263d54a531aSIra Weiny ) 264d54a531aSIra Weiny 265d54a531aSIra Weiny /* 266d54a531aSIra Weiny * General Media Event Record - GMER 267d54a531aSIra Weiny * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43 268d54a531aSIra Weiny */ 269d54a531aSIra Weiny #define CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT BIT(0) 270d54a531aSIra Weiny #define CXL_GMER_EVT_DESC_THRESHOLD_EVENT BIT(1) 271d54a531aSIra Weiny #define CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW BIT(2) 272d54a531aSIra Weiny #define show_event_desc_flags(flags) __print_flags(flags, "|", \ 273d54a531aSIra Weiny { CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT, "UNCORRECTABLE_EVENT" }, \ 274d54a531aSIra Weiny { CXL_GMER_EVT_DESC_THRESHOLD_EVENT, "THRESHOLD_EVENT" }, \ 275d54a531aSIra Weiny { CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW, "POISON_LIST_OVERFLOW" } \ 276d54a531aSIra Weiny ) 277d54a531aSIra Weiny 278d54a531aSIra Weiny #define CXL_GMER_MEM_EVT_TYPE_ECC_ERROR 0x00 279d54a531aSIra Weiny #define CXL_GMER_MEM_EVT_TYPE_INV_ADDR 0x01 280d54a531aSIra Weiny #define CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR 0x02 281d54a531aSIra Weiny #define show_mem_event_type(type) __print_symbolic(type, \ 282d54a531aSIra Weiny { CXL_GMER_MEM_EVT_TYPE_ECC_ERROR, "ECC Error" }, \ 283d54a531aSIra Weiny { CXL_GMER_MEM_EVT_TYPE_INV_ADDR, "Invalid Address" }, \ 284d54a531aSIra Weiny { CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR, "Data Path Error" } \ 285d54a531aSIra Weiny ) 286d54a531aSIra Weiny 287d54a531aSIra Weiny #define CXL_GMER_TRANS_UNKNOWN 0x00 288d54a531aSIra Weiny #define CXL_GMER_TRANS_HOST_READ 0x01 289d54a531aSIra Weiny #define CXL_GMER_TRANS_HOST_WRITE 0x02 290d54a531aSIra Weiny #define CXL_GMER_TRANS_HOST_SCAN_MEDIA 0x03 291d54a531aSIra Weiny #define CXL_GMER_TRANS_HOST_INJECT_POISON 0x04 292d54a531aSIra Weiny #define CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB 0x05 293d54a531aSIra Weiny #define CXL_GMER_TRANS_INTERNAL_MEDIA_MANAGEMENT 0x06 294d54a531aSIra Weiny #define show_trans_type(type) __print_symbolic(type, \ 295d54a531aSIra Weiny { CXL_GMER_TRANS_UNKNOWN, "Unknown" }, \ 296d54a531aSIra Weiny { CXL_GMER_TRANS_HOST_READ, "Host Read" }, \ 297d54a531aSIra Weiny { CXL_GMER_TRANS_HOST_WRITE, "Host Write" }, \ 298d54a531aSIra Weiny { CXL_GMER_TRANS_HOST_SCAN_MEDIA, "Host Scan Media" }, \ 299d54a531aSIra Weiny { CXL_GMER_TRANS_HOST_INJECT_POISON, "Host Inject Poison" }, \ 300d54a531aSIra Weiny { CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB, "Internal Media Scrub" }, \ 301d54a531aSIra Weiny { CXL_GMER_TRANS_INTERNAL_MEDIA_MANAGEMENT, "Internal Media Management" } \ 302d54a531aSIra Weiny ) 303d54a531aSIra Weiny 304d54a531aSIra Weiny #define CXL_GMER_VALID_CHANNEL BIT(0) 305d54a531aSIra Weiny #define CXL_GMER_VALID_RANK BIT(1) 306d54a531aSIra Weiny #define CXL_GMER_VALID_DEVICE BIT(2) 307d54a531aSIra Weiny #define CXL_GMER_VALID_COMPONENT BIT(3) 308d54a531aSIra Weiny #define show_valid_flags(flags) __print_flags(flags, "|", \ 309d54a531aSIra Weiny { CXL_GMER_VALID_CHANNEL, "CHANNEL" }, \ 310d54a531aSIra Weiny { CXL_GMER_VALID_RANK, "RANK" }, \ 311d54a531aSIra Weiny { CXL_GMER_VALID_DEVICE, "DEVICE" }, \ 312d54a531aSIra Weiny { CXL_GMER_VALID_COMPONENT, "COMPONENT" } \ 313d54a531aSIra Weiny ) 314d54a531aSIra Weiny 315d54a531aSIra Weiny TRACE_EVENT(cxl_general_media, 316d54a531aSIra Weiny 3170c8393dcSIra Weiny TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log, 318d54a531aSIra Weiny struct cxl_event_gen_media *rec), 319d54a531aSIra Weiny 3200c8393dcSIra Weiny TP_ARGS(cxlmd, log, rec), 321d54a531aSIra Weiny 322d54a531aSIra Weiny TP_STRUCT__entry( 323d54a531aSIra Weiny CXL_EVT_TP_entry 324d54a531aSIra Weiny /* General Media */ 325d54a531aSIra Weiny __field(u64, dpa) 326d54a531aSIra Weiny __field(u8, descriptor) 327d54a531aSIra Weiny __field(u8, type) 328d54a531aSIra Weiny __field(u8, transaction_type) 329d54a531aSIra Weiny __field(u8, channel) 330d54a531aSIra Weiny __field(u32, device) 331d54a531aSIra Weiny __array(u8, comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE) 332d54a531aSIra Weiny __field(u16, validity_flags) 333d54a531aSIra Weiny /* Following are out of order to pack trace record */ 334d54a531aSIra Weiny __field(u8, rank) 335d54a531aSIra Weiny __field(u8, dpa_flags) 336d54a531aSIra Weiny ), 337d54a531aSIra Weiny 338d54a531aSIra Weiny TP_fast_assign( 3390c8393dcSIra Weiny CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr); 340d54a531aSIra Weiny 341d54a531aSIra Weiny /* General Media */ 342d54a531aSIra Weiny __entry->dpa = le64_to_cpu(rec->phys_addr); 343d54a531aSIra Weiny __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK; 344d54a531aSIra Weiny /* Mask after flags have been parsed */ 345d54a531aSIra Weiny __entry->dpa &= CXL_DPA_MASK; 346d54a531aSIra Weiny __entry->descriptor = rec->descriptor; 347d54a531aSIra Weiny __entry->type = rec->type; 348d54a531aSIra Weiny __entry->transaction_type = rec->transaction_type; 349d54a531aSIra Weiny __entry->channel = rec->channel; 350d54a531aSIra Weiny __entry->rank = rec->rank; 351d54a531aSIra Weiny __entry->device = get_unaligned_le24(rec->device); 352d54a531aSIra Weiny memcpy(__entry->comp_id, &rec->component_id, 353d54a531aSIra Weiny CXL_EVENT_GEN_MED_COMP_ID_SIZE); 354d54a531aSIra Weiny __entry->validity_flags = get_unaligned_le16(&rec->validity_flags); 355d54a531aSIra Weiny ), 356d54a531aSIra Weiny 357d54a531aSIra Weiny CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' " \ 358d54a531aSIra Weiny "descriptor='%s' type='%s' transaction_type='%s' channel=%u rank=%u " \ 359d54a531aSIra Weiny "device=%x comp_id=%s validity_flags='%s'", 360d54a531aSIra Weiny __entry->dpa, show_dpa_flags(__entry->dpa_flags), 361d54a531aSIra Weiny show_event_desc_flags(__entry->descriptor), 362d54a531aSIra Weiny show_mem_event_type(__entry->type), 363d54a531aSIra Weiny show_trans_type(__entry->transaction_type), 364d54a531aSIra Weiny __entry->channel, __entry->rank, __entry->device, 365d54a531aSIra Weiny __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE), 366d54a531aSIra Weiny show_valid_flags(__entry->validity_flags) 367d54a531aSIra Weiny ) 368d54a531aSIra Weiny ); 369d54a531aSIra Weiny 3702d6c1e6dSIra Weiny /* 3712d6c1e6dSIra Weiny * DRAM Event Record - DER 3722d6c1e6dSIra Weiny * 3732d6c1e6dSIra Weiny * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44 3742d6c1e6dSIra Weiny */ 3752d6c1e6dSIra Weiny /* 3762d6c1e6dSIra Weiny * DRAM Event Record defines many fields the same as the General Media Event 3772d6c1e6dSIra Weiny * Record. Reuse those definitions as appropriate. 3782d6c1e6dSIra Weiny */ 3792d6c1e6dSIra Weiny #define CXL_DER_VALID_CHANNEL BIT(0) 3802d6c1e6dSIra Weiny #define CXL_DER_VALID_RANK BIT(1) 3812d6c1e6dSIra Weiny #define CXL_DER_VALID_NIBBLE BIT(2) 3822d6c1e6dSIra Weiny #define CXL_DER_VALID_BANK_GROUP BIT(3) 3832d6c1e6dSIra Weiny #define CXL_DER_VALID_BANK BIT(4) 3842d6c1e6dSIra Weiny #define CXL_DER_VALID_ROW BIT(5) 3852d6c1e6dSIra Weiny #define CXL_DER_VALID_COLUMN BIT(6) 3862d6c1e6dSIra Weiny #define CXL_DER_VALID_CORRECTION_MASK BIT(7) 3872d6c1e6dSIra Weiny #define show_dram_valid_flags(flags) __print_flags(flags, "|", \ 3882d6c1e6dSIra Weiny { CXL_DER_VALID_CHANNEL, "CHANNEL" }, \ 3892d6c1e6dSIra Weiny { CXL_DER_VALID_RANK, "RANK" }, \ 3902d6c1e6dSIra Weiny { CXL_DER_VALID_NIBBLE, "NIBBLE" }, \ 3912d6c1e6dSIra Weiny { CXL_DER_VALID_BANK_GROUP, "BANK GROUP" }, \ 3922d6c1e6dSIra Weiny { CXL_DER_VALID_BANK, "BANK" }, \ 3932d6c1e6dSIra Weiny { CXL_DER_VALID_ROW, "ROW" }, \ 3942d6c1e6dSIra Weiny { CXL_DER_VALID_COLUMN, "COLUMN" }, \ 3952d6c1e6dSIra Weiny { CXL_DER_VALID_CORRECTION_MASK, "CORRECTION MASK" } \ 3962d6c1e6dSIra Weiny ) 3972d6c1e6dSIra Weiny 3982d6c1e6dSIra Weiny TRACE_EVENT(cxl_dram, 3992d6c1e6dSIra Weiny 4000c8393dcSIra Weiny TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log, 4012d6c1e6dSIra Weiny struct cxl_event_dram *rec), 4022d6c1e6dSIra Weiny 4030c8393dcSIra Weiny TP_ARGS(cxlmd, log, rec), 4042d6c1e6dSIra Weiny 4052d6c1e6dSIra Weiny TP_STRUCT__entry( 4062d6c1e6dSIra Weiny CXL_EVT_TP_entry 4072d6c1e6dSIra Weiny /* DRAM */ 4082d6c1e6dSIra Weiny __field(u64, dpa) 4092d6c1e6dSIra Weiny __field(u8, descriptor) 4102d6c1e6dSIra Weiny __field(u8, type) 4112d6c1e6dSIra Weiny __field(u8, transaction_type) 4122d6c1e6dSIra Weiny __field(u8, channel) 4132d6c1e6dSIra Weiny __field(u16, validity_flags) 4142d6c1e6dSIra Weiny __field(u16, column) /* Out of order to pack trace record */ 4152d6c1e6dSIra Weiny __field(u32, nibble_mask) 4162d6c1e6dSIra Weiny __field(u32, row) 4172d6c1e6dSIra Weiny __array(u8, cor_mask, CXL_EVENT_DER_CORRECTION_MASK_SIZE) 4182d6c1e6dSIra Weiny __field(u8, rank) /* Out of order to pack trace record */ 4192d6c1e6dSIra Weiny __field(u8, bank_group) /* Out of order to pack trace record */ 4202d6c1e6dSIra Weiny __field(u8, bank) /* Out of order to pack trace record */ 4212d6c1e6dSIra Weiny __field(u8, dpa_flags) /* Out of order to pack trace record */ 4222d6c1e6dSIra Weiny ), 4232d6c1e6dSIra Weiny 4242d6c1e6dSIra Weiny TP_fast_assign( 4250c8393dcSIra Weiny CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr); 4262d6c1e6dSIra Weiny 4272d6c1e6dSIra Weiny /* DRAM */ 4282d6c1e6dSIra Weiny __entry->dpa = le64_to_cpu(rec->phys_addr); 4292d6c1e6dSIra Weiny __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK; 4302d6c1e6dSIra Weiny __entry->dpa &= CXL_DPA_MASK; 4312d6c1e6dSIra Weiny __entry->descriptor = rec->descriptor; 4322d6c1e6dSIra Weiny __entry->type = rec->type; 4332d6c1e6dSIra Weiny __entry->transaction_type = rec->transaction_type; 4342d6c1e6dSIra Weiny __entry->validity_flags = get_unaligned_le16(rec->validity_flags); 4352d6c1e6dSIra Weiny __entry->channel = rec->channel; 4362d6c1e6dSIra Weiny __entry->rank = rec->rank; 4372d6c1e6dSIra Weiny __entry->nibble_mask = get_unaligned_le24(rec->nibble_mask); 4382d6c1e6dSIra Weiny __entry->bank_group = rec->bank_group; 4392d6c1e6dSIra Weiny __entry->bank = rec->bank; 4402d6c1e6dSIra Weiny __entry->row = get_unaligned_le24(rec->row); 4412d6c1e6dSIra Weiny __entry->column = get_unaligned_le16(rec->column); 4422d6c1e6dSIra Weiny memcpy(__entry->cor_mask, &rec->correction_mask, 4432d6c1e6dSIra Weiny CXL_EVENT_DER_CORRECTION_MASK_SIZE); 4442d6c1e6dSIra Weiny ), 4452d6c1e6dSIra Weiny 4462d6c1e6dSIra Weiny CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' descriptor='%s' type='%s' " \ 4472d6c1e6dSIra Weiny "transaction_type='%s' channel=%u rank=%u nibble_mask=%x " \ 4482d6c1e6dSIra Weiny "bank_group=%u bank=%u row=%u column=%u cor_mask=%s " \ 4492d6c1e6dSIra Weiny "validity_flags='%s'", 4502d6c1e6dSIra Weiny __entry->dpa, show_dpa_flags(__entry->dpa_flags), 4512d6c1e6dSIra Weiny show_event_desc_flags(__entry->descriptor), 4522d6c1e6dSIra Weiny show_mem_event_type(__entry->type), 4532d6c1e6dSIra Weiny show_trans_type(__entry->transaction_type), 4542d6c1e6dSIra Weiny __entry->channel, __entry->rank, __entry->nibble_mask, 4552d6c1e6dSIra Weiny __entry->bank_group, __entry->bank, 4562d6c1e6dSIra Weiny __entry->row, __entry->column, 4572d6c1e6dSIra Weiny __print_hex(__entry->cor_mask, CXL_EVENT_DER_CORRECTION_MASK_SIZE), 4582d6c1e6dSIra Weiny show_dram_valid_flags(__entry->validity_flags) 4592d6c1e6dSIra Weiny ) 4602d6c1e6dSIra Weiny ); 4612d6c1e6dSIra Weiny 46295b49479SIra Weiny /* 46395b49479SIra Weiny * Memory Module Event Record - MMER 46495b49479SIra Weiny * 46595b49479SIra Weiny * CXL res 3.0 section 8.2.9.2.1.3; Table 8-45 46695b49479SIra Weiny */ 46795b49479SIra Weiny #define CXL_MMER_HEALTH_STATUS_CHANGE 0x00 46895b49479SIra Weiny #define CXL_MMER_MEDIA_STATUS_CHANGE 0x01 46995b49479SIra Weiny #define CXL_MMER_LIFE_USED_CHANGE 0x02 47095b49479SIra Weiny #define CXL_MMER_TEMP_CHANGE 0x03 47195b49479SIra Weiny #define CXL_MMER_DATA_PATH_ERROR 0x04 47295b49479SIra Weiny #define CXL_MMER_LSA_ERROR 0x05 47395b49479SIra Weiny #define show_dev_evt_type(type) __print_symbolic(type, \ 47495b49479SIra Weiny { CXL_MMER_HEALTH_STATUS_CHANGE, "Health Status Change" }, \ 47595b49479SIra Weiny { CXL_MMER_MEDIA_STATUS_CHANGE, "Media Status Change" }, \ 47695b49479SIra Weiny { CXL_MMER_LIFE_USED_CHANGE, "Life Used Change" }, \ 47795b49479SIra Weiny { CXL_MMER_TEMP_CHANGE, "Temperature Change" }, \ 47895b49479SIra Weiny { CXL_MMER_DATA_PATH_ERROR, "Data Path Error" }, \ 47995b49479SIra Weiny { CXL_MMER_LSA_ERROR, "LSA Error" } \ 48095b49479SIra Weiny ) 48195b49479SIra Weiny 48295b49479SIra Weiny /* 48395b49479SIra Weiny * Device Health Information - DHI 48495b49479SIra Weiny * 48595b49479SIra Weiny * CXL res 3.0 section 8.2.9.8.3.1; Table 8-100 48695b49479SIra Weiny */ 48795b49479SIra Weiny #define CXL_DHI_HS_MAINTENANCE_NEEDED BIT(0) 48895b49479SIra Weiny #define CXL_DHI_HS_PERFORMANCE_DEGRADED BIT(1) 48995b49479SIra Weiny #define CXL_DHI_HS_HW_REPLACEMENT_NEEDED BIT(2) 49095b49479SIra Weiny #define show_health_status_flags(flags) __print_flags(flags, "|", \ 49195b49479SIra Weiny { CXL_DHI_HS_MAINTENANCE_NEEDED, "MAINTENANCE_NEEDED" }, \ 49295b49479SIra Weiny { CXL_DHI_HS_PERFORMANCE_DEGRADED, "PERFORMANCE_DEGRADED" }, \ 49395b49479SIra Weiny { CXL_DHI_HS_HW_REPLACEMENT_NEEDED, "REPLACEMENT_NEEDED" } \ 49495b49479SIra Weiny ) 49595b49479SIra Weiny 49695b49479SIra Weiny #define CXL_DHI_MS_NORMAL 0x00 49795b49479SIra Weiny #define CXL_DHI_MS_NOT_READY 0x01 49895b49479SIra Weiny #define CXL_DHI_MS_WRITE_PERSISTENCY_LOST 0x02 49995b49479SIra Weiny #define CXL_DHI_MS_ALL_DATA_LOST 0x03 50095b49479SIra Weiny #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_POWER_LOSS 0x04 50195b49479SIra Weiny #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_SHUTDOWN 0x05 50295b49479SIra Weiny #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_IMMINENT 0x06 50395b49479SIra Weiny #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_POWER_LOSS 0x07 50495b49479SIra Weiny #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_SHUTDOWN 0x08 50595b49479SIra Weiny #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_IMMINENT 0x09 50695b49479SIra Weiny #define show_media_status(ms) __print_symbolic(ms, \ 50795b49479SIra Weiny { CXL_DHI_MS_NORMAL, \ 50895b49479SIra Weiny "Normal" }, \ 50995b49479SIra Weiny { CXL_DHI_MS_NOT_READY, \ 51095b49479SIra Weiny "Not Ready" }, \ 51195b49479SIra Weiny { CXL_DHI_MS_WRITE_PERSISTENCY_LOST, \ 51295b49479SIra Weiny "Write Persistency Lost" }, \ 51395b49479SIra Weiny { CXL_DHI_MS_ALL_DATA_LOST, \ 51495b49479SIra Weiny "All Data Lost" }, \ 51595b49479SIra Weiny { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_POWER_LOSS, \ 51695b49479SIra Weiny "Write Persistency Loss in the Event of Power Loss" }, \ 51795b49479SIra Weiny { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_SHUTDOWN, \ 51895b49479SIra Weiny "Write Persistency Loss in Event of Shutdown" }, \ 51995b49479SIra Weiny { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_IMMINENT, \ 52095b49479SIra Weiny "Write Persistency Loss Imminent" }, \ 52195b49479SIra Weiny { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_POWER_LOSS, \ 52295b49479SIra Weiny "All Data Loss in Event of Power Loss" }, \ 52395b49479SIra Weiny { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_SHUTDOWN, \ 52495b49479SIra Weiny "All Data loss in the Event of Shutdown" }, \ 52595b49479SIra Weiny { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_IMMINENT, \ 52695b49479SIra Weiny "All Data Loss Imminent" } \ 52795b49479SIra Weiny ) 52895b49479SIra Weiny 52995b49479SIra Weiny #define CXL_DHI_AS_NORMAL 0x0 53095b49479SIra Weiny #define CXL_DHI_AS_WARNING 0x1 53195b49479SIra Weiny #define CXL_DHI_AS_CRITICAL 0x2 53295b49479SIra Weiny #define show_two_bit_status(as) __print_symbolic(as, \ 53395b49479SIra Weiny { CXL_DHI_AS_NORMAL, "Normal" }, \ 53495b49479SIra Weiny { CXL_DHI_AS_WARNING, "Warning" }, \ 53595b49479SIra Weiny { CXL_DHI_AS_CRITICAL, "Critical" } \ 53695b49479SIra Weiny ) 53795b49479SIra Weiny #define show_one_bit_status(as) __print_symbolic(as, \ 53895b49479SIra Weiny { CXL_DHI_AS_NORMAL, "Normal" }, \ 53995b49479SIra Weiny { CXL_DHI_AS_WARNING, "Warning" } \ 54095b49479SIra Weiny ) 54195b49479SIra Weiny 54295b49479SIra Weiny #define CXL_DHI_AS_LIFE_USED(as) (as & 0x3) 54395b49479SIra Weiny #define CXL_DHI_AS_DEV_TEMP(as) ((as & 0xC) >> 2) 54495b49479SIra Weiny #define CXL_DHI_AS_COR_VOL_ERR_CNT(as) ((as & 0x10) >> 4) 54595b49479SIra Weiny #define CXL_DHI_AS_COR_PER_ERR_CNT(as) ((as & 0x20) >> 5) 54695b49479SIra Weiny 54795b49479SIra Weiny TRACE_EVENT(cxl_memory_module, 54895b49479SIra Weiny 5490c8393dcSIra Weiny TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log, 55095b49479SIra Weiny struct cxl_event_mem_module *rec), 55195b49479SIra Weiny 5520c8393dcSIra Weiny TP_ARGS(cxlmd, log, rec), 55395b49479SIra Weiny 55495b49479SIra Weiny TP_STRUCT__entry( 55595b49479SIra Weiny CXL_EVT_TP_entry 55695b49479SIra Weiny 55795b49479SIra Weiny /* Memory Module Event */ 55895b49479SIra Weiny __field(u8, event_type) 55995b49479SIra Weiny 56095b49479SIra Weiny /* Device Health Info */ 56195b49479SIra Weiny __field(u8, health_status) 56295b49479SIra Weiny __field(u8, media_status) 56395b49479SIra Weiny __field(u8, life_used) 56495b49479SIra Weiny __field(u32, dirty_shutdown_cnt) 56595b49479SIra Weiny __field(u32, cor_vol_err_cnt) 56695b49479SIra Weiny __field(u32, cor_per_err_cnt) 56795b49479SIra Weiny __field(s16, device_temp) 56895b49479SIra Weiny __field(u8, add_status) 56995b49479SIra Weiny ), 57095b49479SIra Weiny 57195b49479SIra Weiny TP_fast_assign( 5720c8393dcSIra Weiny CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr); 57395b49479SIra Weiny 57495b49479SIra Weiny /* Memory Module Event */ 57595b49479SIra Weiny __entry->event_type = rec->event_type; 57695b49479SIra Weiny 57795b49479SIra Weiny /* Device Health Info */ 57895b49479SIra Weiny __entry->health_status = rec->info.health_status; 57995b49479SIra Weiny __entry->media_status = rec->info.media_status; 58095b49479SIra Weiny __entry->life_used = rec->info.life_used; 58195b49479SIra Weiny __entry->dirty_shutdown_cnt = get_unaligned_le32(rec->info.dirty_shutdown_cnt); 58295b49479SIra Weiny __entry->cor_vol_err_cnt = get_unaligned_le32(rec->info.cor_vol_err_cnt); 58395b49479SIra Weiny __entry->cor_per_err_cnt = get_unaligned_le32(rec->info.cor_per_err_cnt); 58495b49479SIra Weiny __entry->device_temp = get_unaligned_le16(rec->info.device_temp); 58595b49479SIra Weiny __entry->add_status = rec->info.add_status; 58695b49479SIra Weiny ), 58795b49479SIra Weiny 58895b49479SIra Weiny CXL_EVT_TP_printk("event_type='%s' health_status='%s' media_status='%s' " \ 58995b49479SIra Weiny "as_life_used=%s as_dev_temp=%s as_cor_vol_err_cnt=%s " \ 59095b49479SIra Weiny "as_cor_per_err_cnt=%s life_used=%u device_temp=%d " \ 59195b49479SIra Weiny "dirty_shutdown_cnt=%u cor_vol_err_cnt=%u cor_per_err_cnt=%u", 59295b49479SIra Weiny show_dev_evt_type(__entry->event_type), 59395b49479SIra Weiny show_health_status_flags(__entry->health_status), 59495b49479SIra Weiny show_media_status(__entry->media_status), 59595b49479SIra Weiny show_two_bit_status(CXL_DHI_AS_LIFE_USED(__entry->add_status)), 59695b49479SIra Weiny show_two_bit_status(CXL_DHI_AS_DEV_TEMP(__entry->add_status)), 59795b49479SIra Weiny show_one_bit_status(CXL_DHI_AS_COR_VOL_ERR_CNT(__entry->add_status)), 59895b49479SIra Weiny show_one_bit_status(CXL_DHI_AS_COR_PER_ERR_CNT(__entry->add_status)), 59995b49479SIra Weiny __entry->life_used, __entry->device_temp, 60095b49479SIra Weiny __entry->dirty_shutdown_cnt, __entry->cor_vol_err_cnt, 60195b49479SIra Weiny __entry->cor_per_err_cnt 60295b49479SIra Weiny ) 60395b49479SIra Weiny ); 60495b49479SIra Weiny 605*ddf49d57SAlison Schofield #define show_poison_trace_type(type) \ 606*ddf49d57SAlison Schofield __print_symbolic(type, \ 607*ddf49d57SAlison Schofield { CXL_POISON_TRACE_LIST, "List" }) 608*ddf49d57SAlison Schofield 609*ddf49d57SAlison Schofield #define __show_poison_source(source) \ 610*ddf49d57SAlison Schofield __print_symbolic(source, \ 611*ddf49d57SAlison Schofield { CXL_POISON_SOURCE_UNKNOWN, "Unknown" }, \ 612*ddf49d57SAlison Schofield { CXL_POISON_SOURCE_EXTERNAL, "External" }, \ 613*ddf49d57SAlison Schofield { CXL_POISON_SOURCE_INTERNAL, "Internal" }, \ 614*ddf49d57SAlison Schofield { CXL_POISON_SOURCE_INJECTED, "Injected" }, \ 615*ddf49d57SAlison Schofield { CXL_POISON_SOURCE_VENDOR, "Vendor" }) 616*ddf49d57SAlison Schofield 617*ddf49d57SAlison Schofield #define show_poison_source(source) \ 618*ddf49d57SAlison Schofield (((source > CXL_POISON_SOURCE_INJECTED) && \ 619*ddf49d57SAlison Schofield (source != CXL_POISON_SOURCE_VENDOR)) ? "Reserved" \ 620*ddf49d57SAlison Schofield : __show_poison_source(source)) 621*ddf49d57SAlison Schofield 622*ddf49d57SAlison Schofield #define show_poison_flags(flags) \ 623*ddf49d57SAlison Schofield __print_flags(flags, "|", \ 624*ddf49d57SAlison Schofield { CXL_POISON_FLAG_MORE, "More" }, \ 625*ddf49d57SAlison Schofield { CXL_POISON_FLAG_OVERFLOW, "Overflow" }, \ 626*ddf49d57SAlison Schofield { CXL_POISON_FLAG_SCANNING, "Scanning" }) 627*ddf49d57SAlison Schofield 628*ddf49d57SAlison Schofield #define __cxl_poison_addr(record) \ 629*ddf49d57SAlison Schofield (le64_to_cpu(record->address)) 630*ddf49d57SAlison Schofield #define cxl_poison_record_dpa(record) \ 631*ddf49d57SAlison Schofield (__cxl_poison_addr(record) & CXL_POISON_START_MASK) 632*ddf49d57SAlison Schofield #define cxl_poison_record_source(record) \ 633*ddf49d57SAlison Schofield (__cxl_poison_addr(record) & CXL_POISON_SOURCE_MASK) 634*ddf49d57SAlison Schofield #define cxl_poison_record_dpa_length(record) \ 635*ddf49d57SAlison Schofield (le32_to_cpu(record->length) * CXL_POISON_LEN_MULT) 636*ddf49d57SAlison Schofield #define cxl_poison_overflow(flags, time) \ 637*ddf49d57SAlison Schofield (flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0) 638*ddf49d57SAlison Schofield 639*ddf49d57SAlison Schofield TRACE_EVENT(cxl_poison, 640*ddf49d57SAlison Schofield 641*ddf49d57SAlison Schofield TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region, 642*ddf49d57SAlison Schofield const struct cxl_poison_record *record, u8 flags, 643*ddf49d57SAlison Schofield __le64 overflow_ts, enum cxl_poison_trace_type trace_type), 644*ddf49d57SAlison Schofield 645*ddf49d57SAlison Schofield TP_ARGS(cxlmd, region, record, flags, overflow_ts, trace_type), 646*ddf49d57SAlison Schofield 647*ddf49d57SAlison Schofield TP_STRUCT__entry( 648*ddf49d57SAlison Schofield __string(memdev, dev_name(&cxlmd->dev)) 649*ddf49d57SAlison Schofield __string(host, dev_name(cxlmd->dev.parent)) 650*ddf49d57SAlison Schofield __field(u64, serial) 651*ddf49d57SAlison Schofield __field(u8, trace_type) 652*ddf49d57SAlison Schofield __string(region, region) 653*ddf49d57SAlison Schofield __field(u64, overflow_ts) 654*ddf49d57SAlison Schofield __field(u64, dpa) 655*ddf49d57SAlison Schofield __field(u32, dpa_length) 656*ddf49d57SAlison Schofield __array(char, uuid, 16) 657*ddf49d57SAlison Schofield __field(u8, source) 658*ddf49d57SAlison Schofield __field(u8, flags) 659*ddf49d57SAlison Schofield ), 660*ddf49d57SAlison Schofield 661*ddf49d57SAlison Schofield TP_fast_assign( 662*ddf49d57SAlison Schofield __assign_str(memdev, dev_name(&cxlmd->dev)); 663*ddf49d57SAlison Schofield __assign_str(host, dev_name(cxlmd->dev.parent)); 664*ddf49d57SAlison Schofield __entry->serial = cxlmd->cxlds->serial; 665*ddf49d57SAlison Schofield __entry->overflow_ts = cxl_poison_overflow(flags, overflow_ts); 666*ddf49d57SAlison Schofield __entry->dpa = cxl_poison_record_dpa(record); 667*ddf49d57SAlison Schofield __entry->dpa_length = cxl_poison_record_dpa_length(record); 668*ddf49d57SAlison Schofield __entry->source = cxl_poison_record_source(record); 669*ddf49d57SAlison Schofield __entry->trace_type = trace_type; 670*ddf49d57SAlison Schofield __entry->flags = flags; 671*ddf49d57SAlison Schofield if (region) { 672*ddf49d57SAlison Schofield __assign_str(region, dev_name(®ion->dev)); 673*ddf49d57SAlison Schofield memcpy(__entry->uuid, ®ion->params.uuid, 16); 674*ddf49d57SAlison Schofield } else { 675*ddf49d57SAlison Schofield __assign_str(region, ""); 676*ddf49d57SAlison Schofield memset(__entry->uuid, 0, 16); 677*ddf49d57SAlison Schofield } 678*ddf49d57SAlison Schofield ), 679*ddf49d57SAlison Schofield 680*ddf49d57SAlison Schofield TP_printk("memdev=%s host=%s serial=%lld trace_type=%s region=%s " \ 681*ddf49d57SAlison Schofield "region_uuid=%pU dpa=0x%llx dpa_length=0x%x source=%s " \ 682*ddf49d57SAlison Schofield "flags=%s overflow_time=%llu", 683*ddf49d57SAlison Schofield __get_str(memdev), 684*ddf49d57SAlison Schofield __get_str(host), 685*ddf49d57SAlison Schofield __entry->serial, 686*ddf49d57SAlison Schofield show_poison_trace_type(__entry->trace_type), 687*ddf49d57SAlison Schofield __get_str(region), 688*ddf49d57SAlison Schofield __entry->uuid, 689*ddf49d57SAlison Schofield __entry->dpa, 690*ddf49d57SAlison Schofield __entry->dpa_length, 691*ddf49d57SAlison Schofield show_poison_source(__entry->source), 692*ddf49d57SAlison Schofield show_poison_flags(__entry->flags), 693*ddf49d57SAlison Schofield __entry->overflow_ts 694*ddf49d57SAlison Schofield ) 695*ddf49d57SAlison Schofield ); 696*ddf49d57SAlison Schofield 6974a20bc3eSDan Williams #endif /* _CXL_EVENTS_H */ 6984a20bc3eSDan Williams 6994a20bc3eSDan Williams #define TRACE_INCLUDE_FILE trace 7004a20bc3eSDan Williams #include <trace/define_trace.h> 701