1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __STARFIVE_STR_H__ 3 #define __STARFIVE_STR_H__ 4 5 #include <crypto/aes.h> 6 #include <crypto/hash.h> 7 #include <crypto/scatterwalk.h> 8 #include <crypto/sha2.h> 9 #include <crypto/sm3.h> 10 #include <linux/delay.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/dmaengine.h> 13 #include <linux/interrupt.h> 14 15 #define STARFIVE_ALG_CR_OFFSET 0x0 16 #define STARFIVE_ALG_FIFO_OFFSET 0x4 17 #define STARFIVE_IE_MASK_OFFSET 0x8 18 #define STARFIVE_IE_FLAG_OFFSET 0xc 19 #define STARFIVE_DMA_IN_LEN_OFFSET 0x10 20 #define STARFIVE_DMA_OUT_LEN_OFFSET 0x14 21 22 #define STARFIVE_IE_MASK_AES_DONE 0x1 23 #define STARFIVE_IE_MASK_HASH_DONE 0x4 24 #define STARFIVE_IE_MASK_PKA_DONE 0x8 25 #define STARFIVE_IE_FLAG_AES_DONE 0x1 26 #define STARFIVE_IE_FLAG_HASH_DONE 0x4 27 #define STARFIVE_IE_FLAG_PKA_DONE 0x8 28 29 #define STARFIVE_MSG_BUFFER_SIZE SZ_16K 30 #define MAX_KEY_SIZE SHA512_BLOCK_SIZE 31 #define STARFIVE_AES_IV_LEN AES_BLOCK_SIZE 32 #define STARFIVE_AES_CTR_LEN AES_BLOCK_SIZE 33 #define STARFIVE_RSA_MAX_KEYSZ 256 34 35 union starfive_aes_csr { 36 u32 v; 37 struct { 38 u32 cmode :1; 39 #define STARFIVE_AES_KEYMODE_128 0x0 40 #define STARFIVE_AES_KEYMODE_192 0x1 41 #define STARFIVE_AES_KEYMODE_256 0x2 42 u32 keymode :2; 43 #define STARFIVE_AES_BUSY BIT(3) 44 u32 busy :1; 45 u32 done :1; 46 #define STARFIVE_AES_KEY_DONE BIT(5) 47 u32 krdy :1; 48 u32 aesrst :1; 49 u32 ie :1; 50 #define STARFIVE_AES_CCM_START BIT(8) 51 u32 ccm_start :1; 52 #define STARFIVE_AES_MODE_ECB 0x0 53 #define STARFIVE_AES_MODE_CBC 0x1 54 #define STARFIVE_AES_MODE_CTR 0x4 55 #define STARFIVE_AES_MODE_CCM 0x5 56 #define STARFIVE_AES_MODE_GCM 0x6 57 u32 mode :3; 58 #define STARFIVE_AES_GCM_START BIT(12) 59 u32 gcm_start :1; 60 #define STARFIVE_AES_GCM_DONE BIT(13) 61 u32 gcm_done :1; 62 u32 delay_aes :1; 63 u32 vaes_start :1; 64 u32 rsvd_0 :8; 65 #define STARFIVE_AES_MODE_XFB_1 0x0 66 #define STARFIVE_AES_MODE_XFB_128 0x5 67 u32 stmode :3; 68 u32 rsvd_1 :5; 69 }; 70 }; 71 72 union starfive_hash_csr { 73 u32 v; 74 struct { 75 u32 start :1; 76 u32 reset :1; 77 u32 ie :1; 78 u32 firstb :1; 79 #define STARFIVE_HASH_SM3 0x0 80 #define STARFIVE_HASH_SHA224 0x3 81 #define STARFIVE_HASH_SHA256 0x4 82 #define STARFIVE_HASH_SHA384 0x5 83 #define STARFIVE_HASH_SHA512 0x6 84 #define STARFIVE_HASH_MODE_MASK 0x7 85 u32 mode :3; 86 u32 rsvd_1 :1; 87 u32 final :1; 88 u32 rsvd_2 :2; 89 #define STARFIVE_HASH_HMAC_FLAGS 0x800 90 u32 hmac :1; 91 u32 rsvd_3 :1; 92 #define STARFIVE_HASH_KEY_DONE BIT(13) 93 u32 key_done :1; 94 u32 key_flag :1; 95 #define STARFIVE_HASH_HMAC_DONE BIT(15) 96 u32 hmac_done :1; 97 #define STARFIVE_HASH_BUSY BIT(16) 98 u32 busy :1; 99 u32 hashdone :1; 100 u32 rsvd_4 :14; 101 }; 102 }; 103 104 union starfive_pka_cacr { 105 u32 v; 106 struct { 107 u32 start :1; 108 u32 reset :1; 109 u32 ie :1; 110 u32 rsvd_0 :1; 111 u32 fifo_mode :1; 112 u32 not_r2 :1; 113 u32 ecc_sub :1; 114 u32 pre_expf :1; 115 u32 cmd :4; 116 u32 rsvd_1 :1; 117 u32 ctrl_dummy :1; 118 u32 ctrl_false :1; 119 u32 cln_done :1; 120 u32 opsize :6; 121 u32 rsvd_2 :2; 122 u32 exposize :6; 123 u32 rsvd_3 :1; 124 u32 bigendian :1; 125 }; 126 }; 127 128 union starfive_pka_casr { 129 u32 v; 130 struct { 131 #define STARFIVE_PKA_DONE BIT(0) 132 u32 done :1; 133 u32 rsvd_0 :31; 134 }; 135 }; 136 137 struct starfive_rsa_key { 138 u8 *n; 139 u8 *e; 140 u8 *d; 141 int e_bitlen; 142 int d_bitlen; 143 int bitlen; 144 size_t key_sz; 145 }; 146 147 union starfive_alg_cr { 148 u32 v; 149 struct { 150 u32 start :1; 151 u32 aes_dma_en :1; 152 u32 rsvd_0 :1; 153 u32 hash_dma_en :1; 154 u32 alg_done :1; 155 u32 rsvd_1 :3; 156 u32 clear :1; 157 u32 rsvd_2 :23; 158 }; 159 }; 160 161 struct starfive_cryp_ctx { 162 struct starfive_cryp_dev *cryp; 163 struct starfive_cryp_request_ctx *rctx; 164 165 unsigned int hash_mode; 166 u8 key[MAX_KEY_SIZE]; 167 int keylen; 168 bool is_hmac; 169 struct starfive_rsa_key rsa_key; 170 struct crypto_akcipher *akcipher_fbk; 171 struct crypto_ahash *ahash_fbk; 172 struct crypto_aead *aead_fbk; 173 struct crypto_skcipher *skcipher_fbk; 174 }; 175 176 struct starfive_cryp_dev { 177 struct list_head list; 178 struct device *dev; 179 struct clk *hclk; 180 struct clk *ahb; 181 struct reset_control *rst; 182 183 void __iomem *base; 184 phys_addr_t phys_base; 185 186 u32 dma_maxburst; 187 struct dma_chan *tx; 188 struct dma_chan *rx; 189 struct dma_slave_config cfg_in; 190 struct dma_slave_config cfg_out; 191 struct crypto_engine *engine; 192 struct completion dma_done; 193 size_t assoclen; 194 size_t total_in; 195 size_t total_out; 196 u32 tag_in[4]; 197 u32 tag_out[4]; 198 unsigned int authsize; 199 unsigned long flags; 200 int err; 201 bool side_chan; 202 union starfive_alg_cr alg_cr; 203 union { 204 struct ahash_request *hreq; 205 struct aead_request *areq; 206 struct skcipher_request *sreq; 207 } req; 208 }; 209 210 struct starfive_cryp_request_ctx { 211 union { 212 union starfive_hash_csr hash; 213 union starfive_pka_cacr pka; 214 union starfive_aes_csr aes; 215 } csr; 216 217 struct scatterlist *in_sg; 218 struct scatterlist *out_sg; 219 struct ahash_request ahash_fbk_req; 220 size_t total; 221 unsigned int blksize; 222 unsigned int digsize; 223 unsigned long in_sg_len; 224 unsigned char *adata; 225 u8 rsa_data[STARFIVE_RSA_MAX_KEYSZ] __aligned(sizeof(u32)); 226 }; 227 228 struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx); 229 230 int starfive_hash_register_algs(void); 231 void starfive_hash_unregister_algs(void); 232 233 int starfive_rsa_register_algs(void); 234 void starfive_rsa_unregister_algs(void); 235 236 int starfive_aes_register_algs(void); 237 void starfive_aes_unregister_algs(void); 238 #endif 239