xref: /linux/drivers/crypto/starfive/jh7110-cryp.h (revision 42ef0e944b0119e9987819af0a5a04d32d5e5edf)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __STARFIVE_STR_H__
3 #define __STARFIVE_STR_H__
4 
5 #include <linux/delay.h>
6 #include <linux/dma-mapping.h>
7 #include <linux/dmaengine.h>
8 
9 #include <crypto/engine.h>
10 
11 #define STARFIVE_ALG_CR_OFFSET			0x0
12 #define STARFIVE_ALG_FIFO_OFFSET		0x4
13 #define STARFIVE_IE_MASK_OFFSET			0x8
14 #define STARFIVE_IE_FLAG_OFFSET			0xc
15 #define STARFIVE_DMA_IN_LEN_OFFSET		0x10
16 #define STARFIVE_DMA_OUT_LEN_OFFSET		0x14
17 
18 #define STARFIVE_MSG_BUFFER_SIZE		SZ_16K
19 
20 union starfive_alg_cr {
21 	u32 v;
22 	struct {
23 		u32 start			:1;
24 		u32 aes_dma_en			:1;
25 		u32 rsvd_0			:1;
26 		u32 hash_dma_en			:1;
27 		u32 alg_done			:1;
28 		u32 rsvd_1			:3;
29 		u32 clear			:1;
30 		u32 rsvd_2			:23;
31 	};
32 };
33 
34 struct starfive_cryp_ctx {
35 	struct crypto_engine_ctx		enginectx;
36 	struct starfive_cryp_dev		*cryp;
37 };
38 
39 struct starfive_cryp_dev {
40 	struct list_head			list;
41 	struct device				*dev;
42 
43 	struct clk				*hclk;
44 	struct clk				*ahb;
45 	struct reset_control			*rst;
46 
47 	void __iomem				*base;
48 	phys_addr_t				phys_base;
49 
50 	u32					dma_maxburst;
51 	struct dma_chan				*tx;
52 	struct dma_chan				*rx;
53 	struct dma_slave_config			cfg_in;
54 	struct dma_slave_config			cfg_out;
55 
56 	struct crypto_engine			*engine;
57 
58 	union starfive_alg_cr			alg_cr;
59 };
60 
61 struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx);
62 
63 #endif
64